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authorBryan O'Donoghue <bryan.odonoghue@linaro.org>2017-09-20 16:36:29 +0100
committerBryan O'Donoghue <bryan.odonoghue@linaro.org>2019-05-01 11:51:15 +0100
commit3d10191cef4651f0ce0928c544f46d9bd149bac1 (patch)
tree639c434ff61a3282bfcdb931924849470430d810
parent59a62b9e225c0aacaf6e399ab7e808085537e976 (diff)
nvmem: imx-ocotp: Restrict OTP write to IMX6 processors
i.MX7S/D have a different scheme for addressing the OTP registers inside the OCOTP block. Currently it's possible to address the wrong OTP registers given the disparity between IMX6 and IMX7 OTP addressing. Since OTP programming is one-time destructive its important we restrict this interface ASAP. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Fixes: 711d45477931 ("nvmem: octop: Add i.MX7D support") Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Acked-by: Rui Miguel Silva <rui.silva@linaro.org>
-rw-r--r--drivers/nvmem/imx-ocotp.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c
index 193ca8fd350a..17d160fc9879 100644
--- a/drivers/nvmem/imx-ocotp.c
+++ b/drivers/nvmem/imx-ocotp.c
@@ -347,6 +347,8 @@ static int imx_ocotp_probe(struct platform_device *pdev)
imx_ocotp_nvmem_config.dev = dev;
imx_ocotp_nvmem_config.priv = priv;
priv->config = &imx_ocotp_nvmem_config;
+ if (of_device_is_compatible(pdev->dev.of_node, "fsl,imx7d-ocotp"))
+ imx_ocotp_nvmem_config.read_only = true;
nvmem = nvmem_register(&imx_ocotp_nvmem_config);
if (IS_ERR(nvmem))