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author | Laurentiu Palcu <laurentiu.palcu@nxp.com> | 2018-11-28 13:36:46 +0200 |
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committer | Bryan O'Donoghue <bryan.odonoghue@linaro.org> | 2019-05-01 17:43:29 +0100 |
commit | 899b9226d9a6be978bd5744fac3f7a604942de3f (patch) | |
tree | 342814a6d0c80ddbd88c3192a485d8a0632911b0 /arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi | |
parent | 271bc9444d036ac1b7cc3eadc14697a1ca4a27b6 (diff) |
MLK-20361: drm/panel/raydium: increase vsync_len to 4
This is a work-around for the shifted display issue when using DCSS with
the DDR self-refresh disabled.
Also, make sure it works with LCDIF as well.
Increasing VSYNC length gives DCSS more time to fetch the data from RAM
before the next frame kicks in.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
(cherry picked from commit 3c53532c466add234ac3ca2e70cefe80ea308b4f)
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dtsi')
0 files changed, 0 insertions, 0 deletions