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| author | Jerome Forissier <jerome.forissier@linaro.org> | 2018-08-24 14:58:43 +0200 |
|---|---|---|
| committer | Jérôme Forissier <jerome.forissier@linaro.org> | 2018-08-27 19:26:47 +0200 |
| commit | e07aecdb99a2f7b57ded29373c3ed23e7af5dc4b (patch) | |
| tree | 9e01af87f90b52915546ff25e91b9e8cc72a008f | |
| parent | c3d0b15de7ece03f0b84b1d15379345b31674a61 (diff) | |
ta: link.mk: filter out dependency and command files from $(MAKEFILE_LIST)
Prevents ta.lds from being needlessly re-generated, such as in the
following test case:
$ make -s out/arm-plat-vexpress/ta/avb/ta.lds
$ make -s out/arm-plat-vexpress/core/kernel/console.o
$ make out/arm-plat-vexpress/ta/avb/ta.lds
CHK out/arm-plat-vexpress/conf.mk
CHK out/arm-plat-vexpress/include/generated/conf.h
CPP out/arm-plat-vexpress/ta/avb/ta.lds
The last line should not hapen because ta.lds exists already, and building
the unrelated console.o should not trigger a re-build.
The cause of the re-build is the dependency on $(MAKEFILE_LIST) which
contains *all* the files that record previous build command and
dependencies such as out/arm-plat-vexpress/core/kernel/.console.o.{d,cmd}.
Filter out those files, thus keeping only the static Makefiles (*.mk).
This is still more than needed since all the core *.mk are present, but
listing only the TA-related makefiles seems tricky (has to work both
inside and outside the OP-TEE build environment), and removing
$(MAKEFILE_LIST) altogether presents a risk that TA developers using the
TA dev kit will complain that their TA doesn't get re-built after a flag
is changed in a Makefile.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
| -rw-r--r-- | ta/arch/arm/link.mk | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/ta/arch/arm/link.mk b/ta/arch/arm/link.mk index a5c614e7..caec04fe 100644 --- a/ta/arch/arm/link.mk +++ b/ta/arch/arm/link.mk @@ -33,7 +33,8 @@ link-script-cppflags-$(sm) := -DASM=1 \ -include $(link-script-dep$(sm)) -$(link-script-pp$(sm)): $(link-script$(sm)) $(conf-file) $(MAKEFILE_LIST) +link-script-pp-makefiles$(sm) = $(filter-out %.d %.cmd,$(MAKEFILE_LIST)) +$(link-script-pp$(sm)): $(link-script$(sm)) $(conf-file) $(link-script-pp-makefiles$(sm)) @$(cmd-echo-silent) ' CPP $@' $(q)mkdir -p $(dir $@) $(q)$(CPP$(sm)) -Wp,-P,-MT,$@,-MD,$(link-script-dep$(sm)) \ |