diff options
| author | Georgi Djakov <georgi.djakov@linaro.org> | 2017-08-07 18:45:59 +0300 |
|---|---|---|
| committer | Georgi Djakov <georgi.djakov@linaro.org> | 2018-07-30 17:07:31 +0300 |
| commit | 4343b116de68fdda2e5028703535ce9eca075d3a (patch) | |
| tree | ed6ef48475d4420e2ce443b0f5e70e913a6bc108 | |
| parent | 9404df27f235e461a68b81fdbabb0155cfc62c0f (diff) | |
arm64: dts: msm8996: Add interconnect provider DT nodes
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996.dtsi | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 9eec526beba0..392c0ab8204d 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -10,6 +10,7 @@ * GNU General Public License for more details. */ +#include <dt-bindings/interconnect/qcom.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-msm8996.h> #include <dt-bindings/clock/qcom,mmcc-msm8996.h> @@ -1109,6 +1110,108 @@ "bus_slave"; }; }; + + bimc: bimc@400000 { + compatible = "qcom,msm8996-bimc"; + #interconnect-cells = <1>; + reg = <0x400000 0x62000>; + type = <2>; + base-offset = <0x8000>; + qos-offset = <0x4000>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&rpmcc RPM_SMD_BIMC_CLK>, + <&rpmcc RPM_SMD_BIMC_A_CLK>; + status = "okay"; + }; + + cnoc: cnoc@500000 { + compatible = "qcom,msm8996-cnoc"; + #interconnect-cells = <1>; + reg = <0x500000 0x80>; + type = <1>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&rpmcc RPM_SMD_CNOC_CLK>, + <&rpmcc RPM_SMD_CNOC_A_CLK>; + status = "okay"; + }; + + snoc: snoc@520000 { + compatible = "qcom,msm8996-snoc"; + #interconnect-cells = <1>; + reg = <0x520000 0xa100>; + type = <1>; + base-offset = <0x4000>; + qos-offset = <0x1000>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&rpmcc RPM_SMD_SNOC_CLK>, + <&rpmcc RPM_SMD_SNOC_A_CLK>; + status = "okay"; + }; + + a0noc: a0noc@540000 { + compatible = "qcom,msm8996-a0noc"; + #interconnect-cells = <1>; + reg = <0x540000 0x5100>; + type = <1>; + qcom,base-offset = <0x3000>; + qos-offset = <0x1000>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&gcc GCC_AGGRE0_SNOC_AXI_CLK>, + <&gcc GCC_AGGRE0_SNOC_AXI_CLK>; + power-domains = <&gcc AGGRE0_NOC_GDSC>; + status = "okay"; + }; + + a1noc: a1noc@560000 { + compatible = "qcom,msm8996-a1noc"; + #interconnect-cells = <1>; + reg = <0x560000 0x3100>; + type = <1>; + base-offset = <0x2000>; + qos-offset = <0x1000>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&rpmcc RPM_SMD_AGGR1_NOC_CLK>, + <&rpmcc RPM_SMD_AGGR1_NOC_A_CLK>; + status = "okay"; + }; + + a2noc: a2noc@580000 { + compatible = "qcom,msm8996-a2noc"; + #interconnect-cells = <1>; + reg = <0x580000 0x8100>; + base-offset = <0x3000>; + qos-offset = <0x1000>; + type = <1>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>, + <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>; + status = "okay"; + }; + + mmnoc: mmnoc@5a0000 { + compatible = "qcom,msm8996-mmnoc"; + #interconnect-cells = <1>; + reg = <0x5a0000 0xb080>; + type = <1>; + base-offset = <0x4000>; + qos-offset = <0x1000>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&rpmcc RPM_SMD_MMAXI_CLK>, + <&rpmcc RPM_SMD_MMAXI_A_CLK>; + power-domains = <&mmcc MMAGIC_BIMC_GDSC>; + status = "okay"; + }; + + pnoc: pnoc@5c0000 { + compatible = "qcom,msm8996-pnoc"; + #interconnect-cells = <1>; + reg = <0x5c0000 0x2480>; + type = <1>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&rpmcc RPM_SMD_PCNOC_CLK>, + <&rpmcc RPM_SMD_PCNOC_A_CLK>; + status = "okay"; + }; }; adsp-pil { |