diff options
author | Linaro CI <ci_notify@linaro.org> | 2018-10-22 13:14:32 +0000 |
---|---|---|
committer | Linaro CI <ci_notify@linaro.org> | 2018-10-22 13:14:32 +0000 |
commit | e9ef70e0346a04c6c686c486b0cb0b54c5a60229 (patch) | |
tree | cc55b62ffc21b9061a3929505ffa447a6826e639 | |
parent | 3788eb990c4e37d25e121e48763e64cabff5763c (diff) | |
parent | 486340c5ae7ccf1d50508e2b1c15350d13bd3bf2 (diff) |
Merge remote-tracking branch 'bus-scaling-consumers/bus-scaling-consumers' into integration-linux-qcomlt
-rw-r--r-- | arch/arm64/boot/dts/qcom/msm8916.dtsi | 23 | ||||
-rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996.dtsi | 24 | ||||
-rw-r--r-- | drivers/crypto/qcom-rng.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 14 | ||||
-rw-r--r-- | drivers/gpu/drm/msm/msm_gpu.c | 27 | ||||
-rw-r--r-- | drivers/gpu/drm/msm/msm_gpu.h | 2 | ||||
-rw-r--r-- | drivers/i2c/busses/i2c-qup.c | 25 | ||||
-rw-r--r-- | drivers/media/platform/qcom/venus/core.c | 26 | ||||
-rw-r--r-- | drivers/media/platform/qcom/venus/core.h | 4 | ||||
-rw-r--r-- | drivers/media/platform/qcom/venus/vdec.c | 2 | ||||
-rw-r--r-- | drivers/mmc/host/sdhci-msm.c | 46 | ||||
-rw-r--r-- | drivers/pci/controller/dwc/Kconfig | 1 | ||||
-rw-r--r-- | drivers/pci/controller/dwc/pcie-qcom.c | 9 | ||||
-rw-r--r-- | drivers/phy/qualcomm/phy-qcom-usb-hs.c | 10 | ||||
-rw-r--r-- | drivers/scsi/ufs/ufs-qcom.c | 13 |
15 files changed, 233 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index eb304cfc1cde..ce1fb9e43422 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -524,6 +524,8 @@ pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c2_default>; pinctrl-1 = <&i2c2_sleep>; + interconnect-names = "i2c-mem"; + interconnects = <&pnoc MASTER_BLSP_1 &bimc SLAVE_EBI_CH0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -539,6 +541,8 @@ pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c4_default>; pinctrl-1 = <&i2c4_sleep>; + interconnect-names = "i2c-mem"; + interconnects = <&pnoc MASTER_BLSP_1 &bimc SLAVE_EBI_CH0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -554,6 +558,8 @@ pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c6_default>; pinctrl-1 = <&i2c6_sleep>; + interconnect-names = "i2c-mem"; + interconnects = <&pnoc MASTER_BLSP_1 &bimc SLAVE_EBI_CH0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -605,6 +611,8 @@ <&gcc GCC_SDCC1_AHB_CLK>, <&xo_board>; clock-names = "core", "iface", "xo"; + interconnect-names = "sdhc-mem"; + interconnects = <&pnoc MASTER_SDCC_1 &bimc SLAVE_EBI_CH0>; mmc-ddr-1_8v; bus-width = <8>; non-removable; @@ -622,6 +630,8 @@ <&gcc GCC_SDCC2_AHB_CLK>, <&xo_board>; clock-names = "core", "iface", "xo"; + interconnect-names = "sdhc-mem"; + interconnects = <&pnoc MASTER_SDCC_2 &bimc SLAVE_EBI_CH0>; bus-width = <4>; status = "disabled"; }; @@ -658,6 +668,8 @@ reset-names = "phy", "por"; qcom,init-seq = /bits/ 8 <0x0 0x44 0x1 0x6b 0x2 0x24 0x3 0x13>; + interconnect-names = "ddr"; + interconnects = <&pnoc MASTER_USB_HS &bimc SLAVE_EBI_CH0>; }; }; }; @@ -751,6 +763,8 @@ reg = <0x00022000 0x200>; clocks = <&gcc GCC_PRNG_AHB_CLK>; clock-names = "core"; + interconnects = <&bimc MASTER_AMPSS_M0 &pnoc SLAVE_PRNG>; + interconnect-names = "cpu"; }; qfprom: qfprom@5c000 { @@ -850,6 +864,8 @@ power-domains = <&gcc OXILI_GDSC>; operating-points-v2 = <&gpu_opp_table>; iommus = <&gpu_iommu 1>, <&gpu_iommu 2>; + interconnects = <&bimc MASTER_GRAPHICS_3D &bimc SLAVE_EBI_CH0>; + interconnect-names = "gfx"; }; mdss: mdss@1a00000 { @@ -895,6 +911,9 @@ iommus = <&apps_iommu 4>; + interconnects = <&snoc MASTER_MDP_PORT0 &bimc SLAVE_EBI_CH0>; + interconnect-names = "port0"; + ports { #address-cells = <1>; #size-cells = <0>; @@ -1380,6 +1399,10 @@ clock-names = "core", "iface", "bus"; iommus = <&apps_iommu 5>; memory-region = <&venus_mem>; + interconnects = <&snoc MASTER_VIDEO_P0 &bimc SLAVE_EBI_CH0>, + <&snoc MASTER_MDP_PORT0 &bimc SLAVE_EBI_CH0>, + <&bimc MASTER_GRAPHICS_3D &bimc SLAVE_EBI_CH0>; + interconnect-names = "video", "mdp0", "gpu"; status = "okay"; video-decoder { diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 5b8aaf456016..d21335370f04 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -974,6 +974,8 @@ pinctrl-names = "default", "sleep"; pinctrl-0 = <&blsp2_i2c0_default>; pinctrl-1 = <&blsp2_i2c0_sleep>; + interconnects = <&pnoc MASTER_BLSP_2 &bimc SLAVE_EBI_CH0>; + interconnect-names = "ddr"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -986,6 +988,8 @@ clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; clock-names = "core", "iface"; + interconnects = <&pnoc MASTER_BLSP_2 &bimc SLAVE_EBI_CH0>; + interconnect-names = "ddr"; status = "disabled"; }; @@ -999,6 +1003,8 @@ pinctrl-names = "default", "sleep"; pinctrl-0 = <&blsp2_i2c1_default>; pinctrl-1 = <&blsp2_i2c1_sleep>; + interconnects = <&pnoc MASTER_BLSP_2 &bimc SLAVE_EBI_CH0>; + interconnect-names = "ddr"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1024,6 +1030,8 @@ pinctrl-names = "default", "sleep"; pinctrl-0 = <&blsp1_i2c2_default>; pinctrl-1 = <&blsp1_i2c2_sleep>; + interconnects = <&pnoc MASTER_BLSP_1 &bimc SLAVE_EBI_CH0>; + interconnect-names = "ddr"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1058,6 +1066,8 @@ clocks = <&gcc GCC_SDCC2_AHB_CLK>, <&gcc GCC_SDCC2_APPS_CLK>, <&xo_board>; + interconnects = <&pnoc MASTER_SDCC_2 &bimc SLAVE_EBI_CH0>; + interconnect-names = "sdhc-mem"; bus-width = <4>; }; @@ -1419,6 +1429,9 @@ assigned-clock-rates = <19200000>, <60000000>; power-domains = <&gcc USB30_GDSC>; + + interconnects = <&pnoc MASTER_USB_HS &bimc SLAVE_EBI_CH0>; + interconnect-names = "ddr"; status = "disabled"; dwc3@7600000 { @@ -1447,6 +1460,9 @@ <&gcc GCC_USB30_MASTER_CLK>; assigned-clock-rates = <19200000>, <120000000>; + interconnects = <&pnoc MASTER_USB3 &bimc SLAVE_EBI_CH0>; + interconnect-names = "ddr"; + power-domains = <&gcc USB30_GDSC>; status = "disabled"; @@ -1517,6 +1533,8 @@ "bus_master", "bus_slave"; + interconnects = <&a0noc MASTER_PCIE &bimc SLAVE_EBI_CH0>; + interconnect-names = "pcie-mem"; }; pcie1: pcie@608000 { @@ -1570,6 +1588,9 @@ "cfg", "bus_master", "bus_slave"; + + interconnects = <&a0noc MASTER_PCIE_1 &bimc SLAVE_EBI_CH0>; + interconnect-names = "pcie-mem"; }; pcie2: pcie@610000 { @@ -1622,6 +1643,9 @@ "cfg", "bus_master", "bus_slave"; + + interconnects = <&a0noc MASTER_PCIE_2 &bimc SLAVE_EBI_CH0>; + interconnect-names = "pcie-mem"; }; }; diff --git a/drivers/crypto/qcom-rng.c b/drivers/crypto/qcom-rng.c index e54249ccc009..5dc3679bf725 100644 --- a/drivers/crypto/qcom-rng.c +++ b/drivers/crypto/qcom-rng.c @@ -7,6 +7,7 @@ #include <linux/acpi.h> #include <linux/clk.h> #include <linux/crypto.h> +#include <linux/interconnect.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> @@ -30,6 +31,7 @@ struct qcom_rng { void __iomem *base; struct clk *clk; unsigned int skip_init; + struct icc_path *path; }; struct qcom_rng_ctx { @@ -75,6 +77,8 @@ static int qcom_rng_generate(struct crypto_rng *tfm, struct qcom_rng *rng = ctx->rng; int ret; + icc_set(rng->path, 0, 800); + ret = clk_prepare_enable(rng->clk); if (ret) return ret; @@ -86,6 +90,8 @@ static int qcom_rng_generate(struct crypto_rng *tfm, mutex_unlock(&rng->lock); clk_disable_unprepare(rng->clk); + icc_set(rng->path, 0, 0); + return 0; } @@ -164,6 +170,10 @@ static int qcom_rng_probe(struct platform_device *pdev) platform_set_drvdata(pdev, rng); mutex_init(&rng->lock); + rng->path = of_icc_get(&pdev->dev, "cpu"); + if (IS_ERR(rng->path)) + return PTR_ERR(rng->path); + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); rng->base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(rng->base)) diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c index bddd625ab91b..4fee0fc4b2e5 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c @@ -16,6 +16,7 @@ * this program. If not, see <http://www.gnu.org/licenses/>. */ +#include <linux/interconnect.h> #include <linux/of_irq.h> #include "msm_drv.h" @@ -1050,6 +1051,19 @@ static const struct component_ops mdp5_ops = { static int mdp5_dev_probe(struct platform_device *pdev) { + struct icc_path *path0 = of_icc_get(&pdev->dev, "port0"); + struct icc_path *path1 = of_icc_get(&pdev->dev, "port1"); + struct icc_path *path_rot = of_icc_get(&pdev->dev, "rotator"); + + if (IS_ERR(path0)) + return PTR_ERR(path0); + icc_set(path0, 0, 6400000); + + if (!IS_ERR(path1)) + icc_set(path1, 0, 6400000); + if (!IS_ERR(path_rot)) + icc_set(path_rot, 0, 6400000); + DBG(""); return component_add(&pdev->dev, &mdp5_ops); } diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 5e808cfec345..fc1121482309 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -85,6 +85,25 @@ static struct devfreq_dev_profile msm_devfreq_profile = { .get_cur_freq = msm_devfreq_get_cur_freq, }; +static int bs_init(struct msm_gpu *gpu) +{ + gpu->path = of_icc_get(&gpu->pdev->dev, "gfx"); + if (IS_ERR(gpu->path)) + return PTR_ERR(gpu->path); + + return 0; +} + +static void bs_set(struct msm_gpu *gpu, int idx) +{ + u32 peak_bw = 0; + + if (idx > 0) + peak_bw = 14432000; + + icc_set(gpu->path, 0, peak_bw); +} + static void msm_devfreq_init(struct msm_gpu *gpu) { /* We need target support to do devfreq */ @@ -174,6 +193,7 @@ static int enable_axi(struct msm_gpu *gpu) { if (gpu->ebi1_clk) clk_prepare_enable(gpu->ebi1_clk); + bs_set(gpu, 1); return 0; } @@ -181,6 +201,7 @@ static int disable_axi(struct msm_gpu *gpu) { if (gpu->ebi1_clk) clk_disable_unprepare(gpu->ebi1_clk); + bs_set(gpu, 0); return 0; } @@ -838,6 +859,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, gpu->num_perfcntrs = ARRAY_SIZE(gpu->last_cntrs); gpu->dev = drm; + gpu->pdev = pdev; gpu->funcs = funcs; gpu->name = name; @@ -877,6 +899,10 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, if (ret) goto fail; + ret = bs_init(gpu); + if (ret) + goto fail; + gpu->ebi1_clk = msm_clk_get(pdev, "bus"); DBG("ebi1_clk: %p", gpu->ebi1_clk); if (IS_ERR(gpu->ebi1_clk)) @@ -893,7 +919,6 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, if (IS_ERR(gpu->gpu_cx)) gpu->gpu_cx = NULL; - gpu->pdev = pdev; platform_set_drvdata(pdev, gpu); msm_devfreq_init(gpu); diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 9122ee6e55e4..5c734c71fcb9 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -20,6 +20,7 @@ #include <linux/clk.h> #include <linux/regulator/consumer.h> +#include <linux/interconnect.h> #include "msm_drv.h" #include "msm_fence.h" @@ -116,6 +117,7 @@ struct msm_gpu { int nr_clocks; struct clk *ebi1_clk, *core_clk, *rbbmtimer_clk; uint32_t fast_rate; + struct icc_path *path; /* Hang and Inactivity Detection: */ diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-qup.c index c86c3ae1318f..436747a74dc6 100644 --- a/drivers/i2c/busses/i2c-qup.c +++ b/drivers/i2c/busses/i2c-qup.c @@ -14,6 +14,7 @@ #include <linux/dma-mapping.h> #include <linux/err.h> #include <linux/i2c.h> +#include <linux/interconnect.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/module.h> @@ -280,6 +281,11 @@ struct qup_i2c_dev { void (*read_rx_fifo)(struct qup_i2c_dev *qup); /* function to write tags in tx fifo for i2c read transfer */ void (*write_rx_tags)(struct qup_i2c_dev *qup); + + /* frequency mode standard */ + u32 clk_freq; + /* interconnect path to scale according to bandwidth needs */ + struct icc_path *path; }; static irqreturn_t qup_i2c_interrupt(int irq, void *dev) @@ -1657,6 +1663,16 @@ static void qup_i2c_disable_clocks(struct qup_i2c_dev *qup) clk_disable_unprepare(qup->pclk); } +static void qup_i2c_enable_icc(struct qup_i2c_dev *qup) +{ + icc_set(qup->path, 0, qup->clk_freq / 8000); +} + +static void qup_i2c_disable_icc(struct qup_i2c_dev *qup) +{ + icc_set(qup->path, 0, 0); +} + static const struct acpi_device_id qup_i2c_acpi_match[] = { { "QCOM8010"}, { }, @@ -1784,6 +1800,10 @@ nodma: } ACPI_COMPANION_SET(&qup->adap.dev, ACPI_COMPANION(qup->dev)); } else { + qup->path = of_icc_get(qup->dev, "i2c-mem"); + if (IS_ERR(qup->path)) + return PTR_ERR(qup->path); + qup->clk = devm_clk_get(qup->dev, "core"); if (IS_ERR(qup->clk)) { dev_err(qup->dev, "Could not get core clock\n"); @@ -1795,6 +1815,8 @@ nodma: dev_err(qup->dev, "Could not get iface clock\n"); return PTR_ERR(qup->pclk); } + qup->clk_freq = clk_freq; + qup_i2c_enable_icc(qup); qup_i2c_enable_clocks(qup); src_clk_freq = clk_get_rate(qup->clk); } @@ -1927,6 +1949,7 @@ static int qup_i2c_remove(struct platform_device *pdev) disable_irq(qup->irq); qup_i2c_disable_clocks(qup); + icc_put(qup->path); i2c_del_adapter(&qup->adap); pm_runtime_disable(qup->dev); pm_runtime_set_suspended(qup->dev); @@ -1939,6 +1962,7 @@ static int qup_i2c_pm_suspend_runtime(struct device *device) struct qup_i2c_dev *qup = dev_get_drvdata(device); dev_dbg(device, "pm_runtime: suspending...\n"); + qup_i2c_disable_icc(qup); qup_i2c_disable_clocks(qup); return 0; } @@ -1948,6 +1972,7 @@ static int qup_i2c_pm_resume_runtime(struct device *device) struct qup_i2c_dev *qup = dev_get_drvdata(device); dev_dbg(device, "pm_runtime: resuming...\n"); + qup_i2c_enable_icc(qup); qup_i2c_enable_clocks(qup); return 0; } diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c index bb6add9d340e..93266f0e6ce4 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c @@ -14,6 +14,7 @@ */ #include <linux/clk.h> #include <linux/init.h> +#include <linux/interconnect.h> #include <linux/ioctl.h> #include <linux/list.h> #include <linux/module.h> @@ -248,6 +249,18 @@ static int venus_probe(struct platform_device *pdev) if (IS_ERR(core->base)) return PTR_ERR(core->base); + core->path = of_icc_get(dev, "video"); + if (IS_ERR(core->path)) + return PTR_ERR(core->path); + + core->path_mdp0 = of_icc_get(dev, "mdp0"); + if (IS_ERR(core->path_mdp0)) + return PTR_ERR(core->path_mdp0); + + core->path_gpu = of_icc_get(dev, "gpu"); + if (IS_ERR(core->path_gpu)) + return PTR_ERR(core->path_gpu); + core->irq = platform_get_irq(pdev, 0); if (core->irq < 0) return core->irq; @@ -337,6 +350,10 @@ static int venus_remove(struct platform_device *pdev) struct device *dev = core->dev; int ret; + icc_put(core->path); + icc_put(core->path_mdp0); + icc_put(core->path_gpu); + ret = pm_runtime_get_sync(dev); WARN_ON(ret < 0); @@ -360,6 +377,10 @@ static __maybe_unused int venus_runtime_suspend(struct device *dev) struct venus_core *core = dev_get_drvdata(dev); int ret; + icc_set(core->path, 0, 0); + icc_set(core->path_mdp0, 0, 1000); + icc_set(core->path_mdp1, 0, 1000); + ret = hfi_core_suspend(core); venus_clks_disable(core); @@ -372,6 +393,11 @@ static __maybe_unused int venus_runtime_resume(struct device *dev) struct venus_core *core = dev_get_drvdata(dev); int ret; + icc_set(core->path, 677600, 1331000); + icc_set(core->path_mdp0, 0, 6400000); + icc_set(core->path_mdp1, 0, 6400000); + icc_set(core->path_gpu, 1066000, 4264000); + ret = venus_clks_enable(core); if (ret) return ret; diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h index 2f02365f4818..9c8edd9b2b5e 100644 --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h @@ -150,6 +150,10 @@ struct venus_core { struct delayed_work work; struct venus_caps caps[MAX_CODEC_NUM]; unsigned int codecs_count; + struct icc_path *path; + struct icc_path *path_mdp0; + struct icc_path *path_mdp1; + struct icc_path *path_gpu; }; struct vdec_controls { diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c index dfbbbf0f746f..c77fd3590b54 100644 --- a/drivers/media/platform/qcom/venus/vdec.c +++ b/drivers/media/platform/qcom/venus/vdec.c @@ -834,6 +834,8 @@ static int vdec_start_streaming(struct vb2_queue *q, unsigned int count) if (ret) goto deinit_sess; + /* TODO: determine parameters and set interconnect bandwidth */ + ret = venus_helper_vb2_start_streaming(inst); if (ret) goto deinit_sess; diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 3cc8bfee6c18..a28f5fea611e 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -20,6 +20,7 @@ #include <linux/mmc/mmc.h> #include <linux/pm_runtime.h> #include <linux/slab.h> +#include <linux/interconnect.h> #include <linux/iopoll.h> #include <linux/regulator/consumer.h> @@ -258,6 +259,7 @@ struct sdhci_msm_host { bool mci_removed; const struct sdhci_msm_variant_ops *var_ops; const struct sdhci_msm_offset *offset; + struct icc_path *path; }; static const struct sdhci_msm_offset *sdhci_priv_msm_offset(struct sdhci_host *host) @@ -1627,6 +1629,30 @@ static const struct sdhci_msm_variant_info sdhci_msm_v5_var = { .offset = &sdhci_msm_v5_offset, }; +static int sdhci_msm_icc_update(struct sdhci_msm_host *msm_host) +{ + struct sdhci_host *host = dev_get_drvdata(&msm_host->pdev->dev); + struct mmc_host *mmc = host->mmc; + struct mmc_ios *ios = &mmc->ios; + unsigned char bus_width = 1 << ios->bus_width; + u32 bw; + + /* calculate the needed bandwidth */ + bw = host->clock; + + if (host->timing == MMC_TIMING_UHS_DDR50 || + host->timing == MMC_TIMING_MMC_DDR52) { + bw *= 2; + } + + if (bus_width == 4) + bw /= 2; + else if (bus_width == 1) + bw /= 8; + + return icc_set(msm_host->path, 0, bw / 1000); +} + static const struct of_device_id sdhci_msm_dt_match[] = { {.compatible = "qcom,sdhci-msm-v4", .data = &sdhci_msm_mci_var}, {.compatible = "qcom,sdhci-msm-v5", .data = &sdhci_msm_v5_var}, @@ -1698,16 +1724,27 @@ static int sdhci_msm_probe(struct platform_device *pdev) msm_host->saved_tuning_phase = INVALID_TUNING_PHASE; + msm_host->path = of_icc_get(&pdev->dev, "sdhc-mem"); + if (IS_ERR(msm_host->path)) { + ret = PTR_ERR(msm_host->path); + goto pltfm_free; + } + ret = sdhci_msm_icc_update(msm_host); + if (ret) { + dev_warn(&pdev->dev, "Interconnect setup failed (%d)\n", ret); + goto icc_disable; + } + /* Setup SDCC bus voter clock. */ msm_host->bus_clk = devm_clk_get(&pdev->dev, "bus"); if (!IS_ERR(msm_host->bus_clk)) { /* Vote for max. clk rate for max. performance */ ret = clk_set_rate(msm_host->bus_clk, INT_MAX); if (ret) - goto pltfm_free; + goto icc_disable; ret = clk_prepare_enable(msm_host->bus_clk); if (ret) - goto pltfm_free; + goto icc_disable; } /* Setup main peripheral bus clock */ @@ -1883,6 +1920,8 @@ clk_disable: bus_clk_disable: if (!IS_ERR(msm_host->bus_clk)) clk_disable_unprepare(msm_host->bus_clk); +icc_disable: + icc_put(msm_host->path); pltfm_free: sdhci_pltfm_free(pdev); return ret; @@ -1902,6 +1941,7 @@ static int sdhci_msm_remove(struct platform_device *pdev) pm_runtime_disable(&pdev->dev); pm_runtime_put_noidle(&pdev->dev); + icc_put(msm_host->path); clk_bulk_disable_unprepare(ARRAY_SIZE(msm_host->bulk_clks), msm_host->bulk_clks); if (!IS_ERR(msm_host->bus_clk)) @@ -1917,6 +1957,7 @@ static int sdhci_msm_runtime_suspend(struct device *dev) struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); + icc_set(msm_host->path, 0, 0); clk_bulk_disable_unprepare(ARRAY_SIZE(msm_host->bulk_clks), msm_host->bulk_clks); @@ -1929,6 +1970,7 @@ static int sdhci_msm_runtime_resume(struct device *dev) struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); + sdhci_msm_icc_update(msm_host); return clk_bulk_prepare_enable(ARRAY_SIZE(msm_host->bulk_clks), msm_host->bulk_clks); } diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig index 91b0194240a5..dd333d26f30d 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -136,6 +136,7 @@ config PCIE_QCOM bool "Qualcomm PCIe controller" depends on OF && (ARCH_QCOM || COMPILE_TEST) depends on PCI_MSI_IRQ_DOMAIN + depends on INTERCONNECT != m select PCIE_DW_HOST help Say Y here to enable PCIe controller support on Qualcomm SoCs. The diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 4352c1cb926d..8463afe14fe0 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -11,6 +11,7 @@ #include <linux/clk.h> #include <linux/delay.h> #include <linux/gpio/consumer.h> +#include <linux/interconnect.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/iopoll.h> @@ -110,6 +111,7 @@ struct qcom_pcie_resources_2_3_2 { struct clk *cfg_clk; struct clk *pipe_clk; struct regulator_bulk_data supplies[QCOM_PCIE_2_3_2_MAX_SUPPLY]; + struct icc_path *path; }; struct qcom_pcie_resources_2_4_0 { @@ -504,6 +506,10 @@ static int qcom_pcie_get_resources_2_3_2(struct qcom_pcie *pcie) if (ret) return ret; + res->path = of_icc_get(dev, "pcie-mem"); + if (IS_ERR(res->path)) + return PTR_ERR(res->path); + res->aux_clk = devm_clk_get(dev, "aux"); if (IS_ERR(res->aux_clk)) return PTR_ERR(res->aux_clk); @@ -534,6 +540,7 @@ static void qcom_pcie_deinit_2_3_2(struct qcom_pcie *pcie) clk_disable_unprepare(res->aux_clk); regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies); + icc_put(res->path); } static void qcom_pcie_post_deinit_2_3_2(struct qcom_pcie *pcie) @@ -581,6 +588,8 @@ static int qcom_pcie_init_2_3_2(struct qcom_pcie *pcie) goto err_slave_clk; } + icc_set(res->path, 500, 800); + /* enable PCIe clocks and resets */ val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); val &= ~BIT(0); diff --git a/drivers/phy/qualcomm/phy-qcom-usb-hs.c b/drivers/phy/qualcomm/phy-qcom-usb-hs.c index abbbe75070da..6d0ba6a4cdf6 100644 --- a/drivers/phy/qualcomm/phy-qcom-usb-hs.c +++ b/drivers/phy/qualcomm/phy-qcom-usb-hs.c @@ -15,6 +15,7 @@ #include <linux/reset.h> #include <linux/extcon.h> #include <linux/notifier.h> +#include <linux/interconnect.h> #define ULPI_PWR_CLK_MNG_REG 0x88 # define ULPI_PWR_OTG_COMP_DISABLE BIT(0) @@ -39,6 +40,7 @@ struct qcom_usb_hs_phy { struct reset_control *reset; struct ulpi_seq *init_seq; struct extcon_dev *vbus_edev; + struct icc_path *path; struct notifier_block vbus_notify; }; @@ -155,6 +157,8 @@ static int qcom_usb_hs_phy_power_on(struct phy *phy) goto err_ulpi; } + icc_set(uphy->path, 80000, 6000); + if (uphy->vbus_edev) { state = extcon_get_state(uphy->vbus_edev, EXTCON_USB); /* setup initial state */ @@ -182,6 +186,8 @@ static int qcom_usb_hs_phy_power_off(struct phy *phy) { struct qcom_usb_hs_phy *uphy = phy_get_drvdata(phy); + icc_set(uphy->path, 0, 0); + regulator_disable(uphy->v3p3); regulator_disable(uphy->v1p8); clk_disable_unprepare(uphy->sleep_clk); @@ -250,6 +256,10 @@ static int qcom_usb_hs_phy_probe(struct ulpi *ulpi) uphy->reset = NULL; } + uphy->path = of_icc_get(&ulpi->dev, "ddr"); + if (IS_ERR(uphy->path)) + return PTR_ERR(uphy->path); + uphy->phy = devm_phy_create(&ulpi->dev, ulpi->dev.of_node, &qcom_usb_hs_phy_ops); if (IS_ERR(uphy->phy)) diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c index 6c1d5ea6a776..67bfa76d3583 100644 --- a/drivers/scsi/ufs/ufs-qcom.c +++ b/drivers/scsi/ufs/ufs-qcom.c @@ -12,6 +12,7 @@ * */ +#include <linux/interconnect.h> #include <linux/time.h> #include <linux/of.h> #include <linux/platform_device.h> @@ -889,6 +890,7 @@ static int ufs_qcom_bus_register(struct ufs_qcom_host *host) } #endif /* CONFIG_MSM_BUS_SCALING */ + static void ufs_qcom_dev_ref_clk_ctrl(struct ufs_qcom_host *host, bool enable) { if (host->dev_ref_clk_ctrl_mmio && @@ -1676,6 +1678,17 @@ static int ufs_qcom_probe(struct platform_device *pdev) { int err; struct device *dev = &pdev->dev; + struct icc_path *path = of_icc_get(dev, "ddr"); + struct icc_path *path_cfg = of_icc_get(dev, "cfg"); + + if (IS_ERR(path)) + return PTR_ERR(path); + + if (IS_ERR(path_cfg)) + return PTR_ERR(path_cfg); + + icc_set(path, 4096000, 0); + icc_set(path_cfg, 1000, 0); /* Perform generic probe */ err = ufshcd_pltfrm_init(pdev, &ufs_hba_qcom_vops); |