diff options
| author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2020-11-12 14:27:44 +0530 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-11-24 10:30:25 -0800 |
| commit | 59b7a62082281acdd7140ec1ce8c9ae8e73090b1 (patch) | |
| tree | 19aead411bc003fbfc9b0cdbb7301b2762df854e | |
| parent | 90144fb489d2ab1d299c386a81f6a22c434710e3 (diff) | |
ARM: dts: qcom: sdx55: Add QPIC NAND support
Add qpic_nand node to support QPIC NAND controller on SDX55 SoC.
FIXME: Remove the fixed clock and source real clock.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom-sdx55.dtsi | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index 83d17fa25033..edef803da184 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -45,6 +45,12 @@ #clock-cells = <0>; clock-frequency = <400000000>; }; + + nand_clk_dummy: nand-clk-dummy { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32000>; + }; }; cpus { @@ -191,6 +197,22 @@ status = "disabled"; }; + qpic_nand: nand@1b30000 { + compatible = "qcom,sdx55-nand"; + reg = <0x01b30000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rpmhcc RPMH_QPIC_CLK>, + <&nand_clk_dummy>; + clock-names = "core", "aon"; + + dmas = <&qpic_bam 0>, + <&qpic_bam 1>, + <&qpic_bam 2>; + dma-names = "tx", "rx", "cmd"; + status = "disabled"; + }; + tcsr_mutex_block: syscon@1f40000 { compatible = "syscon"; reg = <0x1f40000 0x20000>; |