diff options
| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2021-03-14 04:52:34 +0300 |
|---|---|---|
| committer | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2021-03-16 01:05:59 +0300 |
| commit | abff9e8766049c839d74629216d8603a6331a14a (patch) | |
| tree | d1de59798fc59f3408d0a541d214039904aa1eed | |
| parent | 2116a80e2dae8c310b9a6692826d2e09ee5582ae (diff) | |
drm/msm/dpu1: improve support for active CTLs
- Support setting master interface if several INTFs are to be handled by
a single CTL
- Support setting handling several MERGE_3D instances using a single
CTL.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 13 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 2 |
2 files changed, 14 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c index 8981cfa9dbc3..e35f4f3591be 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -487,6 +487,7 @@ static void dpu_hw_ctl_intf_cfg_v1(struct dpu_hw_ctl *ctx, struct dpu_hw_blk_reg_map *c = &ctx->hw; u32 intf_active = 0; u32 mode_sel = 0; + u32 merge_3d_active = 0; if (cfg->intf_mode_sel == DPU_CTL_MODE_SEL_CMD) mode_sel |= BIT(17); @@ -494,9 +495,19 @@ static void dpu_hw_ctl_intf_cfg_v1(struct dpu_hw_ctl *ctx, intf_active = DPU_REG_READ(c, CTL_INTF_ACTIVE); intf_active |= BIT(cfg->intf - INTF_0); + merge_3d_active = DPU_REG_READ(c, CTL_MERGE_3D_ACTIVE); + if (cfg->merge_3d) + merge_3d_active |= BIT(cfg->merge_3d - MERGE_3D_0); + DPU_REG_WRITE(c, CTL_TOP, mode_sel); DPU_REG_WRITE(c, CTL_INTF_ACTIVE, intf_active); - DPU_REG_WRITE(c, CTL_MERGE_3D_ACTIVE, BIT(cfg->merge_3d - MERGE_3D_0)); + if (cfg->intf_master) + DPU_REG_WRITE(c, CTL_INTF_MASTER, BIT(cfg->intf_master - INTF_0)); + DPU_REG_WRITE(c, CTL_MERGE_3D_ACTIVE, merge_3d_active); + if (cfg->intf_master) + DPU_ERROR("ACTIVE: %x %x %lx\n", intf_active, merge_3d_active, BIT(cfg->intf_master - INTF_0)); + else + DPU_ERROR("ACTIVE: %x %x\n", intf_active, merge_3d_active); } static void dpu_hw_ctl_intf_cfg(struct dpu_hw_ctl *ctx, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h index e93a42ab60b1..bd41eaf711f0 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h @@ -36,6 +36,7 @@ struct dpu_hw_stage_cfg { /** * struct dpu_hw_intf_cfg :Describes how the DPU writes data to output interface * @intf : Interface id + * @intf_master: Master interface id in the dual pipe topology * @mode_3d: 3d mux configuration * @merge_3d: 3d merge block used * @intf_mode_sel: Interface mode, cmd / vid @@ -43,6 +44,7 @@ struct dpu_hw_stage_cfg { */ struct dpu_hw_intf_cfg { enum dpu_intf intf; + enum dpu_intf intf_master; enum dpu_3d_blend_mode mode_3d; enum dpu_merge_3d merge_3d; enum dpu_ctl_mode_sel intf_mode_sel; |