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| author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2020-12-18 21:31:15 +0530 |
|---|---|---|
| committer | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2021-03-28 11:39:56 +0530 |
| commit | b375a7a8018086c93445ad1dc15bd18cc79c5893 (patch) | |
| tree | 0484478c513b8855543daf2876808911a394cee0 | |
| parent | e6506776cbe0e7b405862d670518713f922dde5f (diff) | |
ARM: configs: qcom_defconfig: Enable SDX55 A7 PLL and APCS clock driver
Enable A7 PLL driver and APCS clock driver on SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| -rw-r--r-- | arch/arm/configs/qcom_defconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig index 0b9da27f923a..02f6185f31a6 100644 --- a/arch/arm/configs/qcom_defconfig +++ b/arch/arm/configs/qcom_defconfig @@ -215,6 +215,8 @@ CONFIG_DMADEVICES=y CONFIG_QCOM_BAM_DMA=y CONFIG_STAGING=y CONFIG_COMMON_CLK_QCOM=y +CONFIG_QCOM_A7PLL=y +CONFIG_QCOM_CLK_APCS_SDX55=y CONFIG_QCOM_CLK_RPM=y CONFIG_QCOM_CLK_RPMH=y CONFIG_QCOM_CLK_SMD_RPM=y |