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authorBryan O'Donoghue <bryan.odonoghue@linaro.org>2022-05-09 16:51:44 +0100
committerBryan O'Donoghue <bryan.odonoghue@linaro.org>2022-06-30 05:39:19 +0100
commitf8841666acdc231b71823a73c21fea9dd6f44a7e (patch)
treef63587ce11fe7c4dd2d2b00708ea3c32903be636
parent6b0e584cbd775023aed5509694eddef579bd3487 (diff)
arm64: dts: Add msm8939 venus encoder/decoder hardware
The msm9836/msm8939 has two available encoder/decoder capable blocks. In upstream we support a dedicated encoder and a dedicated decoder. As far as I understand it, it would be feasible to have two decoders or two encoders for parallel work like say decoding a video stream to each of the DSI outputs. Here though we add-in as per the upstream standard of fixed encoder and fixed decoder at the first and second co-processor blocks. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
-rw-r--r--arch/arm64/boot/dts/qcom/msm8939.dtsi28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8939.dtsi b/arch/arm64/boot/dts/qcom/msm8939.dtsi
index 7ed0fb5c7b39..c0ead61e0de1 100644
--- a/arch/arm64/boot/dts/qcom/msm8939.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8939.dtsi
@@ -1377,6 +1377,34 @@
};
};
+ venus: video-codec@1d00000 {
+ compatible = "qcom,msm8939-venus";
+ reg = <0x01d00000 0xff000>;
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
+ <&gcc GCC_VENUS0_AHB_CLK>,
+ <&gcc GCC_VENUS0_AXI_CLK>;
+ clock-names = "core", "iface", "bus";
+ power-domains = <&gcc VENUS_GDSC>;
+ iommus = <&apps_iommu 5>;
+ memory-region = <&venus_mem>;
+ status = "okay";
+
+ video-decoder {
+ compatible = "venus-decoder";
+ clocks = <&gcc GCC_VENUS0_CORE0_VCODEC0_CLK>;
+ clock-names = "core";
+ power-domains = <&gcc VENUS_CORE0_GDSC>;
+ };
+
+ video-encoder {
+ compatible = "venus-encoder";
+ clocks = <&gcc GCC_VENUS0_CORE1_VCODEC0_CLK>;
+ clock-names = "core";
+ power-domains = <&gcc VENUS_CORE1_GDSC>;
+ };
+ };
+
apps_iommu: iommu@1ef0000 {
compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
reg = <0x01ef0000 0x3000>;