diff options
author | Linaro CI <ci_notify@linaro.org> | 2023-04-16 22:47:14 +0000 |
---|---|---|
committer | Linaro CI <ci_notify@linaro.org> | 2023-04-16 22:47:14 +0000 |
commit | b8253ea3c7c796151abfeef1e696ede766ed3e2e (patch) | |
tree | be506f3b21a8aa6d363055526ea07bd52423a34c | |
parent | 6a8f57ae2eb07ab39a6f0ccad60c760743051026 (diff) | |
parent | 89ff07c631e93d9191799bf4fc26781825fc1601 (diff) |
Merge remote-tracking branch 'msm8996/tracking-qcomlt-msm8996' into integration-linux-qcomlt
-rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996.dtsi | 50 | ||||
-rw-r--r-- | drivers/clk/qcom/clk-cbf-8996.c | 141 | ||||
-rw-r--r-- | drivers/ufs/host/ufs-qcom.c | 26 |
3 files changed, 216 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 905678e7175d..d718e9fe6f39 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -49,6 +49,7 @@ cpu-idle-states = <&CPU_SLEEP_0>; capacity-dmips-mhz = <1024>; clocks = <&kryocc 0>; + interconnects = <&cbf 0 &cbf 1>; operating-points-v2 = <&cluster0_opp>; #cooling-cells = <2>; next-level-cache = <&L2_0>; @@ -66,6 +67,7 @@ cpu-idle-states = <&CPU_SLEEP_0>; capacity-dmips-mhz = <1024>; clocks = <&kryocc 0>; + interconnects = <&cbf 0 &cbf 1>; operating-points-v2 = <&cluster0_opp>; #cooling-cells = <2>; next-level-cache = <&L2_0>; @@ -79,6 +81,7 @@ cpu-idle-states = <&CPU_SLEEP_0>; capacity-dmips-mhz = <1024>; clocks = <&kryocc 1>; + interconnects = <&cbf 0 &cbf 1>; operating-points-v2 = <&cluster1_opp>; #cooling-cells = <2>; next-level-cache = <&L2_1>; @@ -96,6 +99,7 @@ cpu-idle-states = <&CPU_SLEEP_0>; capacity-dmips-mhz = <1024>; clocks = <&kryocc 1>; + interconnects = <&cbf 0 &cbf 1>; operating-points-v2 = <&cluster1_opp>; #cooling-cells = <2>; next-level-cache = <&L2_1>; @@ -147,91 +151,109 @@ opp-hz = /bits/ 64 <307200000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-422400000 { opp-hz = /bits/ 64 <422400000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-480000000 { opp-hz = /bits/ 64 <480000000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-556800000 { opp-hz = /bits/ 64 <556800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-652800000 { opp-hz = /bits/ 64 <652800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <384000>; }; opp-729600000 { opp-hz = /bits/ 64 <729600000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <460800>; }; opp-844800000 { opp-hz = /bits/ 64 <844800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <537600>; }; opp-960000000 { opp-hz = /bits/ 64 <960000000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <672000>; }; opp-1036800000 { opp-hz = /bits/ 64 <1036800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <672000>; }; opp-1113600000 { opp-hz = /bits/ 64 <1113600000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <825600>; }; opp-1190400000 { opp-hz = /bits/ 64 <1190400000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <825600>; }; opp-1228800000 { opp-hz = /bits/ 64 <1228800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <902400>; }; opp-1324800000 { opp-hz = /bits/ 64 <1324800000>; opp-supported-hw = <0xd>; clock-latency-ns = <200000>; + opp-peak-kBps = <1056000>; }; opp-1363200000 { opp-hz = /bits/ 64 <1363200000>; opp-supported-hw = <0x2>; clock-latency-ns = <200000>; + opp-peak-kBps = <1132800>; }; opp-1401600000 { opp-hz = /bits/ 64 <1401600000>; opp-supported-hw = <0xd>; clock-latency-ns = <200000>; + opp-peak-kBps = <1132800>; }; opp-1478400000 { opp-hz = /bits/ 64 <1478400000>; opp-supported-hw = <0x9>; clock-latency-ns = <200000>; + opp-peak-kBps = <1190400>; }; opp-1497600000 { opp-hz = /bits/ 64 <1497600000>; opp-supported-hw = <0x04>; clock-latency-ns = <200000>; + opp-peak-kBps = <1305600>; }; opp-1593600000 { opp-hz = /bits/ 64 <1593600000>; opp-supported-hw = <0x9>; clock-latency-ns = <200000>; + opp-peak-kBps = <1382400>; }; }; @@ -245,136 +267,163 @@ opp-hz = /bits/ 64 <307200000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-403200000 { opp-hz = /bits/ 64 <403200000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-480000000 { opp-hz = /bits/ 64 <480000000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-556800000 { opp-hz = /bits/ 64 <556800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-652800000 { opp-hz = /bits/ 64 <652800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-729600000 { opp-hz = /bits/ 64 <729600000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-806400000 { opp-hz = /bits/ 64 <806400000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <384000>; }; opp-883200000 { opp-hz = /bits/ 64 <883200000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <460800>; }; opp-940800000 { opp-hz = /bits/ 64 <940800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <537600>; }; opp-1036800000 { opp-hz = /bits/ 64 <1036800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <595200>; }; opp-1113600000 { opp-hz = /bits/ 64 <1113600000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <672000>; }; opp-1190400000 { opp-hz = /bits/ 64 <1190400000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <672000>; }; opp-1248000000 { opp-hz = /bits/ 64 <1248000000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <748800>; }; opp-1324800000 { opp-hz = /bits/ 64 <1324800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <825600>; }; opp-1401600000 { opp-hz = /bits/ 64 <1401600000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <902400>; }; opp-1478400000 { opp-hz = /bits/ 64 <1478400000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <979200>; }; opp-1555200000 { opp-hz = /bits/ 64 <1555200000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <1056000>; }; opp-1632000000 { opp-hz = /bits/ 64 <1632000000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <1190400>; }; opp-1708800000 { opp-hz = /bits/ 64 <1708800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <1228800>; }; opp-1785600000 { opp-hz = /bits/ 64 <1785600000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <1305600>; }; opp-1804800000 { opp-hz = /bits/ 64 <1804800000>; opp-supported-hw = <0xe>; clock-latency-ns = <200000>; + opp-peak-kBps = <1305600>; }; opp-1824000000 { opp-hz = /bits/ 64 <1824000000>; opp-supported-hw = <0x1>; clock-latency-ns = <200000>; + opp-peak-kBps = <1382400>; }; opp-1900800000 { opp-hz = /bits/ 64 <1900800000>; opp-supported-hw = <0x4>; clock-latency-ns = <200000>; + opp-peak-kBps = <1305600>; }; opp-1920000000 { opp-hz = /bits/ 64 <1920000000>; opp-supported-hw = <0x1>; clock-latency-ns = <200000>; + opp-peak-kBps = <1459200>; }; opp-1996800000 { opp-hz = /bits/ 64 <1996800000>; opp-supported-hw = <0x1>; clock-latency-ns = <200000>; + opp-peak-kBps = <1593600>; }; opp-2073600000 { opp-hz = /bits/ 64 <2073600000>; opp-supported-hw = <0x1>; clock-latency-ns = <200000>; + opp-peak-kBps = <1593600>; }; opp-2150400000 { opp-hz = /bits/ 64 <2150400000>; opp-supported-hw = <0x1>; clock-latency-ns = <200000>; + opp-peak-kBps = <1593600>; }; }; @@ -3577,6 +3626,7 @@ reg = <0x09a11000 0x10000>; clocks = <&rpmcc RPM_SMD_XO_A_CLK_SRC>, <&apcs_glb>; #clock-cells = <0>; + #interconnect-cells = <1>; }; intc: interrupt-controller@9bc0000 { diff --git a/drivers/clk/qcom/clk-cbf-8996.c b/drivers/clk/qcom/clk-cbf-8996.c index cfd567636f4e..d0bf266639d5 100644 --- a/drivers/clk/qcom/clk-cbf-8996.c +++ b/drivers/clk/qcom/clk-cbf-8996.c @@ -5,6 +5,7 @@ #include <linux/bitfield.h> #include <linux/clk.h> #include <linux/clk-provider.h> +#include <linux/interconnect-provider.h> #include <linux/of.h> #include <linux/module.h> #include <linux/platform_device.h> @@ -223,6 +224,133 @@ static const struct regmap_config cbf_msm8996_regmap_config = { .val_format_endian = REGMAP_ENDIAN_LITTLE, }; +#ifdef CONFIG_INTERCONNECT +struct qcom_msm8996_cbf_icc_provider { + struct icc_provider provider; + struct clk *clk; +}; + +#define to_qcom_cbf_provider(_provider) \ + container_of(_provider, struct qcom_msm8996_cbf_icc_provider, provider) + +enum { + CBF_MASTER_NODE = 2000, + CBF_SLAVE_NODE +}; + +#define CBF_NUM_NODES 2 + +static int qcom_msm8996_cbf_set(struct icc_node *src, struct icc_node *dst) +{ + struct qcom_msm8996_cbf_icc_provider *qp; + + qp = to_qcom_cbf_provider(src->provider); + + return clk_set_rate(qp->clk, icc_units_to_bps(dst->peak_bw)); +} + +static int qcom_msm8996_cbf_icc_get_bw(struct icc_node *node, u32 *avg, u32 *peak) +{ + struct qcom_msm8996_cbf_icc_provider *qp; + + qp = to_qcom_cbf_provider(node->provider); + *peak = clk_get_rate(qp->clk) / 1000ULL; + + return 0; +} + +static int qcom_msm8996_cbf_icc_register(struct platform_device *pdev, struct clk_hw *cbf_hw) +{ + struct device *dev = &pdev->dev; + struct qcom_msm8996_cbf_icc_provider *qp; + struct icc_provider *provider; + struct icc_onecell_data *data; + struct icc_node *node; + struct clk *clk; + int ret; + + clk = devm_clk_hw_get_clk(dev, cbf_hw, "cbf"); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + data = devm_kzalloc(dev, struct_size(data, nodes, CBF_NUM_NODES), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->num_nodes = CBF_NUM_NODES; + + qp = devm_kzalloc(dev, sizeof(*qp), GFP_KERNEL); + if (!qp) + return -ENOMEM; + + qp->clk = clk; + + provider = &qp->provider; + provider->dev = dev; + provider->get_bw = qcom_msm8996_cbf_icc_get_bw; + provider->set = qcom_msm8996_cbf_set; + provider->aggregate = icc_std_aggregate; + provider->xlate = of_icc_xlate_onecell; + INIT_LIST_HEAD(&provider->nodes); + provider->data = data; + + ret = icc_provider_add(provider); + if (ret) { + dev_err(dev, "error adding interconnect provider\n"); + return ret; + } + + node = icc_node_create(CBF_MASTER_NODE); + if (IS_ERR(node)) { + ret = PTR_ERR(node); + goto err; + } + + node->name = "cbf_master"; + icc_node_add(node, provider); + icc_link_create(node, CBF_SLAVE_NODE); + data->nodes[0] = node; + + node = icc_node_create(CBF_SLAVE_NODE); + if (IS_ERR(node)) { + ret = PTR_ERR(node); + goto err; + } + + node->name = "cbf_slave"; + icc_node_add(node, provider); + data->nodes[1] = node; + + platform_set_drvdata(pdev, provider); + + return 0; + +err: + icc_nodes_remove(provider); + icc_provider_del(provider); + + return ret; +} + +static int qcom_msm8996_cbf_icc_remove(struct platform_device *pdev) +{ + struct icc_provider *provider = platform_get_drvdata(pdev); + + icc_nodes_remove(provider); + icc_provider_del(provider); + + return 0; +} +#else +static int qcom_msm8996_cbf_icc_register(struct platform_device *pdev) +{ + dev_warn(&pdev->dev, "interconnects support is disabled, CBF clock is fixed\n"); + + return 0; +} +#define qcom_msm8996_cbf_icc_remove(pdev) (0) +#endif + static int qcom_msm8996_cbf_probe(struct platform_device *pdev) { void __iomem *base; @@ -281,7 +409,16 @@ static int qcom_msm8996_cbf_probe(struct platform_device *pdev) if (ret) return ret; - return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, &cbf_mux.clkr.hw); + ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, &cbf_mux.clkr.hw); + if (ret) + return ret; + + return qcom_msm8996_cbf_icc_register(pdev, &cbf_mux.clkr.hw); +} + +static int qcom_msm8996_cbf_remove(struct platform_device *pdev) +{ + return qcom_msm8996_cbf_icc_remove(pdev); } static const struct of_device_id qcom_msm8996_cbf_match_table[] = { @@ -292,9 +429,11 @@ MODULE_DEVICE_TABLE(of, qcom_msm8996_cbf_match_table); static struct platform_driver qcom_msm8996_cbf_driver = { .probe = qcom_msm8996_cbf_probe, + .remove = qcom_msm8996_cbf_remove, .driver = { .name = "qcom-msm8996-cbf", .of_match_table = qcom_msm8996_cbf_match_table, + .sync_state = icc_sync_state, }, }; diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index a02cd866e2f8..bae1eeba4d7d 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -14,6 +14,7 @@ #include <linux/gpio/consumer.h> #include <linux/reset-controller.h> #include <linux/devfreq.h> +#include <linux/interconnect.h> #include <ufs/ufshcd.h> #include "ufshcd-pltfrm.h" @@ -936,6 +937,23 @@ static const struct reset_control_ops ufs_qcom_reset_ops = { .deassert = ufs_qcom_reset_deassert, }; +static int ufs_qcom_icc_init(struct device *dev, char *pathname, + u32 avg_bw, u32 peak_bw) +{ + struct icc_path *path; + int ret; + + path = devm_of_icc_get(dev, pathname); + if (IS_ERR(path)) + return dev_err_probe(dev, PTR_ERR(path), "failed to acquire interconnect path\n"); + + ret = icc_set_bw(path, avg_bw, peak_bw); + if (ret < 0) + return dev_err_probe(dev, ret, "failed to set bandwidth request\n"); + + return 0; +} + /** * ufs_qcom_init - bind phy with controller * @hba: host controller instance @@ -1002,6 +1020,14 @@ static int ufs_qcom_init(struct ufs_hba *hba) ufs_qcom_get_controller_revision(hba, &host->hw_ver.major, &host->hw_ver.minor, &host->hw_ver.step); + err = ufs_qcom_icc_init(dev, "ufs-ddr", 4096000, 0); + if (err) + goto out_variant_clear; + + err = ufs_qcom_icc_init(dev, "cpu-ufs", 1000, 0); + if (err) + goto out_variant_clear; + /* * for newer controllers, device reference clock control bit has * moved inside UFS controller register address space itself. |