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2021-12-18Merge remote-tracking branch ↵integration-linux-qcomlt-20211219-224104-v5.16-rc5-308-g827adb81d14e2Linaro CI
'sm8450-defconfig/tracking-qcomlt-sm8450-defconfig' into integration-linux-qcomlt # Conflicts: # arch/arm64/configs/defconfig
2021-12-18Merge remote-tracking branch 'sm8450-dts/tracking-qcomlt-sm8450-dts' into ↵Linaro CI
integration-linux-qcomlt
2021-12-18Merge remote-tracking branch 'sm8450-drivers/tracking-qcomlt-sm8450-drivers' ↵Linaro CI
into integration-linux-qcomlt
2021-12-18Merge remote-tracking branch ↵Linaro CI
'sa8155p-adp-dts-drivers/tracking-qcomlt-sa8155p-dts-drivers' into integration-linux-qcomlt
2021-12-18Merge remote-tracking branch 'sm8350-drivers/tracking-qcomlt-sm8350-drivers' ↵Linaro CI
into integration-linux-qcomlt # Conflicts: # Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt
2021-12-18Merge remote-tracking branch 'sdx55-dts/tracking-qcomlt-sdx55-dts' into ↵Linaro CI
integration-linux-qcomlt
2021-12-18Merge remote-tracking branch 'sdx55-drivers/tracking-qcomlt-sdx55-drivers' ↵Linaro CI
into integration-linux-qcomlt # Conflicts: # scripts/mod/file2alias.c
2021-12-18Merge remote-tracking branch 'lt9611-fix-4k/tracking-qcomlt-lt9611-fix-4k' ↵Linaro CI
into integration-linux-qcomlt
2021-12-18Merge remote-tracking branch ↵Linaro CI
'ov8856-remove-mode/tracking-qcomlt-ov8856-remove-mode' into integration-linux-qcomlt # Conflicts: # drivers/media/i2c/ov8856.c
2021-12-18Merge remote-tracking branch 'gsi/tracking-qcomlt-gsi' into ↵Linaro CI
integration-linux-qcomlt
2021-12-18Merge remote-tracking branch 'interconnect/tracking-qcomlt-interconnect' ↵Linaro CI
into integration-linux-qcomlt # Conflicts: # arch/arm64/configs/defconfig
2021-12-18Merge remote-tracking branch 'db820c-fixes/db820c/5.7-rc1' into ↵Linaro CI
integration-linux-qcomlt # Conflicts: # drivers/clk/qcom/Kconfig # drivers/clk/qcom/Makefile # drivers/clk/qcom/clk-cpu-8996.c # drivers/soc/qcom/Kconfig # drivers/soc/qcom/kryo-l2-accessors.c
2021-12-18Merge remote-tracking branch 'sm8250-typec/tracking-qcomlt-sm8250-typec' ↵Linaro CI
into integration-linux-qcomlt # Conflicts: # arch/arm64/configs/defconfig # drivers/usb/typec/mux/Kconfig # drivers/usb/typec/mux/Makefile
2021-12-18Merge remote-tracking branch 'sm8250-gdsc/tracking-qcomlt-sm8250-gdsc' into ↵Linaro CI
integration-linux-qcomlt # Conflicts: # drivers/clk/qcom/gdsc.h
2021-12-18Merge remote-tracking branch 'sm8250/tracking-qcomlt-sm8250' into ↵Linaro CI
integration-linux-qcomlt
2021-12-18Merge remote-tracking branch 'qca6390/tracking-qcomlt-qca6390' into ↵Linaro CI
integration-linux-qcomlt # Conflicts: # drivers/net/wireless/ath/ath11k/dp_rx.c # drivers/net/wireless/ath/ath11k/wmi.c
2021-12-18Merge remote-tracking branch 'lpg/tracking-qcomlt-lpg' into ↵Linaro CI
integration-linux-qcomlt
2021-12-18Merge remote-tracking branch 'fixes-lumag/tracking-qcomlt-fixes-lumag' into ↵Linaro CI
integration-linux-qcomlt
2021-12-18Merge remote-tracking branch ↵Linaro CI
'qcs404-defconfig/tracking-qcomlt-qcs404-defconfig' into integration-linux-qcomlt
2021-12-18Merge remote-tracking branch 'sdm845-dp/tracking-qcomlt-sdm845-dp' into ↵Linaro CI
integration-linux-qcomlt # Conflicts: # arch/arm64/boot/dts/qcom/sdm845-db845c.dts # arch/arm64/boot/dts/qcom/sdm845.dtsi # drivers/phy/qualcomm/phy-qcom-qmp.c
2021-12-18Merge remote-tracking branch 'sdm845-usb/tracking-qcomlt-usb-renesas' into ↵Linaro CI
integration-linux-qcomlt # Conflicts: # drivers/usb/host/xhci-pci-renesas.c
2021-12-18Merge remote-tracking branch 'bus-scaling/icc-testing' into ↵Linaro CI
integration-linux-qcomlt
2021-12-18Merge remote-tracking branch ↵Linaro CI
'distro.config/tracking-qcomlt-config-fragments' into integration-linux-qcomlt
2021-12-18Merge remote-tracking branch ↵Linaro CI
'arm64-defconfig/tracking-qcomlt-arm64-defconfig' into integration-linux-qcomlt
2021-12-18Merge remote-tracking branch 'drm-msm/tracking-qcomlt-drm-msm' into ↵Linaro CI
integration-linux-qcomlt
2021-12-18Merge remote-tracking branch 'audio/tracking-qcomlt-audio' into ↵Linaro CI
integration-linux-qcomlt
2021-12-18Merge remote-tracking branch 'wcd9335/tracking-qcomlt-wcd9335' into ↵Linaro CI
integration-linux-qcomlt
2021-12-18HACK: arm64: dts: qcom: sm8450-qrd: enable wlan device found on PCIe0Dmitry Baryshkov
While we do not support proper power sequencing for the WiFi+BT chips, hack this by daisy chaining all required voltage regulators. This makes regulator core switch them on one by one in the correct order. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18arm64: dts: qcom: sm8450-qrd: tighten voltage regulatorsDmitry Baryshkov
Tighten voltage regulators constraints according to the attached WLAN needs. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18arm64: dts: qcom: sm8450-qrd: enable PCIe0 hostDmitry Baryshkov
Enable PCIe0 host on SM8450 QRD device. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18arm64: dts: qcom: sm8450-qrd: enable PCIe0 PHY deviceDmitry Baryshkov
Enable PCIe0 PHY on the SM8450 QRD device. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18arm64: dts: qcom: sm8450: add PCIe1 root deviceDmitry Baryshkov
Add device tree node for the second PCIe host found on the Qualcomm SM8450 platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18arm64: dts: qcom: sm8450: add PCIe1 PHY nodeDmitry Baryshkov
Add device tree node for the second PCIe PHY device found on the Qualcomm SM8450 platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18arm64: dts: qcom: sm8450: add PCIe0 RC deviceDmitry Baryshkov
Add device tree node for the first PCIe host found on the Qualcomm SM8450 platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-12-18arm64: dts: qcom: sm8450: add PCIe0 PHY nodeDmitry Baryshkov
Add device tree node for the first PCIe PHY device found on the Qualcomm SM8450 platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18arm64: dts: qcom: add ITS device tree nodeDmitry Baryshkov
Add device tree node corresponding to the ITS part of GICv3. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18phy: qcom-qmp: Add SM8450 PCIe1 PHY supportDmitry Baryshkov
There are two different PCIe PHYs on SM8450, one having one lane (v5) and another with two lanes (v5.20). This commit adds support for the second PCIe phy. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18phy: qcom-qmp: Add SM8450 PCIe0 PHY supportDmitry Baryshkov
There are two different PCIe PHYs on SM8450, one having one lane (v5) and another with two lanes (v5.20). This commit adds support for the first PCIe phy only, support for the second PCIe PHY is coming in next commits. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18dt-bindings: phy: qcom,qmp: Add SM8450 PCIe PHY bindingsDmitry Baryshkov
There are two different PCIe PHYs on SM8450, one having one lane and another with two lanes. Add DT bindings for them. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18PCI: qcom: Add SM8450 PCIe supportDmitry Baryshkov
On SM8450 platform PCIe hosts do not use all the clocks (and add several additional clocks), so expand the driver to handle these requirements. PCIe0 and PCIe1 hosts use different sets of clocks, so separate entries are required. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18PCI: qcom: Add interconnect support to 2.7.0/1.9.0 opsDmitry Baryshkov
Add optional interconnect support for the 2.7.0/1.9.0 hosts. Set the bandwidth according to the values from the downstream driver. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18PCI: qcom: Add ddrss_sf_tbu flagDmitry Baryshkov
Qualcomm PCIe driver uses compatible string to check if the ddrss_sf_tbu clock should be used. Since sc7280 support has added flags, switch to the new mechanism to check if this clock should be used. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18PCI: qcom: Remove redundancy between qcom_pcie and qcom_pcie_cfgDmitry Baryshkov
In preparation to adding more flags to configuration data, use pointer to struct qcom_pcie_cfg directly inside struct qcom_pcie, rather than duplicating all its fields. This would save us from the boilerplate code that just copies flag values from one struct to another one. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18dt-bindings: pci: qcom: Document PCIe bindings for SM8450Dmitry Baryshkov
Document the PCIe DT bindings for SM8450 SoC. The PCIe IP is similar to the one used on SM8250, however unlike SM8250, PCIe0 and PCIe1 use different set of clocks, so two compatible entries are required. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18PCI: qcom: Remove unnecessary pipe_clk handlingDmitry Baryshkov
QMP PHY driver already does clk_prepare_enable()/_disable() pipe_clk. Remove extra calls to enable/disable this clock from the PCIe driver, so that the PHY driver can manage the clock on its own. Fixes: aa9c0df98c29 ("PCI: qcom: Switch pcie_1_pipe_clk_src after PHY init in SC7280") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18PCI: qcom: Fix pipe_clk_src reparentingDmitry Baryshkov
The hardware requires that pipe_clk_src is fed from TCXO when GDSC is disabled. It can be fed from PHY's pipe_clk once GDSC is enabled (which is what is done by the downstream driver). Currently code does all clk_set_parent() calls after the pm_runtime_get(), so the GDSC is already enabled. Implement these requirements by moving pm_runtime_*() calls after get_resources (so that get_resources() can ensure that the pipe clock parent is TCXO). Fixes: aa9c0df98c29 ("PCI: qcom: Switch pcie_1_pipe_clk_src after PHY init in SC7280") Cc: Prasad Malisetty <pmaliset@codeaurora.org> Cc: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-18PCI: qcom: Balance pm_runtime_foo() callsDmitry Baryshkov
Fix the error path in qcom_pcie_probe(): remove extra calls to pm_runtime_disable() (which will be called at the end of error path anyway). Replace a call to pm_runtime_get_sync() with pm_runtime_resume_and_get() to end up with cleaner code. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2021-12-16dt-bindings: usb: qcom,dwc3: add binding for SM8450Vinod Koul
Add the compatible string for USB controller for Qualcomm SM8450 SoC. Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-15PCI: qcom-ep: Move enable/disable resources code to common functionsDmitry Baryshkov
Remove code duplication by moving the code related to enabling/disabling the resources (PHY, CLK, Reset) to common functions so that they can be called from multiple places. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> [mani: renamed the functions and reworded the commit message] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-12-15MAINTAINERS: Add entry for MHI networking drivers under MHI busManivannan Sadhasivam
The host MHI net driver was not listed earlier. So let's add both host and endpoint MHI net drivers under MHI bus. Cc: Loic Poulain <loic.poulain@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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