diff options
author | Michael Scott <michael.scott@linaro.org> | 2017-03-22 10:37:46 -0700 |
---|---|---|
committer | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | 2017-04-13 13:10:20 +0200 |
commit | 73a77d17c0d405ae06ed14d5ee1e0b8a43836653 (patch) | |
tree | 15fa4eb23bab2fe7c20154b6d0015a84e7b8a3c2 | |
parent | 80b4d034bd13c4d0c94bc048350006cad41740c4 (diff) |
arm64: dts: db820c: add bluetooth uart/pin setup
Signed-off-by: Michael Scott <michael.scott@linaro.org>
-rw-r--r-- | arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 24 | ||||
-rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 24 | ||||
-rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 |
3 files changed, 50 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi index 6ab29e046062..ca18768e7d66 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi @@ -21,7 +21,7 @@ / { aliases { serial0 = &blsp2_uart1; - serial1 = &blsp2_uart2; + serial1 = &blsp1_uart1; i2c0 = &blsp1_i2c2; i2c1 = &blsp2_i2c1; i2c2 = &blsp2_i2c0; @@ -220,13 +220,21 @@ pinctrl-1 = <&blsp2_uart1_2pins_sleep>; }; -// serial@75b1000 { -// label = "LS-UART0"; -// status = "okay"; -// pinctrl-names = "default", "sleep"; -// pinctrl-0 = <&blsp2_uart2_4pins_default>; -// pinctrl-1 = <&blsp2_uart2_4pins_sleep>; -// }; + serial@7570000 { + label = "BT-UART"; + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&blsp1_uart1_default>; + pinctrl-1 = <&blsp1_uart1_sleep>; + }; + + //serial@75b1000 { + // label = "LS-UART0"; + // status = "okay"; + // pinctrl-names = "default", "sleep"; + // pinctrl-0 = <&blsp2_uart2_4pins_default>; + // pinctrl-1 = <&blsp2_uart2_4pins_sleep>; + //}; i2c@07577000 { /* On Low speed expansion */ diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi index c5c42e94f387..fc02619f309f 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi @@ -47,6 +47,30 @@ }; }; + blsp1_uart1_default: blsp1_uart1_default { + pinmux { + function = "blsp_uart2"; + pins = "gpio41", "gpio42", "gpio43", "gpio44"; + }; + pinconf { + pins = "gpio41", "gpio42", "gpio43", "gpio44"; + drive-strength = <16>; + bias-disable = <0>; + }; + }; + + blsp1_uart1_sleep: blsp1_uart1_sleep { + pinmux { + function = "gpio"; + pins = "gpio41", "gpio42", "gpio43", "gpio44"; + }; + pinconf { + pins = "gpio41", "gpio42", "gpio43", "gpio44"; + drive-strength = <2>; + bias-disable = <0>; + }; + }; + blsp1_i2c2_default: blsp1_i2c2_default { pinmux { function = "blsp_i2c3"; diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index f17067d8c009..75c1049dda81 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -403,6 +403,16 @@ #clock-cells = <1>; }; + blsp1_uart1: serial@7570000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x07570000 0x1000>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + blsp1_spi0: spi@07575000 { compatible = "qcom,spi-qup-v2.2.1"; reg = <0x07575000 0x600>; |