diff options
| author | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | 2014-07-08 14:16:14 +0100 |
|---|---|---|
| committer | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | 2015-11-17 09:21:16 +0000 |
| commit | d880acfc2faacf3b1d27c62799f13ce6013bf368 (patch) | |
| tree | 5ddc6d19ef117a2e99ea75e323f5ecf88ff355e8 | |
| parent | 1b4dfe6ece66087fdc9bd4c0f7e0244e652b927e (diff) | |
pci: qcom: remove static declaration of functions.
This patch removes declaration of the local function, by re-ordering the
usage.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
| -rw-r--r-- | drivers/pci/host/pci-qcom.c | 84 |
1 files changed, 39 insertions, 45 deletions
diff --git a/drivers/pci/host/pci-qcom.c b/drivers/pci/host/pci-qcom.c index 665943baed4e..5b49bfde3351 100644 --- a/drivers/pci/host/pci-qcom.c +++ b/drivers/pci/host/pci-qcom.c @@ -130,51 +130,6 @@ struct qcom_pcie { }; -static int qcom_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); -static int qcom_pcie_setup(int nr, struct pci_sys_data *sys); -static int msm_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, - int size, u32 *val); -static int msm_pcie_wr_conf(struct pci_bus *bus, u32 devfn, - int where, int size, u32 val); - -static struct pci_ops qcom_pcie_ops = { - .read = msm_pcie_rd_conf, - .write = msm_pcie_wr_conf, -}; - -static struct hw_pci qcom_hw_pci[MAX_RC_NUM] = { - { -#ifdef CONFIG_PCI_DOMAINS - .domain = 0, -#endif - .ops = &qcom_pcie_ops, - .nr_controllers = 1, - .swizzle = pci_common_swizzle, - .setup = qcom_pcie_setup, - .map_irq = qcom_pcie_map_irq, - }, - { -#ifdef CONFIG_PCI_DOMAINS - .domain = 1, -#endif - .ops = &qcom_pcie_ops, - .nr_controllers = 1, - .swizzle = pci_common_swizzle, - .setup = qcom_pcie_setup, - .map_irq = qcom_pcie_map_irq, - }, - { -#ifdef CONFIG_PCI_DOMAINS - .domain = 2, -#endif - .ops = &qcom_pcie_ops, - .nr_controllers = 1, - .swizzle = pci_common_swizzle, - .setup = qcom_pcie_setup, - .map_irq = qcom_pcie_map_irq, - }, -}; - static int nr_controllers; static DEFINE_SPINLOCK(qcom_hw_pci_lock); @@ -348,6 +303,45 @@ static int qcom_pcie_setup(int nr, struct pci_sys_data *sys) return 1; } +static struct pci_ops qcom_pcie_ops = { + .read = msm_pcie_rd_conf, + .write = msm_pcie_wr_conf, +}; + +static struct hw_pci qcom_hw_pci[MAX_RC_NUM] = { + { +#ifdef CONFIG_PCI_DOMAINS + .domain = 0, +#endif + .ops = &qcom_pcie_ops, + .nr_controllers = 1, + .swizzle = pci_common_swizzle, + .setup = qcom_pcie_setup, + .map_irq = qcom_pcie_map_irq, + .add_bus = qcom_pcie_add_bus, + }, + { +#ifdef CONFIG_PCI_DOMAINS + .domain = 1, +#endif + .ops = &qcom_pcie_ops, + .nr_controllers = 1, + .swizzle = pci_common_swizzle, + .setup = qcom_pcie_setup, + .map_irq = qcom_pcie_map_irq, + }, + { +#ifdef CONFIG_PCI_DOMAINS + .domain = 2, +#endif + .ops = &qcom_pcie_ops, + .nr_controllers = 1, + .swizzle = pci_common_swizzle, + .setup = qcom_pcie_setup, + .map_irq = qcom_pcie_map_irq, + }, +}; + static inline void qcom_elbi_writel_relaxed(struct qcom_pcie *pcie, u32 val, u32 reg) { |