diff options
author | Thierry Reding <thierry.reding@avionic-design.de> | 2012-10-01 08:41:23 +0200 |
---|---|---|
committer | Thierry Reding <thierry.reding@avionic-design.de> | 2012-10-07 12:11:53 +0200 |
commit | 85f8879ca4f3d26a7f473522101fb74a79bda3f2 (patch) | |
tree | 26bc8e984bb47a8a154fabd58c6642fe9facd882 | |
parent | c2d476a98f71c55e9acdca1d5a1080a22c0622af (diff) |
pwm: dt: Fix description of second PWM cellfor-3.7-rc1
The second cell in the PWM specifier denotes the period in nanoseconds,
not the duty cycle. The latter can be freely configured at runtime and
a PWM with a fixed duty cycle would be rather pointless.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: "Benoît Thébaudeau" <benoit.thebaudeau@advansee.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
-rw-r--r-- | Documentation/devicetree/bindings/pwm/imx-pwm.txt | 2 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/pwm/mxs-pwm.txt | 2 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.txt b/Documentation/devicetree/bindings/pwm/imx-pwm.txt index 9b9b18514b6..8522bfbccfd 100644 --- a/Documentation/devicetree/bindings/pwm/imx-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/imx-pwm.txt @@ -4,7 +4,7 @@ Required properties: - compatible: should be "fsl,<soc>-pwm" - reg: physical base address and length of the controller's registers - #pwm-cells: should be 2. The first cell specifies the per-chip index - of the PWM to use and the second cell is the duty cycle in nanoseconds. + of the PWM to use and the second cell is the period in nanoseconds. - interrupts: The interrupt for the pwm controller Example: diff --git a/Documentation/devicetree/bindings/pwm/mxs-pwm.txt b/Documentation/devicetree/bindings/pwm/mxs-pwm.txt index b16f4a57d11..d7946be6cd2 100644 --- a/Documentation/devicetree/bindings/pwm/mxs-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/mxs-pwm.txt @@ -4,7 +4,7 @@ Required properties: - compatible: should be "fsl,imx23-pwm" - reg: physical base address and length of the controller's registers - #pwm-cells: should be 2. The first cell specifies the per-chip index - of the PWM to use and the second cell is the duty cycle in nanoseconds. + of the PWM to use and the second cell is the period in nanoseconds. - fsl,pwm-number: the number of PWM devices Example: diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt index bbbeedb4ec0..01438ecd662 100644 --- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt @@ -7,7 +7,7 @@ Required properties: - reg: physical base address and length of the controller's registers - #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The first cell specifies the per-chip index of the PWM to use and the second - cell is the duty cycle in nanoseconds. + cell is the period in nanoseconds. Example: |