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authorLoic Poulain <loic.poulain@linaro.org>2020-11-27 11:49:38 +0100
committerLoic Poulain <loic.poulain@linaro.org>2020-11-27 11:49:38 +0100
commit39dd941991ce555fc8a9f108701d1a07fb02109f (patch)
tree97daef6951ab672b843200360ad889d3e804236f
parent018a24fe3ec288d6095a4454e984e2b7266bc8f9 (diff)
Udev rule update
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
-rw-r--r--42-mhi.rules15
1 files changed, 7 insertions, 8 deletions
diff --git a/42-mhi.rules b/42-mhi.rules
index 71e5be7..5725b28 100644
--- a/42-mhi.rules
+++ b/42-mhi.rules
@@ -1,11 +1,10 @@
-# There are two paths for submitting QMI commands, the legacy path using MHI UCI /dev/mhi_xxx_QMI
-# and QRTR path. Today, QMI over QRTR is recommended because it's bus agnostic and can be
-# used in embedded or PCIe case. (QRTR over smem, QRTR over MHI....).
-# However in case of PCIe we still need to open the MHI UCI device so that modem configures the
-# data path to PCIe endpoint. This dummy rule is only here to keep the QMI channel open and let
# the modem know that we want to use PCIe.
-# QCOM SDX55 PCIe MHI QMI device (Legacy)
-#ACTION=="add", SUBSYSTEM=="mhi_uci", ATTRS{vendor}=="0x17cb", ATTRS{device}=="0x0306", KERNEL=="mhi*QMI", RUN+="/bin/cat $env{DEVNAME}"
-#ACTION=="add", SUBSYSTEM=="mhi_uci", ATTRS{vendor}=="0x17cb", ATTRS{device}=="0x0306", KERNEL=="mhi*QMI", RUN+="/bin/mhi-qmi-connect --udev --kmsg"
+# QCOM SDX55 PCIe MHI QMI device
+# This rules auto-start mhi-connect with the newly detected device
+# it will use parameters (apn, pin...) specified in /etc/mhi-qmi-connect.conf
+# Output will be redirected to kmsg (dmesg)
+# Uncomment to apply
+
+#ACTION=="add", SUBSYSTEM=="mhi_uci", ATTRS{vendor}=="0x17cb", ATTRS{device}=="0x0306", KERNEL=="mhi*QMI", RUN+="/bin/mhi-qmi-connect --udev --kmsg -d $env{DEVNAME}"