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| author | Antonio Niño Díaz <antonio.ninodiaz@arm.com> | 2019-01-08 11:28:44 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-01-08 11:28:44 +0000 |
| commit | c8719032600e9aade27b674c2d117563079e8e07 (patch) | |
| tree | 2bfc5e1beb42a11dee9cbdf614a294e12f0727c8 | |
| parent | 442304651c5e37acab950388fd1b760cc5033bd4 (diff) | |
| parent | d4580d17eb524b45e655007955246457ff47c798 (diff) | |
Merge pull request #1740 from soby-mathew/sm/restrict_pie_to_fvp
plat/arm: Restrict PIE support to FVP
| -rw-r--r-- | include/plat/arm/common/arm_def.h | 19 | ||||
| -rw-r--r-- | plat/arm/board/fvp/platform.mk | 8 | ||||
| -rw-r--r-- | plat/arm/common/arm_common.mk | 5 |
3 files changed, 19 insertions, 13 deletions
diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h index c63fddb3..4e9c70aa 100644 --- a/include/plat/arm/common/arm_def.h +++ b/include/plat/arm/common/arm_def.h @@ -405,16 +405,21 @@ #define BL31_LIMIT (ARM_AP_TZC_DRAM1_BASE + \ PLAT_ARM_MAX_BL31_SIZE) #elif (RESET_TO_BL31) -/* Ensure Position Independent support (PIE) is enabled for this config.*/ -# if !ENABLE_PIE -# error "BL31 must be a PIE if RESET_TO_BL31=1." -# endif + +# if ENABLE_PIE /* * Since this is PIE, we can define BL31_BASE to 0x0 since this macro is solely - * used for building BL31 when RESET_TO_BL31=1. + * used for building BL31 and not used for loading BL31. */ -#define BL31_BASE 0x0 -#define BL31_LIMIT PLAT_ARM_MAX_BL31_SIZE +# define BL31_BASE 0x0 +# define BL31_LIMIT PLAT_ARM_MAX_BL31_SIZE +# else +/* Put BL31_BASE in the middle of the Trusted SRAM.*/ +# define BL31_BASE (ARM_TRUSTED_SRAM_BASE + \ + (PLAT_ARM_TRUSTED_SRAM_SIZE >> 1)) +# define BL31_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE) +# endif /* ENABLE_PIE */ + #else /* Put BL31 below BL2 in the Trusted SRAM.*/ #define BL31_BASE ((ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)\ diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk index 3d858c20..3b60daad 100644 --- a/plat/arm/board/fvp/platform.mk +++ b/plat/arm/board/fvp/platform.mk @@ -201,9 +201,15 @@ ENABLE_AMU := 1 # Enable dynamic mitigation support by default DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 -# Enable reclaiming of BL31 initialisation code for secondary cores stacks for FVP ifneq (${RESET_TO_BL31},1) +# Enable reclaiming of BL31 initialisation code for secondary cores stacks for +# FVP. We cannot enable PIE for this case because the overlayed init section +# creates some dynamic relocations which cannot be handled by the fixup +# logic currently. RECLAIM_INIT_CODE := 1 +else +# Enable PIE support when RESET_TO_BL31=1 +ENABLE_PIE := 1 endif ifeq (${ENABLE_AMU},1) diff --git a/plat/arm/common/arm_common.mk b/plat/arm/common/arm_common.mk index bef34ada..a8ac286f 100644 --- a/plat/arm/common/arm_common.mk +++ b/plat/arm/common/arm_common.mk @@ -133,11 +133,6 @@ ARM_CRYPTOCELL_INTEG := 0 $(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG)) $(eval $(call add_define,ARM_CRYPTOCELL_INTEG)) -# Enable PIE support for RESET_TO_BL31 case -ifeq (${RESET_TO_BL31},1) - ENABLE_PIE := 1 -endif - # CryptoCell integration relies on coherent buffers for passing data from # the AP CPU to the CryptoCell ifeq (${ARM_CRYPTOCELL_INTEG},1) |