diff options
| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-11-14 16:35:23 -0800 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-11-14 18:25:51 -0800 |
| commit | 074bca06d5d790fa01988d7890f13dc7f7e8cd4a (patch) | |
| tree | ae389f8a8c35f0c7c71956237358b7b28649309d | |
| parent | 91d76fb691297ad8a2034e476576738fc1b59038 (diff) | |
IntelUndiPkg/XGigUndiDxe: don't take address of cast expression
Taking the address of a cast expression is not permitted in C. Instead,
take the address of the variable, and cast the pointer to the desired
pointer type.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
| -rw-r--r-- | IntelUndiPkg/XGigUndiDxe/Xgbe.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/IntelUndiPkg/XGigUndiDxe/Xgbe.c b/IntelUndiPkg/XGigUndiDxe/Xgbe.c index 0c823efe8..003c3b906 100644 --- a/IntelUndiPkg/XGigUndiDxe/Xgbe.c +++ b/IntelUndiPkg/XGigUndiDxe/Xgbe.c @@ -1264,7 +1264,7 @@ XgbeTxRxConfigure ( IXGBE_WRITE_REG (&XgbeAdapter->Hw, IXGBE_RDBAL (0), (UINT32) (UINTN) (XgbeAdapter->RxRing.PhysicalAddress)); MemAddr = (UINT64) (UINTN) XgbeAdapter->RxRing.PhysicalAddress; - MemPtr = &((UINT32) MemAddr); + MemPtr = (UINT32 *) &MemAddr; MemPtr++; IXGBE_WRITE_REG (&XgbeAdapter->Hw, IXGBE_RDBAH (0), *MemPtr); DEBUGPRINT (XGBE, ("Rdbal0 %X\n", (UINT32) IXGBE_READ_REG (&XgbeAdapter->Hw, IXGBE_RDBAL (0)))); @@ -1337,7 +1337,7 @@ XgbeTxRxConfigure ( XgbeAdapter->XmitDoneHead = 0; // the last cleaned buffer IXGBE_WRITE_REG (&XgbeAdapter->Hw, IXGBE_TDBAL (0), (UINT32) (XgbeAdapter->TxRing.PhysicalAddress)); MemAddr = (UINT64) XgbeAdapter->TxRing.PhysicalAddress; - MemPtr = &((UINT32) MemAddr); + MemPtr = (UINT32 *) &MemAddr; MemPtr++; IXGBE_WRITE_REG (&XgbeAdapter->Hw, IXGBE_TDBAH (0), *MemPtr); DEBUGPRINT (XGBE, ("TdBah0 %X\n", *MemPtr)); |