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authorErwan Gouriou <erwan.gouriou@linaro.org>2017-01-24 11:46:43 +0100
committerMaureen Helm <maureen.helm@nxp.com>2017-02-10 14:47:41 -0600
commit7fad8de12061a64de1effc09e5365312293831b6 (patch)
treeada7b0531078b40d51bb775b4fb3464c2f2e5f7b /boards
parenta3f35af40e78f1cd00f3c649a9019af7384943c3 (diff)
board: stm32373c_eval: enable support of LL Cube clock control driver
Activate support of LL Cube based Clock control driver Note that prescaler should now use actual numerical value used for calculation and not register value (hence 1 instead of 0) Change-Id: Ic2566d26f1b82441575a94ddd8d632c88df669d9 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Diffstat (limited to 'boards')
-rw-r--r--boards/arm/stm32373c_eval/stm32373c_eval_defconfig19
1 files changed, 17 insertions, 2 deletions
diff --git a/boards/arm/stm32373c_eval/stm32373c_eval_defconfig b/boards/arm/stm32373c_eval/stm32373c_eval_defconfig
index c673c6e4e..399d46769 100644
--- a/boards/arm/stm32373c_eval/stm32373c_eval_defconfig
+++ b/boards/arm/stm32373c_eval/stm32373c_eval_defconfig
@@ -49,9 +49,24 @@ CONFIG_GPIO_STM32_PORTC=y
CONFIG_GPIO_STM32_PORTD=y
CONFIG_GPIO_STM32_PORTE=y
-# RCC configuration
+# Clock configuration
CONFIG_CLOCK_CONTROL=y
-CONFIG_CLOCK_CONTROL_STM32F3X=y
+CONFIG_CLOCK_CONTROL_STM32_CUBE=y
+# SYSCLK selection
+CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
+# HSE configuration
+CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
+# PLL configuration
+CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
+# produce 72MHz clock at PLL output
+CONFIG_CLOCK_STM32_PLL_PREDIV=1
+CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9
+CONFIG_CLOCK_STM32_AHB_PRESCALER=1
+CONFIG_CLOCK_STM32_APB1_PRESCALER=2
+CONFIG_CLOCK_STM32_APB2_PRESCALER=2
+
+# RCC configuration
+CONFIG_CLOCK_CONTROL_STM32F3X=n
CONFIG_CLOCK_CONTROL_STM32F3X_DEVICE_INIT_PRIORITY=1
CONFIG_CLOCK_STM32F3X_SYSCLK_SRC_PLL=y
CONFIG_CLOCK_STM32F3X_PLL_SRC_HSE=y