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author | Linaro CI <ci_notify@linaro.org> | 2022-01-24 18:20:38 +0100 |
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committer | Linaro CI <ci_notify@linaro.org> | 2022-01-24 18:20:38 +0100 |
commit | bed2948676af0341bd5ce3d28565ec6cae66915c (patch) | |
tree | cb806d91025d4b29ed50f3e8752b9dd287d8d645 /Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt | |
parent | 99283e1daf6d41f07297fff746f734366e519372 (diff) | |
parent | 2327620c9c132f9c55812b586d941de8595ef1b6 (diff) |
Merge remote-tracking branch 'sumit-lts/lts-4.4.y-hikey' into linux-4.4.y4.4.300-rc1-hikey-20220124-1253
Diffstat (limited to 'Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt')
-rw-r--r-- | Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt new file mode 100644 index 000000000000..5edc310470b6 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt @@ -0,0 +1,27 @@ +Hisilicon hi655x Power Management Integrated Circuit (PMIC) + +The hardware layout for access PMIC Hi655x from AP SoC Hi6220. +Between PMIC Hi655x and Hi6220, the physical signal channel is SSI. +We can use memory-mapped I/O to communicate. + ++----------------+ +-------------+ +| | | | +| Hi6220 | SSI bus | Hi655x | +| |-------------| | +| |(REGMAP_MMIO)| | ++----------------+ +-------------+ + +Required properties: +- compatible: Should be "hisilicon,hi655x-pmic" +- reg: Base address of PMIC on hi6220 soc +- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). +- pmic-gpios: The gpio used by PMIC irq. + +Example: + pmic: pmic@f8000000 { + compatible = "hisilicon,hi655x-pmic"; + reg = <0x0 0xf8000000 0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + } |