| Age | Commit message (Collapse) | Author |
|---|
|
Signed-off-by: Yin, Fengwei <fengwei.yin@linaro.org>
|
|
which will trigger warning when lockdep debugging is enabled.
Signed-off-by: Yin, Fengwei <fengwei.yin@linaro.org>
|
|
Signed-off-by: Yin, Fengwei <fengwei.yin@linaro.org>
|
|
188 and 259.
Signed-off-by: Yin, Fengwei <fengwei.yin@linaro.org>
|
|
match method.
Signed-off-by: Yin, Fengwei <fengwei.yin@linaro.org>
|
|
Signed-off-by: Yin, Fengwei <fengwei.yin@linaro.org>
|
|
HCI BT.
Signed-off-by: Yin, Fengwei <fengwei.yin@linaro.org>
|
|
This reverts commit 032a9e6e405f42bfb03d30af75b353067f974b51.
|
|
The Qualcomm WCNSS chip provides two SMD channels to the BT core; one
for command and one for event packets. This driver exposes the two
channels as a hci device.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
|
|
This patch assigns the next free HCI device identifier to Bluetooth
devices based on the Qualcomm Shared Memory channels.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
|
|
With the qcom_smd_open_channel() API we allow SMD devices to open
additional SMD channels, to allow implementation of multi-channel SMD
devices - like Bluetooth.
Channels are opened from the same edge as the calling SMD device is tied
to.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
|
|
This patch allows chaining additional channels to a SMD device, enabling
implementation of multi-channel SMD devies - like Bluetooth.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
|
|
Refactor opening and closing of channels into two separate functions
instead of open coding this in the various places.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
|
|
Split the two steps of channel discovery and state change handling into
two different workers. This allows for new channels to be found while
we're are probing, which is required as we introduce multi-channel
support.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
|
|
Introduce a setter for the callback function pointer to clarify the
locking around the operation and to reduce some duplication.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
|
|
Implement a id_table based driver maching mechanism for drivers that
binds to fixed channels and doesn't need any additional configuration,
e.g. IPCRTR and DIAG.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
|
|
* tracking-qcomlt-config-fragments:
kernel: configs: update distro config from release branch
kernel: configs: improve distro.config, mostly for systemd
kernel: configs: update distro.config
kernel: configs: move linaro distro.conf as proper %.config fragment
linaro: add defconfig fragment with basic linaro config
|
|
* tracking-qcomlt-wcnss:
wcn36xx: add locking around ring buffer accesses
Add smd tty driver for bluetooth support.
Migrate the wifi driver from old smd driver to new smd driver.
Update the initialization sequence to enable DB410c.
Set the dma mask for platform device which is not created from DT.
ARM64 has requirement that all the dma operations has assigned devices. Otherwise, following message shown and dma allocation fails:
Got workable wireless driver.
wcn36xx: add later fw capabilities
net wireless wcn36xx adapt wcnss platform to select module by DT
net wireless wcn36xx add wcnss platform code
wcn3620: use new response format for wcn3620 remove_bsskey
wcn3620: use new response format for wcn3620 trigger_ba
wcn36xx: handle new hal response format
wcn36xx: remove powersaving for wcn3620
wcn36xx: swallow two wcn3620 IND messages
wcn36xx: introduce WCN36XX_HAL_AVOID_FREQ_RANGE_IND
wcn36xx: use 3680 dxe regs for 3620
wcn36xx: get chip type from platform ops
wcn36xx: add wcn3620 chip type definition
|
|
* tracking-qcomlt-scm:
firmware: qcom: scm: Fixup arm64 asm
firmware: qcom: scm: add video (vidc) scm calls
firmware: qcom: scm: Support IOMMU scm calls
firmware: qcom: scm: Support PIL SCMs
firmware: qcom: scm: Split out 32-bit specific SCM code
firmware: qcom: scm: Fix NULL coherent device
firmware: qcom: scm: Add 64 bit PAS APIs
firmware: qcom: scm: Peripheral Authentication Service
firmware: qcom: scm: Add boot APIs
firmware: qcom: scm: Generalize shared error map
firmware: qcom: scm: Add support for ARM64 SoCs
|
|
* tracking-qcomlt-power-regulator:
cpufreq-dt: Add L2 frequency scaling support
pwer:avs: cpr: fix with new reg_sequence structures
power: avs: cpr: Fix Duplicate OPPs warning
power: avs: Register CPR with cpufreq-dt
power: avs: cpr: Use raw mem access for qfprom
power: avs: Add support for CPR (Core Power Reduction)
cpufreq-dt: Handle OPP voltage adjust events
OPP: Allow notifiers to call dev_pm_opp_get_{voltage, freq} RCU-free
PM / OPP: Support adjusting OPP voltages at runtime
|
|
integration-linux-qcomlt
* tracking-qcomlt-mainline-rpm-smd-pil: (43 commits)
soc: qcom: smd-rpm: Correct the active vs sleep state flagging
qcom-smd-rpm: Add MSM8916 support
fixup! regulator: smd: Add floor and corner operations
gpio:smp2p:qcom: kill set_irq_flags and use genirq
qcom/smd: support transmit/receive the data not aligned to 32bit.
remoteproc: tz_pil: skip waiting ready irq if it not provided
remoteproc: tz_pil: take relocation flag into account
remoteproc: tz_pil: make irqs, smd edge & crash-reason optional properties
regulator: smd: remove left over debug statement
regulator: smd: Add correct ifdef flag for stubs
regulator: smd: Make set_{corner,floor} work with regulator struct
regulator: smd: Add floor and corner operations
HACK: soc: qcom: smd: Add debug to fix timing
remoteproc: tz_pil: Fixes to support 8916
gpio: qcom-smp2p: Fix compile issues
dt-binding: gpio: Introduce qcom,smp2p binding documentation
gpio: qcom-smp2p: Qualcomm Shared Memory Point to Point
soc: qcom: smd: Use correct smem id
gpio: smsm: Fix compiler warnings
gpio: smsm: Update smem prototypes
...
|
|
* tracking-qcomlt-card-detect:
mmc: sdhci-msm: Add SDHCI_QUIRK_NO_CARD_NO_RESET
mmc: sdhci: let GPIO based card detection have higher precedence
|
|
* tracking-qcomlt-dsi:
drm/msm: remove pm_runtime_put() calls
hack: drm/msm: dsi host: don't get esc_clk rate
mdp4: Add iommu detach_dev in error path
HACK: drm/msm/mdp5: Make sure mdp5 clocks aren't disbaled when we need them
drm/msm/dsi: Don't call hpd helper unconditionally
drm/msm/dsi: Remove incorrect warning on host attach
drm/msm/dsi: Add a delay when performing software reset
drm/msm/dsi: Parse lane swap information from DT
|
|
* tracking-qcomlt-audio:
sound: codec: Add support to msm8x16_wcd codec.
|
|
* tracking-qcomlt-i2c:
i2c: qup: Add bam dma capabilities
i2c: qup: Transfer each i2c_msg in i2c_msgs without a stop bit
i2c: qup: Add V2 tags support
qup: i2c: factor out common code for reuse
i2c: qup: Change qup_wait_writeready function to use for all timeouts
|
|
* tracking-qcomlt-usb:
usb: phy: msm: Unregister VBUS and ID events notifiers
usb: phy: msm: Ensure that workers are initialized before use
usb: phy: msm: Disable driver runtime PM
usb: phy: msm: HACK: Make Vddc configuration optional
usb: chipidea: Use extcon framework for VBUS and ID detect
|
|
* tracking-qcomlt-coresight:
amba: Defer device peripheral ID read
|
|
* tracking-qcomlt-tsens:
thermal: qcom: tsens-8960: Add support for 8960 family of SoCs
thermal: qcom: tsens-8974: Add support for 8974 family of SoCs
thermal: qcom: tsens-8916: Add support for 8916 family of SoCs
thermal: qcom: tsens: Add a skeletal TSENS drivers
|
|
* tracking-qcomlt-rpm:
WIP:mfd:qcom-rpm: Add qcom_rpm_read functionality
|
|
* tracking-qcomlt-clk: (46 commits)
clk: qcom: msm8916: Use RPMCC if its enabled
clk: qcom: Add RPM clock controller driver
clk: qcom: Add support for RPM Clocks
clk: qcom: msm8916: Ignore sleep_clk_src register errors
clk: qcom: msm8916: Make xo a child of the onboard oscillator
clk: qcom: create virtual child device for TSENS
soc: qcom: Add support for SAW2 regulators
clk-a53: Remove unnecessary init hooks
clk: qcom: fixup for v4.3-rc1
clk: qcom: remove __clk* apis usage
clk: qcom: HFPLL remove __clk_get_rate() usage
clk: qcom: include clk.h
clk: qcom: Allow clk_set_parent() to work on display clocks
clk: Safe frequency fixup
clk: Add support for safe frequency
clk: qcom: Handle safe frequency for krait
clk: qcom: Add A53 clock driver
clk: qcom: Add support for regmap mux-div clocks
clk: qcom: Add MSM8916 audio clocks
clk: qcom: Add MSM8916 gpu clocks
...
|
|
* tracking-qcomlt-adv7511:
drm/i2c: adv7511: fixup the dapm bias level access
drm/i2c: adv7511: move to use reg_sequence
HACK: drm/i2c: adv7511: Remove hotplug event handling
drm/i2c: adv7511: Enable the audio data and clock pads on adv7533
drm/i2c: adv7511: Add Audio support.
drm/i2c: adv7511: Move the common data structures to header file
drm/i2c: adv7511: Change DSI lanes dynamically
drm/i2c: adv7511: Use internal timing generator
drm/i2c: adv7511: setup CEC registers during power off-power-on sequence
drm/i2c: adv7511: Create mipi_dsi_device for ADV7533
drm/i2c: adv7511: Add drm_bridge/connector for ADV7533
drm/i2c: adv7511: Refactor encoder slave functions
drm/i2c: adv7511: Initial support for adv7533
drm/i2c: adv7511: Fix mutex deadlock when interrupts are disabled
drm/mipi_dsi: Get DSI host by DT device node
drm/mipi_dsi: Create dummy DSI devices
drm/mipi_dsi: check for used channels
drm/mipi_dsi: refactor device creation
|
|
* tracking-qcomlt-arm64: (30 commits)
arm64: dma-mapping: map sg lists into the SMMU as virtually contiguous
arm64: dma-mapping: fix DMA_ATTR_STRONGLY_ORDERED in __get_dma_pgprot
arm64: mm: Fix a bug in iommu dma-mapping
arm64: dma-mapping: add support for IOMMU mapper
arm64: Add support for DMA_ATTR_STRONGLY_ORDERED
arm: Add option to skip buffer zeroing
common: DMA-mapping: Add strongly ordered memory attribute
arm64: defconfig: add missing QCOM specific configs
defconfig: add tsens and spmi regulator support
arm64: defconfig: Enable drivers for WCNSS
arm64: defconfig: qcom: enable iommu v1 in defconfig
arm64: defconfig: Enable CPU frequency scaling
arm64: defconfig: Enable CPR driver
arm64: defconfig: Enable SPMI regulator driver
arm64: defconfig: Enable A53 CPU clock
arm64: defconfig: Clean-up defconfig with savedefconfig
arm64: defconfig: remove 8064 rpm clock controller selection.
arm64: defconfig: Enable LED drivers
arm64: Enable Qualcomm SMEM, RPM, and SMD drivers
arm64: defconfig: Enable dsi and hdmi audio related kconfigs
...
|
|
* tracking-qcomlt-hsuart:
tty: serial: msm: Unlock interrupts during SysRq processing
tty: serial: msm: Remove 115.2 Kbps maximum baud rate limitation
tty: serial: msm: Add RX DMA support
tty: serial: msm: Add TX DMA support
tty: serial: msm: Add msm prefix to all driver functions
tty: serial: msm: Fix command Stale Event Enable definition
tty: serial: msm: replaces (1 << x) with BIT(x) macro
tty: serial: msm: Add mask value for UART_DM registers
dmaengine: adm: Start next DMA even if there is no ongoing transaction
dmaengine: adm: Don't reset controller during probe
dmaengine: adm: Use 'soft' flush when stopping DMA
dmaengine: adm: Fix ADM hardware descriptor creation when flow control is enabled
dmaengine: Add ADM driver
dt/bindings: qcom_adm: Fix channel specifiers
|
|
* tracking-qcomlt-iommu: (24 commits)
iommu/msm: Fix "scheduling while atomic" bug
drm/msm: temp: Add a check to be compatible against both iommuv0/v1
iommu: of: Handle IOMMU lookup failure with deferred probing or error
iommu: of: Document the of_iommu_configure() function
drivers: platform: Configure dma operations at probe time
of: dma: Split of_configure_dma() into mask and ops configuration
of: dma: Make of_dma_deconfigure() public
of: dma: Move range size workaround to of_dma_get_range()
arm: dma-mapping: Don't override dma_ops in arch_setup_dma_ops()
temp: Add dummy msm_iommu_get_ctx and fix broken build
iommu/msm: Set cacheability attributes without tex remap
iommu/msm: Add support for generic master bindings
iommu/msm: Move the contents from msm_iommu_dev.c to msm_iommu.c
iommu/msm: Add DT adaptation
DOWNSTREAM: drm/msm: use downstream iommu
qcom: iommu: Make use of domain_alloc and domain_free
arm64: provide dma cache routines with same API as 32 bit
iommu: msm: Invalidate properly from iommu_unmap
iommu: qcom: v1: fix wrong sg interator
iommu: qcom: v1: rework secure part and build
...
|
|
* tracking-qcomlt-apq8016-dt: (57 commits)
arm64: dts: Fix the hypervisor and tz memory region size
dts: qcom: Add CoreSight components for MSM8916
arm64: dts: qcom: Add msm8916 CoreSight components
arm64: dts: qcom: msm8916: Add RPMCC DT node
arm64: dts: qcom: 8x16: Add fixed rate on-board XO oscillator
arm64: dts: qcom: fix typo: user LED2 uses GPIO 120, not 10
arm64: dts: apq8016-sbc: enable spi buses on LS and HS
arm64: dts: apq8016-sbc: enable i2c buses on LS and HS
arm64: dts: qcom: Add msm8916 I2C nodes.
arm64: dts: fix i2c pinconf sleep state function
arm64: dts: add support to analog audio playback
arm64: dts: msm8916: add wcd codec support
arm64: dts: Fix memory region descriptions
ARM64: dts: Fix the missing usb otg regulators.
arm64: dts: qcom: apq8016-sbc: Fix LED's naming
dts: arm64: apq8016-sbc: enable LS 1.8v regulator by default
arm64: dts: qcom: 8x16: UART2 use DMA for RX and TX
arm64: dts: qcom: 8x16: Add UART1 configuration nodes
arm64: dt: Add WCNSS related nodes
DT: arm64: add iommu dtsi files
...
|
|
* tracking-qcomlt-apq8064-dt: (32 commits)
arm: dts: apq8064: Add thermal zones, tsens and qfprom nodes
ARM: dts: apq8064: Increase critical temperature to 110C
ARM: dts: ifc6410: HACK add bt reset gpios to pwrseq
arm: dts: Added eInfochips ERAGON600 board support
fixup! ARM: dts: qcom: Add MSM8960 RPM and RPM regulator nodes
ARM: dts: apq8064: Add ADM configuration node
ARM: dts: qcom: apq8064-ifc6410 Use hardware flow control for GSBI6
ARM: dts: apq8064: Add a DT node for the L2 data
ARM: dts: apq8064: Add reference to the L2 clock
ARM: dts: apq8064: Add voltage ranges of the SAW2 regulators
ARM: dts: apq8064: Add thermal cooling maps
ARM: dts: apq8064: Add OPP data for frequencies above 1ghz
ARM: dts: apq8064: Assign a power supply to each CPU
dts: qcom-apq8064: add rpm clock node.
ARM: DT: apq8064: Add Support for ext_3p3v regulator in pci node
ARM: qcom: add description of KPSS WDT for APQ8064
ARM: dts: qcom: Add necessary DT data for Krait cpufreq
ARM: DT: apq8064: add pci support in CM QS600
ARM: dts: APQ8064: Add iommu
ARM: DT: apq8064: add pci support
...
|
|
* tracking-qcomlt-panelpicker:
drm/msm: mdp4 lvds: Check the panel node in detect_panel()
drm/msm: mdp4 lvds: continue if the panel is not connected
drm/panel: simple-panel: Add panel picker support.
drm/edid: export edid_vendor()
drm/edid: Add support to get edid early
|
|
* tracking-qcomlt-pcie:
pci:qcom: kill set_irq_flags and use genirq
pci: qcom: add Kconfig to not build on arm64
pci: qcom: remove static domain name allocation
pci: qcom: Add ext_3p3v regulator support
pci: qcom: move device init to subsys_initcall_sync
pci: qcom: add msi support
pci: qcom: Add support to external phy reference clk.
pci: qcom: remove static declaration of functions.
pci: qcom: Add regulator support
pci: qcom: move dt parsing code out of probe
pci: qcom: fix unused variable warning.
pci: qcom: fix a typo in reset gpio
PCI: qcom: Add support for pcie controllers on IPQ8064
|
|
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
|
|
In arm_iommu_map_sg, currently we map each individual link in the given
scatterlist into the SMMU individually such that they may or may not be
virtually contiguous. However, in most (all?) of our use cases we
actually want the entire sg list mapped into the SMMU as a single
contiguous range. Use iommu_map_range to accomplish this.
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
[Forward Ported this from msm3.14]
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
[added iommu_map_range in generic dma code]
Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
|
Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
|
iommu_alloc_attrs and arm_iommu_mmap_attrs calls
dma_pgprot with device type set to always 'coherent'
which is wrong. Should be based on the device type.
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
|
On systems with IOMMUs, it's useful to handle IOMMU mappings in the
dma-mapping layer. This is currently supported on arm but not arm64. Add
support in arm64 by gratuitously lifting most of the IOMMU-related stuff
from dma-mapping.c in arm.
The original arm work was done by Marek Szyprowski in [4ce63fcd919c32:
"ARM: dma-mapping: add support for IOMMU mapper"].
Change-Id: I1c3c8fe15049fe456751074398fd179ebd2ec64e
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
[forward ported from 3.14 tree]
Signed-off-by: R Sricharan <sricharan@codeaurora.org>
Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
|
Strongly ordered memory prevents speculative accesses among
other features. Add support for this attribute in arm64.
Change-Id: If26459f63edfea3108ad7426e29f98c23b1a07ef
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Conflicts:
arch/arm64/mm/dma-mapping.c
Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
|
The DMA framework currently zeros all buffers because it (righfully so)
assumes that drivers will soon need to pass the memory to a device.
Some devices/use case may not require zeroed memory and there can
be an increase in performance if we skip the zeroing. Add a DMA_ATTR
to allow skipping of DMA zeroing.
Note: only the header file was modified to add the enum to allow the code to
compile, however the arm32 implementation was not pulled, and the arm64
implementation is missing as well
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
|
Strongly ordered memory is occasionally needed for some DMA
allocations for specialized use cases. Add the corresponding
DMA attribute.
Change-Id: Idd9e756c242ef57d6fa6700e51cc38d0863b760d
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
|
|
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
|
|
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Conflicts:
arch/arm64/boot/dts/qcom/msm8916.dtsi
|
|
Add initial set of CoreSight components found on Qualcomm's 8x16 chipset.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
|
|
Add the RPM Clock Controller DT node and include the necessary header
file for clocks.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Conflicts:
arch/arm64/boot/dts/qcom/msm8916.dtsi
|
