diff options
Diffstat (limited to 'include')
179 files changed, 8212 insertions, 911 deletions
diff --git a/include/.gitignore b/include/.gitignore deleted file mode 100644 index 7cd3e90700..0000000000 --- a/include/.gitignore +++ /dev/null @@ -1,6 +0,0 @@ -/autoconf.mk* -/asm -/bmp_logo.h -/bmp_logo_data.h -/config.h -/config.mk diff --git a/include/aes.h b/include/aes.h new file mode 100644 index 0000000000..41b0db29c1 --- /dev/null +++ b/include/aes.h @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2010 - 2011 NVIDIA Corporation <www.nvidia.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _AES_REF_H_ +#define _AES_REF_H_ + +/* + * AES encryption library, with small code size, supporting only 128-bit AES + * + * AES is a stream cipher which works a block at a time, with each block + * in this case being AES_KEY_LENGTH bytes. + */ + +enum { + AES_STATECOLS = 4, /* columns in the state & expanded key */ + AES_KEYCOLS = 4, /* columns in a key */ + AES_ROUNDS = 10, /* rounds in encryption */ + + AES_KEY_LENGTH = 128 / 8, + AES_EXPAND_KEY_LENGTH = 4 * AES_STATECOLS * (AES_ROUNDS + 1), +}; + +/** + * Expand a key into a key schedule, which is then used for the other + * operations. + * + * \param key Key, of length AES_KEY_LENGTH bytes + * \param expkey Buffer to place expanded key, AES_EXPAND_KEY_LENGTH + */ +void aes_expand_key(u8 *key, u8 *expkey); + +/** + * Encrypt a single block of data + * + * in Input data + * expkey Expanded key to use for encryption (from aes_expand_key()) + * out Output data + */ +void aes_encrypt(u8 *in, u8 *expkey, u8 *out); + +/** + * Decrypt a single block of data + * + * in Input data + * expkey Expanded key to use for decryption (from aes_expand_key()) + * out Output data + */ +void aes_decrypt(u8 *in, u8 *expkey, u8 *out); + +#endif /* _AES_REF_H_ */ diff --git a/include/ahci.h b/include/ahci.h index 465ea7fcbb..c4fb9e79a5 100644 --- a/include/ahci.h +++ b/include/ahci.h @@ -30,12 +30,13 @@ #define AHCI_PCI_BAR 0x24 #define AHCI_MAX_SG 56 /* hardware max is 64K */ #define AHCI_CMD_SLOT_SZ 32 +#define AHCI_MAX_CMD_SLOT 32 #define AHCI_RX_FIS_SZ 256 #define AHCI_CMD_TBL_HDR 0x80 #define AHCI_CMD_TBL_CDB 0x40 #define AHCI_CMD_TBL_SZ AHCI_CMD_TBL_HDR + (AHCI_MAX_SG * 16) -#define AHCI_PORT_PRIV_DMA_SZ AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_SZ \ - + AHCI_RX_FIS_SZ +#define AHCI_PORT_PRIV_DMA_SZ (AHCI_CMD_SLOT_SZ * AHCI_MAX_CMD_SLOT + \ + AHCI_CMD_TBL_SZ + AHCI_RX_FIS_SZ) #define AHCI_CMD_ATAPI (1 << 5) #define AHCI_CMD_WRITE (1 << 6) #define AHCI_CMD_PREFETCH (1 << 7) diff --git a/include/android/android_boot.h b/include/android/android_boot.h new file mode 100644 index 0000000000..1dd8d19fcc --- /dev/null +++ b/include/android/android_boot.h @@ -0,0 +1,6 @@ +#ifndef _ANDROID_BOOT_H_ +#define _ANDROID_BOOT_H_ + +void creat_atags(unsigned taddr, const char *cmdline, unsigned raddr, unsigned rsize); +void boot_linux(unsigned kaddr,unsigned taddr); +#endif diff --git a/include/android/android_bootimg.h b/include/android/android_bootimg.h new file mode 100644 index 0000000000..422d1c11dc --- /dev/null +++ b/include/android/android_bootimg.h @@ -0,0 +1,103 @@ +/* tools/mkbootimg/bootimg.h +** +** Copyright 2007, The Android Open Source Project +** +** Licensed under the Apache License, Version 2.0 (the "License"); +** you may not use this file except in compliance with the License. +** You may obtain a copy of the License at +** +** http://www.apache.org/licenses/LICENSE-2.0 +** +** Unless required by applicable law or agreed to in writing, software +** distributed under the License is distributed on an "AS IS" BASIS, +** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +** See the License for the specific language governing permissions and +** limitations under the License. +*/ + +#ifndef _BOOT_IMAGE_H_ +#define _BOOT_IMAGE_H_ + +typedef struct boot_img_hdr boot_img_hdr; + +#define BOOT_MAGIC "ANDROID!" +#define BOOT_MAGIC_SIZE 8 +#define BOOT_NAME_SIZE 16 +#define BOOT_ARGS_SIZE 512 + +struct boot_img_hdr +{ + unsigned char magic[BOOT_MAGIC_SIZE]; + + unsigned kernel_size; /* size in bytes */ + unsigned kernel_addr; /* physical load addr */ + + unsigned ramdisk_size; /* size in bytes */ + unsigned ramdisk_addr; /* physical load addr */ + + unsigned second_size; /* size in bytes */ + unsigned second_addr; /* physical load addr */ + + unsigned tags_addr; /* physical addr for kernel tags */ + unsigned page_size; /* flash page size we assume */ + unsigned unused[2]; /* future expansion: should be 0 */ + + unsigned char name[BOOT_NAME_SIZE]; /* asciiz product name */ + + unsigned char cmdline[BOOT_ARGS_SIZE]; + + unsigned id[8]; /* timestamp / checksum / sha1 / etc */ +}; + +/* +** +-----------------+ +** | boot header | 1 page +** +-----------------+ +** | kernel | n pages +** +-----------------+ +** | ramdisk | m pages +** +-----------------+ +** | second stage | o pages +** +-----------------+ +** +** n = (kernel_size + page_size - 1) / page_size +** m = (ramdisk_size + page_size - 1) / page_size +** o = (second_size + page_size - 1) / page_size +** +** 0. all entities are page_size aligned in flash +** 1. kernel and ramdisk are required (size != 0) +** 2. second is optional (second_size == 0 -> no second) +** 3. load each element (kernel, ramdisk, second) at +** the specified physical address (kernel_addr, etc) +** 4. prepare tags at tag_addr. kernel_args[] is +** appended to the kernel commandline in the tags. +** 5. r0 = 0, r1 = MACHINE_TYPE, r2 = tags_addr +** 6. if second_size != 0: jump to second_addr +** else: jump to kernel_addr +*/ + +#if 0 +typedef struct ptentry ptentry; + +struct ptentry { + char name[16]; /* asciiz partition name */ + unsigned start; /* starting block number */ + unsigned length; /* length in blocks */ + unsigned flags; /* set to zero */ +}; + +/* MSM Partition Table ATAG +** +** length: 2 + 7 * n +** atag: 0x4d534d70 +** <ptentry> x n +*/ +#endif +void normal_mode(void); +void recovery_mode(void); +void fastboot_mode(void); +void dloader_mode(void); +void charge_mode(void); +void vlx_mode(void); + +#endif diff --git a/include/android/android_recovery.h b/include/android/android_recovery.h new file mode 100644 index 0000000000..f76358fd08 --- /dev/null +++ b/include/android/android_recovery.h @@ -0,0 +1,77 @@ +/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. + + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * * Neither the name of Code Aurora Forum, Inc. nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN + * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _BOOTLOADER_RECOVERY_H +#define _BOOTLOADER_RECOVERY_H + +#define UPDATE_MAGIC "MSM-RADIO-UPDATE" +#define UPDATE_MAGIC_SIZE 16 +#define UPDATE_VERSION 0x00010000 + + +/* Recovery Message */ +struct recovery_message { + char command[32]; + char status[32]; + char recovery[1024]; +}; + + +struct update_header { + unsigned char MAGIC[UPDATE_MAGIC_SIZE]; + + unsigned version; + unsigned size; + + unsigned image_offset; + unsigned image_length; + + unsigned bitmap_width; + unsigned bitmap_height; + unsigned bitmap_bpp; + + unsigned busy_bitmap_offset; + unsigned busy_bitmap_length; + + unsigned fail_bitmap_offset; + unsigned fail_bitmap_length; +}; + + + +int get_recovery_message(struct recovery_message *out); +int set_recovery_message(const struct recovery_message *in); + +int read_update_header_for_bootloader(struct update_header *header); +int update_firmware_image (struct update_header *header, char *name); + +int recovery_init (void); + +extern unsigned boot_into_recovery; + +#endif diff --git a/include/android/boot_mode.h b/include/android/boot_mode.h new file mode 100644 index 0000000000..46277e1aca --- /dev/null +++ b/include/android/boot_mode.h @@ -0,0 +1,41 @@ +#ifndef _BOOT_MODE_H_ +#define _BOOT_MODE_H_ + +void normal_mode(void); +void recovery_mode(void); +void update_mode(void); +void charge_mode(void); +void dloader_mode(void); +void fastboot_mode(void); +void alarm_mode(void); +void calibration_detect(int key); +void engtest_mode(void); +void sleep_mode(void); +int is_bat_low(void); +int alarm_flag_check(void); + +#define RECOVERY_MODE 0x77665502 +#define FASTBOOT_MODE 0x77665500 +#define NORMAL_MODE 0x77665503 +#define ALARM_MODE 0x77665504 +#define SLEEP_MODE 0x77665505 + +#define BOOT_NORAML 0xf1 +#define BOOT_FASTBOOT 0xf2 +#define BOOT_RECOVERY 0xf3 +#define BOOT_CALIBRATE 0xf4 +#define BOOT_DLOADER 0xf5 +#define BOOT_CHARGE 0xf6 +#define BOOT_UPDATE 0xf7 + +#define KEY_FASTBOOT 0x2f +#define KEY_RECOVERY 0x3f +#define KEY_ENGTEST 0x4f +#define KEY_UPDATE 0x5f + +#define BACKLIGHT_ON 1 +#define BACKLIGHT_OFF 0 + +extern unsigned int check_key_boot(uint32_t key); +extern void vlx_nand_boot(char * kernel_pname, char * cmdline, int backlight_set); +#endif diff --git a/include/asm b/include/asm new file mode 120000 index 0000000000..b37ecc899d --- /dev/null +++ b/include/asm @@ -0,0 +1 @@ +../arch/arm/include/asm
\ No newline at end of file diff --git a/include/autoconf.mk b/include/autoconf.mk new file mode 100644 index 0000000000..df79076e11 --- /dev/null +++ b/include/autoconf.mk @@ -0,0 +1,171 @@ +CONFIG_TRAP_SIZE=0x00c0 +CONFIG_CMD_FAT=y +CONFIG_SYS_NAND_U_BOOT_OFFS="(CONFIG_SPL_NAND_OFFS + CONFIG_SPL_MAX_SIZE + CONFIG_MTD_PTBL_SIZE)" +CONFIG_ARMV7=y +CONFIG_CMD_ITEST=y +CONFIG_CMD_EDITENV=y +CONFIG_CMD_MTDPARTS=y +CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SYS_MAX_NAND_DEVICE=y +CONFIG_SYS_NAND_U_BOOT_DST="(CONFIG_SYS_TEXT_BASE - 64)" +CONFIG_VERSION_VARIABLE=y +CONFIG_NAND_RDA=y +CONFIG_CMD_CRC32=y +CONFIG_SYS_LONGHELP=y +CONFIG_SPL_BOARD_INFO_ADDR="(CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE - CONFIG_SPL_BOARD_INFO_SIZE)" +CONFIG_SYS_LOAD_ADDR="(PHYS_SDRAM_1 + 0x02000000)" +CONFIG_DISPLAY_BOARDINFO=y +CONFIG_SPL_NAND_OFFS="(NAND_START_ADDR)" +CONFIG_STACKSIZE="(256*1024)" +CONFIG_BOOTDELAY=y +CONFIG_SYS_NAND_BASE="(PHYS_SDRAM_1 + 0x00800000)" +CONFIG_SYS_HELP_CMD_WIDTH=8 +CONFIG_NR_DRAM_BANKS=y +CONFIG_EFI_PARTITION=y +CONFIG_CMD_SAVES=y +CONFIG_SYS_CBSIZE=1024 +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_CMD_UBI=y +CONFIG_BOOTM_LINUX=y +CONFIG_USB_FASTBOOT=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_CACHELINE_SIZE=32 +CONFIG_MMC=y +CONFIG_SPL_XMODEM_LOAD=y +CONFIG_MTD_PARTITIONS=y +CONFIG_SDMMC_BOOT=y +CONFIG_REVISION_TAG=y +CONFIG_SPL_EMMC_SUPPORT=y +CONFIG_CMD_MISC=y +CONFIG_ZERO_BOOTDELAY_CHECK=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SYS_SRAM_BASE=0x00100000 +CONFIG_ENV_SIZE="(16 << 10)" +CONFIG_CMD_HWFLOW=y +CONFIG_MDCOM=y +CONFIG_SYS_EMMC_U_BOOT_OFFS="(CONFIG_SPL_EMMC_OFFS + CONFIG_SPL_MAX_SIZE + CONFIG_MTD_PTBL_SIZE)" +CONFIG_SYS_MALLOC_LEN="(0x10000 + 16*1024*1024)" +CONFIG_INITRD_TAG=y +CONFIG_SYS_HZ_CLOCK=2000000 +CONFIG_RDA_FACTORY=y +CONFIG_SYS_TEXT_BASE=0x80008000 +CONFIG_SPL_CHECK_IMAGE=y +CONFIG_SPL_TEXT_BASE=0x00100100 +CONFIG_MTD_PTBL_OFFS="(CONFIG_SPL_NAND_OFFS + CONFIG_SPL_MAX_SIZE)" +CONFIG_MMC_DEV_NAME="mmc0" +CONFIG_CMD_NAND=y +CONFIG_USB_DEVICE=y +CONFIG_BOOTARGS="mem="MK_STR(MEM_SIZE)"M console=ttyS0," MK_STR(CONFIG_BAUDRATE) "root=/dev/ram rw rdinit=/init" +CONFIG_CMD_NAND_YAFFS=y +CONFIG_CMD_MEMORY=y +CONFIG_SYS_MAXARGS=16 +CONFIG_UIMAGEHDR_SIZE=0x40 +CONFIG_CMD_RUN=y +CONFIG_SYS_PBSIZE="(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT)+16)" +CONFIG_BOARDDIR="board/rda/rda8810" +CONFIG_SPL_STACK="CONFIG_SPL_BOARD_INFO_ADDR" +CONFIG_UBOOT_VARIANT_DEBUG=y +CONFIG_CMDLINE_EDITING=y +CONFIG_DDR_CAL_VAL_SIZE=0x10 +CONFIG_SYS_NAND_U_BOOT_SIZE="(CONFIG_SYS_BOOTLOADER_MAX_SIZE - CONFIG_MTD_PTBL_SIZE - CONFIG_SPL_MAX_SIZE - CONFIG_SPL_NAND_OFFS)" +CONFIG_CMD_EXT2=y +CONFIG_BOOTCOMMAND="mux_config; mmc dev 0; ext2load mmc 0:1 ${script_addr} boot.scr && source ${script_addr};echo Running boot script failed;" +CONFIG_CMD_MDCOM=y +CONFIG_SPL_NAND_LOAD=y +CONFIG_CRC32_VERIFY=y +CONFIG_SYS_NAND_MAX_CHIPS=y +CONFIG_SYS_BOOT_RAMDISK_HIGH=y +CONFIG_SPL_NAND_SIMPLE=y +CONFIG_ZLIB=y +CONFIG_RDA_PRDINFO=y +CONFIG_CMD_GO=y +CONFIG_CMD_BOOTD=y +CONFIG_CMD_BOOTM=y +CONFIG_CMD_BOOTZ=y +CONFIG_SYS_SRAM_SIZE=0x00010000 +CONFIG_MUSB_UDC=y +CONFIG_SYS_BARGSIZE="CONFIG_SYS_CBSIZE" +CONFIG_SYS_HZ=1000 +CONFIG_DOS_PARTITION=y +CONFIG_GZIP=y +CONFIG_BOOTSTAGE_USER_COUNT=20 +CONFIG_CMD_FPGA=y +CONFIG_MIN_PARTITION_NUM=0 +CONFIG_SYS_BAUDRATE_TABLE="{ 9600, 38400, 115200, 921600 }" +CONFIG_SYS_EMMC_U_BOOT_SIZE="(CONFIG_SYS_BOOTLOADER_MAX_SIZE - CONFIG_MTD_PTBL_SIZE - CONFIG_SPL_MAX_SIZE - CONFIG_SPL_EMMC_OFFS)" +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SPL_IMAGE_SUPPORT=y +CONFIG_MMC_DEV_NUM=0 +CONFIG_SYS_HUSH_PARSER=y +CONFIG_SIGNATURE_CHECK_IMAGE=y +CONFIG_MX_CYCLIC=y +CONFIG_SYS_SDRAM_BASE="(PHYS_SDRAM_1)" +CONFIG_SPL_EMMC_OFFS=0x20000 +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SYS_PROMPT_HUSH_PS2="> " +CONFIG_SYS_EMMC_U_BOOT_DST="(CONFIG_SYS_TEXT_BASE - 64)" +CONFIG_CMD_ECHO=y +CONFIG_GENERIC_MMC=y +CONFIG_MTD_PTBL_SIZE="((SPL_APPENDING_TO-CONFIG_SPL_MAX_SIZE/1024)*1024)" +CONFIG_CMD_PRDINFO=y +CONFIG_USE_ARCH_MEMCPY=y +CONFIG_RDA_MMC=y +CONFIG_EXTRA_ENV_SETTINGS="script_addr=81000000\0modem_addr=82000000\0factorydata_addr=83000000\0kernel_addr=84000000\0initrd_addr=85000000\0boot_device=mmc\0" +CONFIG_SPL_LOAD_ADDRESS="(CONFIG_SYS_SRAM_BASE + CONFIG_TRAP_SIZE)" +CONFIG_CMD_FASTBOOT=y +CONFIG_SYS_INIT_SP_ADDR="(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)" +CONFIG_CMD_ASKENV=y +CONFIG_BAUDRATE=921600 +CONFIG_SYS_XMODEM_U_BOOT_DST="(CONFIG_SYS_TEXT_BASE - 64)" +CONFIG_CMDLINE_TAG=y +CONFIG_SPL_NAND_MIDDLE_DATA_BUFFER="(PHYS_SDRAM_1 + 0x01000000)" +CONFIG_MAX_PARTITION_NUM=20 +CONFIG_ENV_IS_NOWHERE=y +CONFIG_DDR_CAL_SEC_OFFS="CONFIG_SPL_MAX_SIZE - CONFIG_DDR_CAL_VAL_SIZE - 0x100" +CONFIG_CMD_IMPORTENV=y +CONFIG_CMD_EXPORTENV=y +CONFIG_PARTITIONS=y +CONFIG_SYS_MEMTEST_END="(PHYS_SDRAM_1 + 0x00800000 + 16*1024*1024)" +CONFIG_CMD_UBIFS=y +CONFIG_EXTFS_USER_IMAGES=y +CONFIG_SYS_EMMC_U_BOOT_START="CONFIG_SYS_TEXT_BASE" +CONFIG_USBD_HS=y +CONFIG_SYS_NO_FLASH=y +CONFIG_SYS_DEF_EEPROM_ADDR=0 +CONFIG_SYS_XMODEM_U_BOOT_START="CONFIG_SYS_TEXT_BASE" +CONFIG_SPL_MAX_SIZE=49152 +CONFIG_MACH_TYPE="(5002)" +CONFIG_RDA_USB_SERIAL=y +CONFIG_SPL_THUMB_BUILD=y +CONFIG_SPL=y +CONFIG_MTD_DEVICE=y +CONFIG_CMD_SOURCE=y +CONFIG_SYS_PROMPT="RDA > " +CONFIG_EXTFS_SYSTEM_IMAGE=y +CONFIG_DISPLAY_CPUINFO=y +CONFIG_USB_RDA=y +CONFIG_NAND_RDA_V1=y +CONFIG_SETUP_MEMORY_TAGS=y +CONFIG_CMD_PDL2=y +CONFIG_SYS_MEMTEST_START="(PHYS_SDRAM_1 + 0x00800000)" +CONFIG_SYS_NAND_USE_FLASH_BBT=y +CONFIG_CMD_LOADB=y +CONFIG_CMD_LOADS=y +CONFIG_CMD_IMI=y +CONFIG_RDA_MUX_CONFIG=y +CONFIG_MUSB_DMA=y +CONFIG_LMB=y +CONFIG_ARM=y +CONFIG_RBTREE=y +CONFIG_CMD_DIAG=y +CONFIG_SYS_BOOTLOADER_MAX_SIZE="(1024*1024)" +CONFIG_SYS_NAND_PAGE_2K=y +CONFIG_SPL_CODE_MAX_SIZE=48880 +CONFIG_LZO=y +CONFIG_SYS_NAND_LARGEPAGE=y +CONFIG_CMD_MMC=y +CONFIG_SPL_BOARD_INFO_SIZE=512 +CONFIG_SYS_NAND_U_BOOT_START="CONFIG_SYS_TEXT_BASE" +CONFIG_MACH_RDA8810=y +CONFIG_SPL_EMMC_LOAD=y diff --git a/include/autoconf.mk.dep b/include/autoconf.mk.dep new file mode 100644 index 0000000000..b326967b26 --- /dev/null +++ b/include/autoconf.mk.dep @@ -0,0 +1,55 @@ +include/autoconf.mk: include/common.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/config.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/config_cmd_defaults.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/config_defaults.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/configs/rda8810.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/configs/rda_config_defaults.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/rda/tgt_ap_board_config.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/rda/tgt_ap_clock_config.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/rda/ddr_timing/8810p_16x2_260m_ddr2_u08.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/config_cmd_default.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/arch/mtdparts_def.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/rda/tgt_ap_flash_parts.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/config.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm-offsets.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/linux/bitops.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/types.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/bitops.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/proc/system.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/linux/config.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/linux/types.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/linux/posix_types.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/linux/stddef.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/posix_types.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/linux/string.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/string.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/ptrace.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/proc/ptrace.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/toolchain/bin/../lib/gcc/arm-linux-gnueabi/4.6.3/include/stdarg.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/errno.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm-generic/errno.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/part.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/ide.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/part_efi.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/flash.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/image.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/compiler.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/toolchain/bin/../lib/gcc/arm-linux-gnueabi/4.6.3/include/stddef.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/byteorder.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/linux/byteorder/little_endian.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/linux/byteorder/swab.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/linux/byteorder/generic.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/lmb.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/u-boot.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/command.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/global_data.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/mach-types.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/setup.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/u-boot-arm.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/vsprintf.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/u-boot/crc.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/net.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/cache.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/asm/system.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/bootstage.h \ + /xspace/OpenSource/GitHubLinux/OrangePi_i96/uboot/include/environment.h diff --git a/include/common.h b/include/common.h index 4b5841ef47..c679296877 100644 --- a/include/common.h +++ b/include/common.h @@ -112,6 +112,7 @@ typedef volatile unsigned char vu_char; #include <asm/arch/hardware.h> #endif +#include <errno.h> #include <part.h> #include <flash.h> #include <image.h> @@ -222,6 +223,31 @@ typedef void (interrupt_handler_t)(void *); #define MIN(x, y) min(x, y) #define MAX(x, y) max(x, y) +/* + * Return the absolute value of a number. + * + * This handles unsigned and signed longs, ints, shorts and chars. For all + * input types abs() returns a signed long. + * + * For 64-bit types, use abs64() + */ +#define abs(x) ({ \ + long ret; \ + if (sizeof(x) == sizeof(long)) { \ + long __x = (x); \ + ret = (__x < 0) ? -__x : __x; \ + } else { \ + int __x = (x); \ + ret = (__x < 0) ? -__x : __x; \ + } \ + ret; \ + }) + +#define abs64(x) ({ \ + s64 __x = (x); \ + (__x < 0) ? -__x : __x; \ + }) + #if defined(CONFIG_ENV_IS_EMBEDDED) #define TOTAL_MALLOC_LEN CONFIG_SYS_MALLOC_LEN #elif ( ((CONFIG_ENV_ADDR+CONFIG_ENV_SIZE) < CONFIG_SYS_MONITOR_BASE) || \ @@ -704,13 +730,6 @@ int gunzip(void *, int, unsigned char *, unsigned long *); int zunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp, int stoponerr, int offset); -/* lib/net_utils.c */ -#include <net.h> -static inline IPaddr_t getenv_IPaddr (char *var) -{ - return (string_to_ip(getenv(var))); -} - /* lib/qsort.c */ void qsort(void *base, size_t nmemb, size_t size, int(*compar)(const void *, const void *)); @@ -779,6 +798,13 @@ void fputc(int file, const char c); int ftstc(int file); int fgetc(int file); +/* lib/net_utils.c */ +#include <net.h> +static inline IPaddr_t getenv_IPaddr(char *var) +{ + return string_to_ip(getenv(var)); +} + /* * CONSOLE multiplexing. */ @@ -794,6 +820,10 @@ int pcmcia_init (void); #include <bootstage.h> +#ifdef CONFIG_SHOW_ACTIVITY +void show_activity(int arg); +#endif + /* Multicore arch functions */ #ifdef CONFIG_MP int cpu_status(int nr); diff --git a/include/config.h b/include/config.h new file mode 100644 index 0000000000..5d9cc1dded --- /dev/null +++ b/include/config.h @@ -0,0 +1,6 @@ +/* Automatically generated - do not edit */ +#define CONFIG_BOARDDIR board/rda/rda8810 +#include <config_cmd_defaults.h> +#include <config_defaults.h> +#include <configs/rda8810.h> +#include <asm/config.h> diff --git a/include/config.mk b/include/config.mk new file mode 100644 index 0000000000..659146438c --- /dev/null +++ b/include/config.mk @@ -0,0 +1,5 @@ +ARCH = arm +CPU = armv7 +BOARD = rda8810 +VENDOR = rda +SOC = rda diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index 2c6b8295fb..55f4f7a30b 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -15,7 +15,6 @@ #define CONFIG_CMD_AMBAPP /* AMBA Plug & Play Bus print utility */ #define CONFIG_CMD_ASKENV /* ask for env variable */ -#define CONFIG_CMD_AT91_SPIMUX /* AT91 MMC/SPI Mux Support */ #define CONFIG_CMD_BDI /* bdinfo */ #define CONFIG_CMD_BEDBUG /* Include BedBug Debugger */ #define CONFIG_CMD_BMP /* BMP support */ diff --git a/include/configs/HWW1U1A.h b/include/configs/HWW1U1A.h index 01597b965b..f08d78b91c 100644 --- a/include/configs/HWW1U1A.h +++ b/include/configs/HWW1U1A.h @@ -422,7 +422,7 @@ const char *hww1u1a_get_ps1(void); #define CONFIG_MD5 #define CONFIG_SHA1 #define CONFIG_CMD_MD5SUM -#define CONFIG_CMD_SHA1 +#define CONFIG_CMD_SHA1SUM #define CONFIG_CMD_ASKENV #define CONFIG_CMD_SETEXPR diff --git a/include/configs/MBX.h b/include/configs/MBX.h index cb5b023b58..79780bd1a3 100644 --- a/include/configs/MBX.h +++ b/include/configs/MBX.h @@ -87,7 +87,6 @@ * Command line configuration. */ #define CONFIG_CMD_NET -#define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM #define CONFIG_CMD_PCMCIA #define CONFIG_CMD_IDE diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h index 619a8002a7..84ba78f9e9 100644 --- a/include/configs/MigoR.h +++ b/include/configs/MigoR.h @@ -38,7 +38,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_PING #define CONFIG_CMD_NFS -#define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM #define CONFIG_CMD_SAVEENV diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index f2d33668d8..08fc4e8427 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -181,7 +181,7 @@ /* DDR Setup */ #define CONFIG_FSL_DDR3 -#define CONFIG_DDR_RAW_TIMING +#define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS 0x52 diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h index e057b1f945..e632d1bd37 100644 --- a/include/configs/P1023RDS.h +++ b/include/configs/P1023RDS.h @@ -310,9 +310,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_OF_BOARD_SETUP #define CONFIG_OF_STDOUT_VIA_ALIAS -#define CONFIG_SYS_64BIT_VSPRINTF -#define CONFIG_SYS_64BIT_STRTOUL - /* new uImage format support */ #define CONFIG_FIT #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ diff --git a/include/configs/P2020COME.h b/include/configs/P2020COME.h index 365322c6a5..28122ecc11 100644 --- a/include/configs/P2020COME.h +++ b/include/configs/P2020COME.h @@ -416,8 +416,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #endif /* Misc Extra Settings */ -#define CONFIG_SYS_64BIT_VSPRINTF 1 -#define CONFIG_SYS_64BIT_STRTOUL 1 #define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_DATE 1 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index da98f8f027..fe39d4e6e6 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -96,6 +96,11 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_OFFSET (512 * 1097) +#elif defined(CONFIG_NAND) +#define CONFIG_SYS_EXTRA_ENV_RELOC +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE +#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE \ @@ -186,10 +191,11 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE #endif -#define CONFIG_SYS_BR0_PRELIM \ +#define CONFIG_SYS_FLASH_BR_PRELIM \ (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V) -#define CONFIG_SYS_OR0_PRELIM ((0xf8000ff7 & ~OR_GPCM_SCY & ~OR_GPCM_EHTR) \ - | OR_GPCM_SCY_8 | OR_GPCM_EHTR_CLEAR) +#define CONFIG_SYS_FLASH_OR_PRELIM \ + ((0xf8000ff7 & ~OR_GPCM_SCY & ~OR_GPCM_EHTR) \ + | OR_GPCM_SCY_8 | OR_GPCM_EHTR_CLEAR) #define CONFIG_FSL_CPLD #define CPLD_BASE 0xffdf0000 /* CPLD registers */ @@ -221,6 +227,53 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_RAMBOOT #endif +#define CONFIG_NAND_FSL_ELBC +/* Nand Flash */ +#ifdef CONFIG_NAND_FSL_ELBC +#define CONFIG_SYS_NAND_BASE 0xffa00000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull +#else +#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE +#endif + +#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_MTD_NAND_VERIFY_WRITE +#define CONFIG_CMD_NAND +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) + +/* NAND flash config */ +#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ + | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ + | BR_PS_8 /* Port Size = 8 bit */ \ + | BR_MS_FCM /* MSEL = FCM */ \ + | BR_V) /* valid */ +#define CONFIG_SYS_NAND_OR_PRELIM (0xFFFC0000 /* length 256K */ \ + | OR_FCM_PGS /* Large Page*/ \ + | OR_FCM_CSCT \ + | OR_FCM_CST \ + | OR_FCM_CHT \ + | OR_FCM_SCY_1 \ + | OR_FCM_TRLX \ + | OR_FCM_EHTR) + +#ifdef CONFIG_NAND +#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ +#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ +#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ +#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ +#else +#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ +#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ +#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ +#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ +#endif +#else +#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ +#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ +#endif /* CONFIG_NAND_FSL_ELBC */ + #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} diff --git a/include/configs/adp-ag102.h b/include/configs/adp-ag102.h new file mode 100644 index 0000000000..a4628e4343 --- /dev/null +++ b/include/configs/adp-ag102.h @@ -0,0 +1,375 @@ +/* + * Copyright (C) 2011 Andes Technology Corporation + * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/arch/ag102.h> + +/* + * CPU and Board Configuration Options + */ +#define CONFIG_ADP_AG102 + +#define CONFIG_USE_INTERRUPT + +#define CONFIG_SKIP_LOWLEVEL_INIT + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_MEM_REMAP +#endif + +#ifdef CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_TEXT_BASE 0x04200000 +#else +#define CONFIG_SYS_TEXT_BASE 0x00000000 +#endif + +/* + * Timer + */ + +/* + * According to the discussion in u-boot mailing list before, + * CONFIG_SYS_HZ at 1000 is mandatory. + */ +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_CLK_FREQ (66000000 * 2) +#define VERSION_CLOCK CONFIG_SYS_CLK_FREQ + +/* + * Use Externel CLOCK or PCLK + */ +#undef CONFIG_FTRTC010_EXTCLK + +#ifndef CONFIG_FTRTC010_EXTCLK +#define CONFIG_FTRTC010_PCLK +#endif + +#ifdef CONFIG_FTRTC010_EXTCLK +#define TIMER_CLOCK 32768 /* CONFIG_FTRTC010_EXTCLK */ +#else +#define TIMER_CLOCK CONFIG_SYS_HZ /* CONFIG_FTRTC010_PCLK */ +#endif + +#define TIMER_LOAD_VAL 0xffffffff + +/* + * Real Time Clock + */ +#define CONFIG_RTC_FTRTC010 + +/* + * Real Time Clock Divider + * RTC_DIV_COUNT (OSC_CLK/OSC_5MHZ) + */ +#define OSC_5MHZ (5*1000000) +#define OSC_CLK (2*OSC_5MHZ) +#define RTC_DIV_COUNT (OSC_CLK/OSC_5MHZ) + +/* + * Serial console configuration + */ + +/* FTUART is a high speed NS 16C550A compatible UART */ +#define CONFIG_BAUDRATE 38400 +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_COM1 CONFIG_FTUART010_01_BASE +#define CONFIG_SYS_NS16550_REG_SIZE -4 +#define CONFIG_SYS_NS16550_CLK 33000000 /* AG102 */ + +/* valid baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* + * Ethernet + */ +#define CONFIG_NET_MULTI +#define CONFIG_PHY_MAX_ADDR 32 /* this comes from <linux/phy.h> */ +#define CONFIG_SYS_DISCOVER_PHY +#define CONFIG_FTGMAC100 +#define CONFIG_FTGMAC100_EGIGA + +#define CONFIG_BOOTDELAY 3 + +/* + * SD (MMC) controller + */ +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_DOS_PARTITION +#define CONFIG_FTSDC010 +#define CONFIG_FTSDC010_NUMBER 1 +#define CONFIG_FTSDC010_SDIO +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DATE +#define CONFIG_CMD_PING +#define CONFIG_CMD_IDE +#define CONFIG_CMD_FAT +#define CONFIG_CMD_ELF + +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS + +/* + * PCI + */ +#define CONFIG_PCI +#define CONFIG_FTPCI100 +#define CONFIG_FTPCI100_MEM_BASE 0xa0000000 +#define CONFIG_FTPCI100_IO_SIZE FTPCI100_BASE_IO_SIZE(256) /* 256M */ +#define CONFIG_FTPCI100_MEM_SIZE FTPCI100_MEM_SIZE(128) /* 128M */ +#define CONFIG_FTPCI100_MEM_BASE_SIZE1 0x50 + +#define CONFIG_PCI_MEM_BUS 0xa0000000 +#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS +#define CONFIG_PCI_MEM_SIZE 0x01000000 /* 256M */ + +#define CONFIG_PCI_IO_BUS 0x90000000 +#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS +#define CONFIG_PCI_IO_SIZE 0x00100000 /* 1M */ + +/* + * USB + */ +#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI) +#if defined(CONFIG_FTPCI100) +#define __io /* enable outl & inl */ +#define CONFIG_CMD_USB +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 5 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_EHCI +#define CONFIG_PCI_EHCI_DEVICE 0 +#define CONFIG_USB_EHCI_PCI +#define CONFIG_PREBOOT "usb start;" +#endif /* #if defiend(CONFIG_FTPCI100) */ +#endif /* #if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI) */ + +/* + * IDE/ATA stuff + */ +#define __io +#define CONFIG_IDE_AHB +#define CONFIG_IDE_FTIDE020 + +#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */ +#undef CONFIG_IDE_LED /* no led for ide supported */ +#define CONFIG_IDE_RESET 1 /* reset for ide supported */ +#define CONFIG_IDE_PREINIT 1 /* preinit for ide */ + +/* max: 2 IDE busses */ +#define CONFIG_SYS_IDE_MAXBUS 1 /* origin: 2 */ +/* max: 2 drives per IDE bus */ +#define CONFIG_SYS_IDE_MAXDEVICE 1 /* origin: (MAXBUS * 2) */ + +#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_FTIDE020S_BASE +#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 +#define CONFIG_SYS_ATA_IDE1_OFFSET 0x0000 + +#define CONFIG_SYS_ATA_DATA_OFFSET 0x0000 /* for data I/O */ +#define CONFIG_SYS_ATA_REG_OFFSET 0x0000 /* for normal regs access */ +#define CONFIG_SYS_ATA_ALT_OFFSET 0x0000 /* for alternate regs */ + +#define CONFIG_MAC_PARTITION +#define CONFIG_DOS_PARTITION +#define CONFIG_SUPPORT_VFAT + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "NDS32 # " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* max number of command args */ +#define CONFIG_SYS_MAXARGS 16 + +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +/* + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) + +/* + * size in bytes reserved for initial data +*/ +#define CONFIG_SYS_GBL_DATA_SIZE 128 + +/* + * AHB Controller configuration + */ +#define CONFIG_FTAHBC020S + +#ifdef CONFIG_FTAHBC020S +#include <faraday/ftahbc020s.h> + +/* Address of PHYS_SDRAM_0 before memory remap is at 0x(100)00000 */ +#define CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE 0x100 + +/* + * CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6: this define is used in lowlevel_init.S, + * hence we cannot use FTAHBC020S_BSR_SIZE(2048) since it will use ffs() wrote + * in C language. + */ +#define CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6 \ + (FTAHBC020S_SLAVE_BSR_BASE(CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE) | \ + FTAHBC020S_SLAVE_BSR_SIZE(0xb)) +#endif + +/* + * Watchdog + */ +#define CONFIG_FTWDT010_WATCHDOG + +/* + * PCU Power Control Unit configuration + */ +#define CONFIG_ANDES_PCU + +#ifdef CONFIG_ANDES_PCU +#include <andestech/andes_pcu.h> + +#endif + +/* + * DDR DRAM controller configuration + */ +#define CONFIG_DWCDDR21MCTL + +#ifdef CONFIG_DWCDDR21MCTL +#include <synopsys/dwcddr21mctl.h> +/* DCR: + * 2GB: 0x000025d2, 2GB (1Gb x8 2 ranks) Micron/innoDisk/Transcend + * 1GB: 0x000021d2, 1GB (1Gb x8 1 rank) Micron/Transcend/innoDisk + * 512MB: 0x000025cc, Micron 512MB (512Mb x16 2 ranks) + * 512MB: 0x000021ca, Trenscend/innoDisk 512MB (512Mb x8 1 rank) + * 256MB: 0x000020d4, Micron 256MB (1Gb x16 1 ranks) + */ +#define CONFIG_SYS_DWCDDR21MCTL_CCR 0x00020004 +#define CONFIG_SYS_DWCDDR21MCTL_CCR2 (DWCDDR21MCTL_CCR_DTT(0x1) | \ + DWCDDR21MCTL_CCR_DFTLM(0x4) | \ + DWCDDR21MCTL_CCR_HOSTEN(0x1)) + +/* 0x04: 0x000020d4 */ +#define CONFIG_SYS_DWCDDR21MCTL_DCR 0x000020ca + +/* 0x08: 0x0000000f */ +#define CONFIG_SYS_DWCDDR21MCTL_IOCR 0x0000000f + +/* 0x10: 0x00034812 */ +#define CONFIG_SYS_DWCDDR21MCTL_DRR (DWCDDR21MCTL_DRR_TRFC(0x12) | \ + DWCDDR21MCTL_DRR_TRFPRD(0x0348)) +/* 0x24 */ +#define CONFIG_SYS_DWCDDR21MCTL_DLLCR0 DWCDDR21MCTL_DLLCR_PHASE(0x0) + +/* 0x4c: 0x00000040 */ +#define CONFIG_SYS_DWCDDR21MCTL_RSLR0 0x00000040 + +/* 0x5c: 0x000055CF */ +#define CONFIG_SYS_DWCDDR21MCTL_RDGR0 0x000055cf + +/* 0xa4: 0x00100000 */ +#define CONFIG_SYS_DWCDDR21MCTL_DTAR (DWCDDR21MCTL_DTAR_DTBANK(0x0) | \ + DWCDDR21MCTL_DTAR_DTROW(0x0100) | \ + DWCDDR21MCTL_DTAR_DTCOL(0x0)) +/* 0x1f0: 0x00000852 */ +#define CONFIG_SYS_DWCDDR21MCTL_MR (DWCDDR21MCTL_MR_WR(0x4) | \ + DWCDDR21MCTL_MR_CL(0x5) | \ + DWCDDR21MCTL_MR_BL(0x2)) +#endif + +/* + * Physical Memory Map + */ +#if defined(CONFIG_MEM_REMAP) || defined(CONFIG_SKIP_LOWLEVEL_INIT) +#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ +#if defined(CONFIG_MEM_REMAP) +#define PHYS_SDRAM_0_AT_INIT 0x80000000 /* SDRAM Bank #1 before remap*/ +#endif +#else /* !CONFIG_SKIP_LOWLEVEL_INIT && !CONFIG_MEM_REMAP */ +#define PHYS_SDRAM_0 0x80000000 /* SDRAM Bank #1 */ +#endif + +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define PHYS_SDRAM_0_SIZE 0x10000000 /* 256 MB */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0 + +#ifdef CONFIG_MEM_REMAP +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0xA0000 - \ + GENERATED_GBL_DATA_SIZE) +#else +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ + GENERATED_GBL_DATA_SIZE) +#endif /* CONFIG_MEM_REMAP */ + +/* + * Load address and memory test area should agree with + * board/faraday/a320/config.mk + * Be careful not to overwrite U-boot itself. + */ +#define CONFIG_SYS_LOAD_ADDR 0x0CF00000 + +/* memtest works on 63 MB in DRAM */ +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0 +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + 0x03F00000) + +/* + * Static memory controller configuration + */ + +/* + * FLASH and environment organization + */ +#define CONFIG_SYS_NO_FLASH + +/* + * Env Storage Settings + */ +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE 4096 + +#endif /* __CONFIG_H */ diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index b0dd2f0af6..827a6159f2 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -146,7 +146,7 @@ #define CONFIG_CMD_MMC /* MMC support */ #define CONFIG_CMD_NAND /* NAND support */ #define CONFIG_CMD_DHCP -#define CONFIG_CMD_PING +#undef CONFIG_CMD_PING #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ @@ -174,7 +174,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ /* NAND devices */ -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #define CONFIG_JFFS2_NAND /* nand device jffs2 lives on */ @@ -326,7 +325,7 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (45 * 1024) +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000000 diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index b5f75d1e8d..6766ee23d3 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -145,7 +145,7 @@ #define CONFIG_CMD_MMC /* MMC support */ #define CONFIG_CMD_NAND /* NAND support */ #define CONFIG_CMD_DHCP -#define CONFIG_CMD_PING +#undef CONFIG_CMD_PING #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ @@ -173,8 +173,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ /* NAND devices */ -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ - #define CONFIG_JFFS2_NAND /* nand device jffs2 lives on */ #define CONFIG_JFFS2_DEV "nand0" @@ -326,7 +324,7 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (45 * 1024) +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000000 diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index 83992461f9..f424e5a5bd 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -283,8 +283,6 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 - -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* Ethernet */ diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 6a02188108..159857d32f 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -107,7 +107,6 @@ #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_LOADS #define CONFIG_CMD_PING diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h index 99856ebfdf..71faf1cc9f 100644 --- a/include/configs/cam_enc_4xx.h +++ b/include/configs/cam_enc_4xx.h @@ -37,7 +37,7 @@ #define CONFIG_HOSTNAME cam_enc_4xx -#define BOARD_LATE_INIT +#define CONFIG_BOARD_LATE_INIT #define CONFIG_CAM_ENC_LED_MASK 0x0fc00000 /* Memory Info */ diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index fe91c10409..b28bd8e313 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -156,6 +156,7 @@ #define CONFIG_DRIVER_OMAP34XX_I2C #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_I2C_MULTI_BUS /* * TWL4030 diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 77dd0a2d1e..8ed37a58c2 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -33,6 +33,15 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #endif +#ifdef CONFIG_SRIOBOOT_SLAVE +/* Set 1M boot space */ +#define CONFIG_SYS_SRIOBOOT_SLAVE_ADDR (CONFIG_SYS_TEXT_BASE & 0xfff00000) +#define CONFIG_SYS_SRIOBOOT_SLAVE_ADDR_PHYS \ + (0x300000000ull | CONFIG_SYS_SRIOBOOT_SLAVE_ADDR) +#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CONFIG_SYS_NO_FLASH +#endif + /* High Level Configuration Options */ #define CONFIG_BOOKE #define CONFIG_E500 /* BOOKE e500 family */ @@ -68,7 +77,9 @@ #define CONFIG_ENV_OVERWRITE #ifdef CONFIG_SYS_NO_FLASH +#ifndef CONFIG_SRIOBOOT_SLAVE #define CONFIG_ENV_IS_NOWHERE +#endif #else #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -97,6 +108,12 @@ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE #define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE) +#elif defined(CONFIG_SRIOBOOT_SLAVE) +#define CONFIG_ENV_IS_IN_REMOTE +#define CONFIG_ENV_ADDR 0xffe20000 +#define CONFIG_ENV_SIZE 0x2000 +#elif defined(CONFIG_ENV_IS_NOWHERE) +#define CONFIG_ENV_SIZE 0x2000 #else #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) @@ -373,6 +390,54 @@ #define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */ /* + * SRIOBOOT - MASTER + */ +#ifdef CONFIG_SRIOBOOT_MASTER +/* master port for srioboot*/ +#define CONFIG_SRIOBOOT_MASTER_PORT 0 +/* #define CONFIG_SRIOBOOT_MASTER_PORT 1 */ +/* + * for slave u-boot IMAGE instored in master memory space, + * PHYS must be aligned based on the SIZE + */ +#define CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1 0xfef080000ull +#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1 0xfff80000ull +#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE 0x80000 /* 512K */ +#define CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2 0xfef080000ull +#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2 0x3fff80000ull +/* + * for slave UCODE instored in master memory space, + * PHYS must be aligned based on the SIZE + */ +#define CONFIG_SRIOBOOT_SLAVE_UCODE_LAW_PHYS 0xfef020000ull +#define CONFIG_SRIOBOOT_SLAVE_UCODE_SRIO_PHYS 0x3ffe00000ull +#define CONFIG_SRIOBOOT_SLAVE_UCODE_SIZE 0x10000 /* 64K */ +/* + * for slave ENV instored in master memory space, + * PHYS must be aligned based on the SIZE + */ +#define CONFIG_SRIOBOOT_SLAVE_ENV_LAW_PHYS 0xfef060000ull +#define CONFIG_SRIOBOOT_SLAVE_ENV_SRIO_PHYS 0x3ffe20000ull +#define CONFIG_SRIOBOOT_SLAVE_ENV_SIZE 0x20000 /* 128K */ +/* slave core release by master*/ +#define CONFIG_SRIOBOOT_SLAVE_HOLDOFF +#define CONFIG_SRIOBOOT_SLAVE_BRR_OFFSET 0xe00e4 +#define CONFIG_SRIOBOOT_SLAVE_RELEASE_MASK 0x00000001 /* release core 0 */ +#endif + +/* + * SRIOBOOT - SLAVE + */ +#ifdef CONFIG_SRIOBOOT_SLAVE +/* slave port for srioboot */ +#define CONFIG_SRIOBOOT_SLAVE_PORT0 +/* #define CONFIG_SRIOBOOT_SLAVE_PORT1 */ +#define CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR 0xFFE00000 +#define CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR_PHYS \ + (0x300000000ull | CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR) +#endif + +/* * eSPI - Enhanced SPI */ #define CONFIG_FSL_ESPI @@ -492,6 +557,16 @@ #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND #define CONFIG_SYS_QE_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE) +#elif defined(CONFIG_SRIOBOOT_SLAVE) +/* + * Slave has no ucode locally, it can fetch this from remote. When implementing + * in two corenet boards, slave's ucode could be stored in master's memory + * space, the address can be mapped from slave TLB->slave LAW-> + * slave SRIO outbound window->master inbound window->master LAW-> + * the ucode address in master's NOR flash. + */ +#define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR #define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEF000000 diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h index 4532e4f4fd..781878ef39 100644 --- a/include/configs/da830evm.h +++ b/include/configs/da830evm.h @@ -111,7 +111,6 @@ #define CONFIG_SYS_NAND_CS 3 #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE #define CONFIG_SYS_NAND_PAGE_2K -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #define CONFIG_SYS_CLE_MASK 0x10 #define CONFIG_SYS_ALE_MASK 0x8 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ diff --git a/include/configs/debris.h b/include/configs/debris.h index 60c7c4058f..303630d7d7 100644 --- a/include/configs/debris.h +++ b/include/configs/debris.h @@ -148,7 +148,7 @@ #define CONFIG_CMD_ELF #define CONFIG_CMD_I2C #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_KGBD +#define CONFIG_CMD_KGDB #define CONFIG_CMD_PCI #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h new file mode 100644 index 0000000000..9f15ffb0fd --- /dev/null +++ b/include/configs/devkit3250.h @@ -0,0 +1,117 @@ +/* + * Embest/Timll DevKit3250 board configuration file + * + * Copyright (C) 2011 Vladimir Zapolskiy <vz@mleia.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#ifndef __CONFIG_DEVKIT3250_H__ +#define __CONFIG_DEVKIT3250_H__ + +/* SoC and board defines */ +#include <asm/sizes.h> +#include <asm/arch/cpu.h> + +/* + * Define DevKit3250 machine type by hand until it lands in mach-types + */ +#define MACH_TYPE_DEVKIT3250 3697 +#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT3250 + +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BOARD_EARLY_INIT_F + +/* + * Memory configurations + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_STACKSIZE SZ_32K +#define CONFIG_SYS_MALLOC_LEN SZ_1M +#define CONFIG_SYS_GBL_DATA_SIZE 128 +#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE +#define CONFIG_SYS_SDRAM_SIZE SZ_64M +#define CONFIG_SYS_TEXT_BASE 0x83FA0000 +#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + SZ_32K) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - SZ_1M) + +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32K) + +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \ + - GENERATED_GBL_DATA_SIZE) + +/* + * Serial Driver + */ +#define CONFIG_SYS_LPC32XX_UART 2 /* UART2 */ +#define CONFIG_BAUDRATE 115200 + +/* + * NOR Flash + */ +#define CONFIG_CMD_FLASH +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 71 +#define CONFIG_SYS_FLASH_BASE EMC_CS0_BASE +#define CONFIG_SYS_FLASH_SIZE SZ_4M +#define CONFIG_SYS_FLASH_CFI + +/* + * U-Boot General Configurations + */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING +#define CONFIG_VERSION_VARIABLE +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DOS_PARTITION + +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE SZ_128K + +/* + * U-Boot Commands + */ +#include <config_cmd_default.h> +#define CONFIG_CMD_CACHE + +/* + * Boot Linux + */ +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_ZERO_BOOTDELAY_CHECK +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_BOOTARGS "console=ttyS2,115200n8" +#define CONFIG_LOADADDR 0x80008000 + +/* + * Include SoC specific configuration + */ +#include <asm/arch/config.h> + +#endif /* __CONFIG_DEVKIT3250_H__*/ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index eb7c376780..248a5b2fa3 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -324,7 +324,7 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */ +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/ diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h index d5173349c4..1f660235f0 100644 --- a/include/configs/digsy_mtc.h +++ b/include/configs/digsy_mtc.h @@ -119,7 +119,6 @@ #ifdef CONFIG_VIDEO #define CONFIG_CMD_BMP #endif -#define CONFIG_CMD_DFL #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index 146819712d..2cd20279be 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -34,10 +34,12 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME dlvsion-10g -#define CONFIG_IDENT_STRING " dlvision-10g 0.02" +#define CONFIG_IDENT_STRING " dlvision-10g 0.03" #include "amcc-common.h" -#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R +#define CONFIG_MISC_INIT_R #define CONFIG_LAST_STAGE_INIT #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ @@ -80,6 +82,7 @@ * Commands additional to the ones defined in amcc-common.h */ #define CONFIG_CMD_CACHE +#define CONFIG_CMD_DTT #undef CONFIG_CMD_EEPROM /* @@ -115,7 +118,7 @@ /* Temp sensor/hwmon/dtt */ #define CONFIG_DTT_LM63 1 /* National LM63 */ -#define CONFIG_DTT_SENSORS { 0x4c, 0x4e } /* Sensor addresses */ +#define CONFIG_DTT_SENSORS { 0x4c, 0x4e, 0x18 } /* Sensor addresses */ #define CONFIG_DTT_PWM_LOOKUPTABLE \ { { 46, 10 }, { 48, 14 }, { 50, 19 }, { 52, 23 },\ { 54, 27 }, { 56, 31 }, { 58, 36 }, { 60, 40 } } diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h index 0f2f9a2743..76f9eeaed8 100644 --- a/include/configs/dreamplug.h +++ b/include/configs/dreamplug.h @@ -148,4 +148,6 @@ */ #define CONFIG_DISPLAY_CPUINFO +#define CONFIG_OF_LIBFDT + #endif /* _CONFIG_DREAMPLUG_H */ diff --git a/include/configs/ea20.h b/include/configs/ea20.h index e059b30826..88b085d4a7 100644 --- a/include/configs/ea20.h +++ b/include/configs/ea20.h @@ -31,7 +31,7 @@ #define CONFIG_SYS_USE_NAND #define CONFIG_DRIVER_TI_EMAC_USE_RMII #define CONFIG_BOARD_EARLY_INIT_F -#define BOARD_LATE_INIT +#define CONFIG_BOARD_LATE_INIT #define CONFIG_VIDEO #define CONFIG_PREBOOT @@ -203,7 +203,6 @@ #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* SPI Flash */ diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h index eb05e2a0b0..21c471adf6 100644 --- a/include/configs/eb_cpux9k2.h +++ b/include/configs/eb_cpux9k2.h @@ -288,8 +288,6 @@ #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 -#define CONFIG_SYS_64BIT_VSPRINTF 1 - /* Status LED's */ #define CONFIG_STATUS_LED 1 diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h index f19360d501..221d3e055d 100644 --- a/include/configs/ep8260.h +++ b/include/configs/ep8260.h @@ -325,7 +325,6 @@ #define CONFIG_CMD_SDRAM #define CONFIG_CMD_SNTP -#undef CONFIG_CMD_DCR #undef CONFIG_CMD_XIMG /* Where do the internal registers live? */ diff --git a/include/configs/flea3.h b/include/configs/flea3.h index f046a587be..dd7c73f3c7 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -48,8 +48,6 @@ /* Set TEXT at the beginning of the NOR flash */ #define CONFIG_SYS_TEXT_BASE 0xA0000000 -#define CONFIG_SYS_64BIT_VSPRINTF - /* This is required to setup the ESDC controller */ #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h index 3c59ff4922..9efbb8e34c 100644 --- a/include/configs/gdppc440etx.h +++ b/include/configs/gdppc440etx.h @@ -50,6 +50,10 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f*/ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ +#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ +#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ +#define CONFIG_AUTOBOOT_STOP_STR " " + /* * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) diff --git a/include/configs/gplugd.h b/include/configs/gplugd.h index 462cc7e16c..efff3098a5 100644 --- a/include/configs/gplugd.h +++ b/include/configs/gplugd.h @@ -70,7 +70,6 @@ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ #include <config_cmd_default.h> #define CONFIG_CMD_I2C -#define CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA #define CONFIG_CMD_USB #define CONFIG_CMD_EXT2 diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h index 0859371387..6d2d4fb91d 100644 --- a/include/configs/hawkboard.h +++ b/include/configs/hawkboard.h @@ -127,7 +127,6 @@ #define CFG_DAVINCI_STD_NAND_LAYOUT #define CONFIG_SYS_NAND_CS 3 #define CONFIG_SYS_NAND_PAGE_2K -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ /* Max number of NAND devices */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE_LIST { 0x62000000, } diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h new file mode 100644 index 0000000000..85856f290e --- /dev/null +++ b/include/configs/ib62x0.h @@ -0,0 +1,152 @@ +/* + * Copyright (C) 2011-2012 + * Gerald Kerma <dreagle@doukki.net> + * Luka Perkov <uboot@lukaperkov.net> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef _CONFIG_IB62x0_H +#define _CONFIG_IB62x0_H + +/* + * Version number information + */ +#define CONFIG_IDENT_STRING " RaidSonic ICY BOX IB-NAS62x0" + +/* + * High level configuration options + */ +#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD /* SOC Family Name */ +#define CONFIG_KW88F6281 /* SOC Name */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ + +/* + * Machine type + */ +#define CONFIG_MACH_TYPE MACH_TYPE_NAS6210 + +/* + * Compression configuration + */ +#define CONFIG_BZIP2 +#define CONFIG_LZMA +#define CONFIG_LZO + +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* declare no flash (NOR/SPI) */ +#define CONFIG_SYS_MVFS +#include <config_cmd_default.h> +#define CONFIG_CMD_ENV +#define CONFIG_CMD_IDE +#define CONFIG_CMD_MII +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +#undef CONFIG_SYS_PROMPT +#define CONFIG_SYS_PROMPT "ib62x0 => " + +/* + * Environment variables configuration + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SECT_SIZE 0x20000 +#else +#define CONFIG_ENV_IS_NOWHERE +#endif +#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_OFFSET 0x80000 + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND \ + "setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \ + "ubi part root; " \ + "ubifsmount root; " \ + "ubifsload 0x800000 ${kernel}; " \ + "ubifsload 0x1100000 ${initrd}; " \ + "bootm 0x800000 0x1100000" + +#define CONFIG_MTDPARTS \ + "mtdparts=orion_nand:" \ + "0x80000@0x0(uboot)," \ + "0x20000@0x80000(uboot_env)," \ + "-@0xa0000(root)\0" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=console=ttyS0,115200\0" \ + "mtdids=nand0=orion_nand\0" \ + "mtdparts="CONFIG_MTDPARTS \ + "kernel=/boot/uImage\0" \ + "initrd=/boot/uInitrd\0" \ + "bootargs_root=ubi.mtd=2 root=ubi0:root rootfstype=ubifs\0" + +/* + * Ethernet driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ +#define CONFIG_PHY_BASE_ADR 0 +#undef CONFIG_RESET_PHY_R +#endif /* CONFIG_CMD_NET */ + +/* + * SATA driver configuration + */ +#ifdef CONFIG_CMD_IDE +#define __io +#define CONFIG_IDE_PREINIT +#define CONFIG_DOS_PARTITION +#define CONFIG_MVSATA_IDE_USE_PORT0 +#define CONFIG_MVSATA_IDE_USE_PORT1 +#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET +#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET +#endif /* CONFIG_CMD_IDE */ + +/* + * RTC driver configuration + */ +#ifdef CONFIG_CMD_DATE +#define CONFIG_RTC_MV +#endif /* CONFIG_CMD_DATE */ + +/* + * File system + */ +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_RBTREE +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_CMD_MTDPARTS + +#endif /* _CONFIG_IB62x0_H */ diff --git a/include/configs/igep0030.h b/include/configs/igep0030.h deleted file mode 100644 index bf39ba56d7..0000000000 --- a/include/configs/igep0030.h +++ /dev/null @@ -1,261 +0,0 @@ -/* - * (C) Copyright 2010 - * ISEE 2007 SL, <www.iseebcn.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H -#include <asm/sizes.h> - -/* - * High Level Configuration Options - */ -#define CONFIG_OMAP 1 /* in a TI OMAP core */ -#define CONFIG_OMAP34XX 1 /* which is a 34XX */ -#define CONFIG_OMAP3_IGEP0030 1 /* working with IGEP0030 */ - -#define CONFIG_SDRC /* The chip has SDRC controller */ - -#include <asm/arch/cpu.h> -#include <asm/arch/omap3.h> - -/* - * Display CPU and Board information - */ -#define CONFIG_DISPLAY_CPUINFO 1 -#define CONFIG_DISPLAY_BOARDINFO 1 - -/* Clock Defines */ -#define V_OSCK 26000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) - -#define CONFIG_MISC_INIT_R - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 -#define CONFIG_REVISION_TAG 1 - -#define CONFIG_OF_LIBFDT 1 - -/* - * NS16550 Configuration - */ - -#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ - -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK - -/* select serial console configuration */ -#define CONFIG_CONS_INDEX 3 -#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 3 - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_MMC 1 -#define CONFIG_OMAP_HSMMC 1 -#define CONFIG_DOS_PARTITION 1 - -/* USB */ -#define CONFIG_MUSB_UDC 1 -#define CONFIG_USB_OMAP3 1 -#define CONFIG_TWL4030_USB 1 - -/* USB device configuration */ -#define CONFIG_USB_DEVICE 1 -#define CONFIG_USB_TTY 1 -#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 - -/* Change these to suit your needs */ -#define CONFIG_USBD_VENDORID 0x0451 -#define CONFIG_USBD_PRODUCTID 0x5678 -#define CONFIG_USBD_MANUFACTURER "Texas Instruments" -#define CONFIG_USBD_PRODUCT_NAME "IGEP" - -/* commands to include */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_EXT2 /* EXT2 Support */ -#define CONFIG_CMD_FAT /* FAT support */ -#define CONFIG_CMD_I2C /* I2C serial bus support */ -#define CONFIG_CMD_MMC /* MMC support */ -#define CONFIG_CMD_ONENAND /* ONENAND support */ -#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ -#define CONFIG_MTD_DEVICE - -#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ -#undef CONFIG_CMD_NFS /* nfs */ -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_IMLS /* List all found images */ - -#define CONFIG_SYS_NO_FLASH -#define CONFIG_HARD_I2C 1 -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 1 -#define CONFIG_SYS_I2C_BUS 0 -#define CONFIG_SYS_I2C_BUS_SELECT 1 -#define CONFIG_DRIVER_OMAP34XX_I2C 1 - -/* - * TWL4030 - */ -#define CONFIG_TWL4030_POWER 1 - -#define CONFIG_BOOTDELAY 3 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "usbtty=cdc_acm\0" \ - "loadaddr=0x82000000\0" \ - "usbtty=cdc_acm\0" \ - "console=ttyS2,115200n8\0" \ - "mpurate=500\0" \ - "vram=12M\0" \ - "dvimode=1024x768MR-16@60\0" \ - "defaultdisplay=dvi\0" \ - "mmcdev=0\0" \ - "mmcroot=/dev/mmcblk0p2 rw\0" \ - "mmcrootfstype=ext3 rootwait\0" \ - "nandroot=/dev/mtdblock4 rw\0" \ - "nandrootfstype=jffs2\0" \ - "mmcargs=setenv bootargs console=${console} " \ - "mpurate=${mpurate} " \ - "vram=${vram} " \ - "omapfb.mode=dvi:${dvimode} " \ - "omapfb.debug=y " \ - "omapdss.def_disp=${defaultdisplay} " \ - "root=${mmcroot} " \ - "rootfstype=${mmcrootfstype}\0" \ - "nandargs=setenv bootargs console=${console} " \ - "mpurate=${mpurate} " \ - "vram=${vram} " \ - "omapfb.mode=dvi:${dvimode} " \ - "omapfb.debug=y " \ - "omapdss.def_disp=${defaultdisplay} " \ - "root=${nandroot} " \ - "rootfstype=${nandrootfstype}\0" \ - "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source ${loadaddr}\0" \ - "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "bootm ${loadaddr}\0" \ - "nandboot=echo Booting from onenand ...; " \ - "run nandargs; " \ - "onenand read ${loadaddr} 280000 400000; " \ - "bootm ${loadaddr}\0" \ - -#define CONFIG_BOOTCOMMAND \ - "if mmc rescan ${mmcdev}; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loaduimage; then " \ - "run mmcboot; " \ - "else run nandboot; " \ - "fi; " \ - "fi; " \ - "else run nandboot; fi" - -#define CONFIG_AUTO_COMPLETE 1 - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_SYS_PROMPT "U-Boot # " -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) - -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ - /* works on */ -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ - 0x01F00000) /* 31MB */ - -#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ - /* load address */ - -#define CONFIG_SYS_MONITOR_LEN (256 << 10) - -/* - * OMAP3 has 12 GP timers, they can be driven by the system clock - * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). - * This rate is divided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ -#define CONFIG_SYS_HZ 1000 - -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - -/* - * Physical Memory Map - * - */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ -#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 -#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 meg */ -#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 - -/* - * FLASH and environment organization - */ - -#define PISMO1_ONEN_SIZE GPMC_SIZE_128M /* Configure the PISMO */ - -#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP - -#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ - -#define CONFIG_ENV_IS_IN_ONENAND 1 -#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ -#define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - -#endif /* __CONFIG_H */ diff --git a/include/configs/igep0020.h b/include/configs/igep00x0.h index c2fcdffdae..a99f332a85 100644 --- a/include/configs/igep0020.h +++ b/include/configs/igep00x0.h @@ -1,5 +1,7 @@ /* - * (C) Copyright 2010 + * Common configuration settings for IGEP technology based boards + * + * (C) Copyright 2012 * ISEE 2007 SL, <www.iseebcn.com> * * This program is free software; you can redistribute it and/or @@ -18,8 +20,9 @@ * MA 02111-1307 USA */ -#ifndef __CONFIG_H -#define __CONFIG_H +#ifndef __IGEP00X0_H +#define __IGEP00X0_H + #include <asm/sizes.h> /* @@ -27,7 +30,6 @@ */ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ -#define CONFIG_OMAP3_IGEP0020 1 /* working with IGEP0020 */ #define CONFIG_SDRC /* The chip has SDRC controller */ @@ -72,7 +74,8 @@ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ + 115200} #define CONFIG_GENERIC_MMC 1 #define CONFIG_MMC 1 #define CONFIG_OMAP_HSMMC 1 @@ -133,7 +136,7 @@ "loadaddr=0x82000000\0" \ "usbtty=cdc_acm\0" \ "console=ttyS2,115200n8\0" \ - "mpurate=500\0" \ + "mpurate=auto\0" \ "vram=12M\0" \ "dvimode=1024x768MR-16@60\0" \ "defaultdisplay=dvi\0" \ @@ -158,9 +161,9 @@ "omapdss.def_disp=${defaultdisplay} " \ "root=${nandroot} " \ "rootfstype=${nandrootfstype}\0" \ - "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source ${loadaddr}\0" \ + "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ + "importbootenv=echo Importing environment from mmc ...; " \ + "env import -t $loadaddr $filesize\0" \ "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ @@ -172,15 +175,19 @@ #define CONFIG_BOOTCOMMAND \ "if mmc rescan ${mmcdev}; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loaduimage; then " \ - "run mmcboot; " \ - "else run nandboot; " \ - "fi; " \ - "fi; " \ - "else run nandboot; fi" + "echo SD/MMC found on device ${mmcdev};" \ + "if run loadbootenv; then " \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "if run loaduimage; then " \ + "run mmcboot;" \ + "fi;" \ + "fi;" \ + "run nandboot;" \ #define CONFIG_AUTO_COMPLETE 1 @@ -269,4 +276,4 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -#endif /* __CONFIG_H */ +#endif /* __IGEP00X0_H */ diff --git a/include/configs/ima3-mx53.h b/include/configs/ima3-mx53.h new file mode 100644 index 0000000000..ea48d64635 --- /dev/null +++ b/include/configs/ima3-mx53.h @@ -0,0 +1,269 @@ +/* + * (C) Copyright 2012, Stefano Babic <sbabic@denx.de> + * + * Copyright (C) 2010 Freescale Semiconductor, Inc. + * + * Configuration settings for the MX53-EVK Freescale board. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* SOC type must be included before imx-regs.h */ +#define CONFIG_MX53 +#include <asm/arch/imx-regs.h> +#include <asm/arch/mx5x_pins.h> + +#define CONFIG_SYS_MX5_HCLK 24000000 +#define CONFIG_SYS_MX5_CLK32 32768 + +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG + +#define CONFIG_OF_LIBFDT + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F + +/* Enable GPIOs */ +#define CONFIG_MXC_GPIO + +/* UART */ +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR + +/* MMC */ +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_NUM 1 + +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_DOS_PARTITION + +/* Ethernet on FEC */ +#define CONFIG_NET_MULTI +#define CONFIG_MII +#define CONFIG_DISCOVER_PHY + +#define CONFIG_FEC_MXC +#define IMX_FEC_BASE FEC_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x01 +#define CONFIG_PHY_ADDR CONFIG_FEC_MXC_PHYADDR +#define CONFIG_RESET_PHY_R +#define CONFIG_FEC_MXC_NO_ANEG +#define CONFIG_PRIME "FEC0" + +/* SPI */ +#define CONFIG_HARD_SPI +#define CONFIG_MXC_SPI +#define CONFIG_DEFAULT_SPI_BUS 1 +#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 + +/* SPI FLASH - not used for environment */ +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_CS (IOMUX_TO_GPIO(MX53_PIN_CSI0_D11) \ + << 8) | 0 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} + +/* Command definition */ +#include <config_cmd_default.h> +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_MMC +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_MTDPARTS +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_CMD_GPIO + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ +#define CONFIG_SYS_TEXT_BASE 0xf0001400 /* uboot in nor flash */ + +#define CONFIG_ARP_TIMEOUT 200UL + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_PROMPT "IMA3 MX53 U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START 0x70000000 +#define CONFIG_SYS_MEMTEST_END 0x10000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_SYS_HZ 1000 +#define CONFIG_CMDLINE_EDITING + +/* Stack sizes */ +#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 CSD0_BASE_ADDR +#define PHYS_SDRAM_1_SIZE (1024 * 1024 * 1024) + +#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define MTDIDS_DEFAULT "nor0=f0000000.flash" + +/* FLASH and environment organization */ + +#define CONFIG_SYS_FLASH_BASE 0xF0000000 +#define CONFIG_SYS_FLASH_CFI /* Flash is CFI conformant */ +#define CONFIG_FLASH_CFI_DRIVER /* Use the common driver */ +#define CONFIG_FLASH_CFI_MTD /* with MTD support */ +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 1024 + +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) + +#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_ENV_SECT_SIZE 0x20000 +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ + CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE + +/* + * Default environment and default scripts + * to update uboot and load kernel + */ + +#define HOSTNAME ima3-mx53 +#define xstr(s) str(s) +#define str(s) #s + +#define CONFIG_HOSTNAME ima3-mx53 +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs root=/dev/ram0 rw\0" \ + "addip_sta=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ + "addip=if test -n ${ipdyn};then run addip_dyn;" \ + "else run addip_sta;fi\0" \ + "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ + "addtty=setenv bootargs ${bootargs}" \ + " console=${console},${baudrate}\0" \ + "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ + "console=ttymxc3\0" \ + "loadaddr=70800000\0" \ + "kernel_addr_r=70800000\0" \ + "ramdisk_addr_r=71000000\0" \ + "hostname=" xstr(CONFIG_HOSTNAME) "\0" \ + "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \ + "ramdisk_file=" xstr(CONFIG_HOSTNAME) "/uRamdisk\0" \ + "mmcargs=setenv bootargs root=${mmcroot} " \ + "rootfstype=${mmcrootfstype}\0" \ + "mmcroot=/dev/mmcblk0p3 rw\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs addip addtty addmtd addmisc mmcload;" \ + "bootm\0" \ + "mmcload=fatload mmc ${mmcdev}:${mmcpart} " \ + "${loadaddr} ${uimage}\0" \ + "mmcrootfstype=ext3 rootwait\0" \ + "flash_self=run ramargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr}\0" \ + "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ + "run nfsargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr_r}\0" \ + "net_self_load=tftp ${ramdisk_addr_r} ${ramdisk_file};" \ + "tftp ${kernel_addr_r} ${bootfile}\0" \ + "net_self=if run net_self_load;then " \ + "run ramargs addip addtty addmtd addmisc;" \ + "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ + "else echo Images not loades;fi\0" \ + "satargs=setenv bootargs root=/dev/sda1\0" \ + "satafile=boot/uImage\0" \ + "ssdboot=echo Booting from ssd ...; " \ + "run satargs addip addtty addmtd addmisc;" \ + "sata init;ext2load sata 0:1 ${kernel_addr_r} " \ + "${satafile};bootm\0" \ + "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.imx\0" \ + "uimage=uImage\0" \ + "load=tftp ${loadaddr} ${u-boot}\0" \ + "uboot_addr=0xf0001000\0" \ + "update=protect off 0xf0000000 +60000;" \ + "erase ${uboot_addr} +60000;" \ + "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ + "upd=if run load;then echo Updating u-boot;if run update;" \ + "then echo U-Boot updated;" \ + "else echo Error updating u-boot !;" \ + "echo Board without bootloader !!;" \ + "fi;" \ + "else echo U-Boot not downloaded..exiting;fi\0" \ + "bootcmd=run net_nfs\0" + + +#define CONFIG_CMD_SATA +#ifdef CONFIG_CMD_SATA + #define CONFIG_DWC_AHSATA + #define CONFIG_SYS_SATA_MAX_DEVICE 1 + #define CONFIG_DWC_AHSATA_PORT_ID 0 + #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR + #define CONFIG_LBA48 + #define CONFIG_LIBATA +#endif + +#endif /* __CONFIG_H */ diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 2af4e7af31..c1f1aa6a8a 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -153,7 +153,6 @@ #define CONFIG_SYS_NAND_BASE 0xd8000000 #define CONFIG_JFFS2_NAND #define CONFIG_MXC_NAND_HWECC -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ /* * SD/MMC diff --git a/include/configs/intip.h b/include/configs/intip.h index 92b65af7c9..33364a843e 100644 --- a/include/configs/intip.h +++ b/include/configs/intip.h @@ -37,10 +37,10 @@ #define CONFIG_460EX 1 /* Specific PPC460EX */ #ifdef CONFIG_DEVCONCENTER #define CONFIG_HOSTNAME devconcenter -#define CONFIG_IDENT_STRING " devconcenter 0.05" +#define CONFIG_IDENT_STRING " devconcenter 0.06" #else #define CONFIG_HOSTNAME intip -#define CONFIG_IDENT_STRING " intip 0.05" +#define CONFIG_IDENT_STRING " intip 0.06" #endif #define CONFIG_440 1 #define CONFIG_4xx 1 /* ... PPC4xx family */ diff --git a/include/configs/io.h b/include/configs/io.h index 9d2a87d22d..03661cce2d 100644 --- a/include/configs/io.h +++ b/include/configs/io.h @@ -34,11 +34,13 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME io -#define CONFIG_IDENT_STRING " io 0.04" +#define CONFIG_IDENT_STRING " io 0.05" #include "amcc-common.h" -#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ -#define CONFIG_LAST_STAGE_INIT /* call last_stage_init */ +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R +#define CONFIG_MISC_INIT_R +#define CONFIG_LAST_STAGE_INIT #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ @@ -48,6 +50,10 @@ #define PLLMR0_DEFAULT PLLMR0_266_133_66 #define PLLMR1_DEFAULT PLLMR1_266_133_66 +#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ +#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ +#define CONFIG_AUTOBOOT_STOP_STR " " + /* new uImage format support */ #define CONFIG_FIT #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ @@ -76,6 +82,7 @@ * Commands additional to the ones defined in amcc-common.h */ #define CONFIG_CMD_CACHE +#define CONFIG_CMD_DTT #undef CONFIG_CMD_EEPROM /* diff --git a/include/configs/io64.h b/include/configs/io64.h index 51b2dd1c13..887aaefd39 100644 --- a/include/configs/io64.h +++ b/include/configs/io64.h @@ -53,7 +53,7 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME io64 -#define CONFIG_IDENT_STRING " io64 0.01" +#define CONFIG_IDENT_STRING " io64 0.02" #include "amcc-common.h" #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/iocon.h b/include/configs/iocon.h index 9fcc6430cd..7f8825bed1 100644 --- a/include/configs/iocon.h +++ b/include/configs/iocon.h @@ -34,10 +34,11 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME iocon -#define CONFIG_IDENT_STRING " iocon 0.03" +#define CONFIG_IDENT_STRING " iocon 0.04" #include "amcc-common.h" -#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_LAST_STAGE_INIT #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ @@ -48,6 +49,10 @@ #define PLLMR0_DEFAULT PLLMR0_266_133_66 #define PLLMR1_DEFAULT PLLMR1_266_133_66 +#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ +#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ +#define CONFIG_AUTOBOOT_STOP_STR " " + /* new uImage format support */ #define CONFIG_FIT #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ diff --git a/include/configs/jadecpu.h b/include/configs/jadecpu.h index f72ee02abf..d644fea22f 100644 --- a/include/configs/jadecpu.h +++ b/include/configs/jadecpu.h @@ -130,7 +130,6 @@ #undef CONFIG_CMD_XIMG #define CONFIG_CMD_BMP -#define CONFIG_CMD_CAN #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF #define CONFIG_CMD_FAT diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index 621dbb8fa6..d505a41de4 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -447,7 +447,6 @@ */ #define CONFIG_CMD_CHIP_CONFIG #define CONFIG_CMD_DATE -#define CONFIG_CMD_LOG #define CONFIG_CMD_NAND #define CONFIG_CMD_PCI #define CONFIG_CMD_SNTP diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index a6f2864c65..68215fda9d 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -435,7 +435,6 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_I2C #define CONFIG_CMD_IRQ -#define CONFIG_CMD_LOG #define CONFIG_CMD_MII #define CONFIG_CMD_NET #define CONFIG_CMD_NFS diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 012381a500..c62f4d01fd 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -43,6 +43,8 @@ #define CONFIG_ARCH_CPU_INIT #define CONFIG_ARCH_MISC_INIT +#define CONFIG_OF_LIBFDT + /* * SPL */ @@ -52,6 +54,7 @@ #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds" #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT /* * U-Boot Commands @@ -84,7 +87,7 @@ */ #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ -#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ +#define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ #define CONFIG_STACKSIZE 0x00010000 /* 128 KB stack */ #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ @@ -279,6 +282,7 @@ #define CONFIG_BOOTCOMMAND "run bootcmd_net" #define CONFIG_LOADADDR 0x42000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_OF_LIBFDT /* * Extra Environments @@ -286,6 +290,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "update_nand_full_filename=u-boot.nand\0" \ "update_nand_firmware_filename=u-boot.sb\0" \ + "update_sd_firmware_filename=u-boot.sd\0" \ "update_nand_firmware_maxsz=0x100000\0" \ "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \ "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \ @@ -312,6 +317,14 @@ "nand erase ${fcb_sz} ${fw_sz} ; " \ "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \ "nand write ${loadaddr} ${fw_off} ${filesize} ; " \ + "fi\0" \ + "update_sd_firmware=" /* Update the SD firmware partition */ \ + "if mmc rescan ; then " \ + "if tftp ${update_sd_firmware_filename} ; then " \ + "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \ + "setexpr fw_sz ${fw_sz} + 1 ; " \ + "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \ + "fi ; " \ "fi\0" #endif /* __M28_H__ */ diff --git a/include/configs/makalu.h b/include/configs/makalu.h index fcc789d714..6c1b136659 100644 --- a/include/configs/makalu.h +++ b/include/configs/makalu.h @@ -252,7 +252,6 @@ */ #define CONFIG_CMD_DATE #define CONFIG_CMD_DTT -#define CONFIG_CMD_LOG #define CONFIG_CMD_PCI #define CONFIG_CMD_SNTP diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 1315c3ceb8..f6a83a8505 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -171,8 +171,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ /* NAND devices */ -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ - #define CONFIG_JFFS2_NAND /* nand device jffs2 lives on */ #define CONFIG_JFFS2_DEV "nand0" @@ -327,7 +325,7 @@ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE (45 << 10) +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK /* move malloc and bss high to prevent clashing with the main image */ diff --git a/include/configs/meesc.h b/include/configs/meesc.h index d6197bc610..db1e87d69c 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -164,7 +164,6 @@ # define CONFIG_SYS_NAND_MASK_CLE (1 << 22) # define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15 # define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22 -# define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* Ethernet */ diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index 7cf641fd13..f1104902be 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -35,7 +35,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_NFS #define CONFIG_CMD_PING -#define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM #define CONFIG_CMD_MEMORY #define CONFIG_CMD_SAVEENV diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index 03f52f3905..52e15cce87 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -38,7 +38,6 @@ */ /*#include <config_cmd_default.h>*/ -#define CONFIG_CMD_DFL #define CONFIG_CMD_FLASH #define CONFIG_CMD_SAVEENV diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index 1a6379176b..27b489902b 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -132,7 +132,6 @@ */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index d1ba02b6ee..7210b6e80f 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -65,7 +65,6 @@ #define CONFIG_ENV_IS_NOWHERE #define CONFIG_SYS_NO_FLASH -#define CONFIG_SYS_64BIT_VSPRINTF /* U-Boot general configuration */ #define CONFIG_SYS_PROMPT "MX25PDK U-Boot > " diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 02f3366ed2..0c18e5022a 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -46,6 +46,7 @@ #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds" #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT /* * U-Boot Commands @@ -67,6 +68,7 @@ #define CONFIG_CMD_SF #define CONFIG_CMD_SPI #define CONFIG_CMD_USB +#define CONFIG_CMD_BOOTZ /* * Memory configurations @@ -148,6 +150,16 @@ #endif /* + * NAND Driver + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_MXS +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x60000000 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#endif + +/* * Ethernet on SOC (FEC) */ #ifdef CONFIG_CMD_NET @@ -225,6 +237,7 @@ #define CONFIG_BOOTCOMMAND "run bootcmd_net" #define CONFIG_LOADADDR 0x42000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_OF_LIBFDT /* * Extra Environments diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 49d440b9ae..6ce97bc69f 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -99,6 +99,7 @@ #define CONFIG_CMD_SPI #define CONFIG_CMD_DATE #define CONFIG_CMD_NAND +#define CONFIG_CMD_BOOTZ /* * Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index de4b954a52..bd57baa808 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -39,8 +39,6 @@ #define CONFIG_SYS_TEXT_BASE 0xA0000000 #define CONFIG_SYS_CACHELINE_SIZE 32 -#define CONFIG_SYS_64BIT_VSPRINTF - #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_LATE_INIT diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 34a4edd41e..eab0e27fb5 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -27,7 +27,6 @@ #define CONFIG_SYS_MX5_HCLK 24000000 #define CONFIG_SYS_MX5_CLK32 32768 -#define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO @@ -42,7 +41,9 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT #define CONFIG_MXC_GPIO +#define CONFIG_REVISION_TAG #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE @@ -56,6 +57,7 @@ #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC #define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 #define CONFIG_DOS_PARTITION /* Eth Configs */ @@ -85,6 +87,21 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 +/* I2C Configs */ +#define CONFIG_HARD_I2C +#define CONFIG_I2C_MXC +#define CONFIG_SYS_I2C_MX53_PORT1 +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 0xfe + +/* PMIC Controller */ +#define CONFIG_PMIC +#define CONFIG_PMIC_I2C +#define CONFIG_DIALOG_PMIC +#define CONFIG_PMIC_FSL +#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 +#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 + /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 @@ -193,4 +210,14 @@ #define CONFIG_OF_LIBFDT +#define CONFIG_CMD_SATA +#ifdef CONFIG_CMD_SATA + #define CONFIG_DWC_AHSATA + #define CONFIG_SYS_SATA_MAX_DEVICE 1 + #define CONFIG_DWC_AHSATA_PORT_ID 0 + #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR + #define CONFIG_LBA48 + #define CONFIG_LIBATA +#endif + #endif /* __CONFIG_H */ diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index e83aec6c21..90652c6629 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -168,6 +168,7 @@ #define CONFIG_SYS_MMC_ENV_DEV 1 #define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ #define CONFIG_SYS_DCACHE_OFF diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index 3f7e51d877..feabc05a47 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -42,6 +42,7 @@ #define CONFIG_ARCH_CPU_INIT #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R #define CONFIG_MXC_GPIO #define CONFIG_MXC_UART @@ -71,6 +72,19 @@ #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION +#define CONFIG_CMD_SATA +/* + * SATA Configs + */ +#ifdef CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA +#endif + #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII @@ -110,6 +124,8 @@ #define CONFIG_BOOTDELAY 3 +#define CONFIG_PREBOOT "" + #define CONFIG_LOADADDR 0x10800000 #define CONFIG_SYS_TEXT_BASE 0x17800000 @@ -211,6 +227,7 @@ #endif #define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ #define CONFIG_SYS_DCACHE_OFF diff --git a/include/configs/neo.h b/include/configs/neo.h index 8de5aaf1ed..38b5becc2e 100644 --- a/include/configs/neo.h +++ b/include/configs/neo.h @@ -35,9 +35,13 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME neo +#define CONFIG_IDENT_STRING " neo 0.01" #include "amcc-common.h" -#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R +#define CONFIG_MISC_INIT_R +#define CONFIG_LAST_STAGE_INIT #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ @@ -149,53 +153,53 @@ #ifdef CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */ -#define CONFIG_ENV_ADDR ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ +#define CONFIG_ENV_ADDR 0xFFF00000 +#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ /* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_ADDR_REDUND 0xFFF20000 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) #endif /* * PPC405 GPIO Configuration */ -#define CONFIG_SYS_4xx_GPIO_TABLE { /* GPIO Alternate1 */ \ -{ \ -/* GPIO Core 0 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO0 PerBLast */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO1 TS1E */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO2 TS2E */ \ -{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO3 TS1O */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO4 TS2O */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO5 TS3 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO6 TS4 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO7 TS5 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO8 TS6 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO9 TrcClk */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO10 PerCS1 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO11 PerCS2 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO12 PerCS3 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO13 PerCS4 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO14 PerAddr03 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO15 PerAddr04 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO16 PerAddr05 */ \ -{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO17 IRQ0 */ \ -{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO18 IRQ1 */ \ -{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO19 IRQ2 */ \ -{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO20 IRQ3 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO21 IRQ4 */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO22 IRQ5 */ \ -{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO23 IRQ6 */ \ -{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO24 UART0_DCD */ \ -{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO25 UART0_DSR */ \ -{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO26 UART0_RI */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO27 UART0_DTR */ \ -{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO28 UART1_Rx */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO29 UART1_Tx */ \ -{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO30 RejectPkt0 */ \ -{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO31 RejectPkt1 */ \ -} \ +#define CONFIG_SYS_4xx_GPIO_TABLE { \ +{ \ +/* GPIO Core 0 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO0 PerBLast */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO1 TS1E */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO2 TS2E */ \ +{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO3 TS1O */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO4 TS2O */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_1 }, /* GPIO5 TS3 */ \ +{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO6 TS4 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO7 TS5 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO8 TS6 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO9 TrcClk */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO10 PerCS1 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO11 PerCS2 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO12 PerCS3 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO13 PerCS4 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO14 PerAddr03 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO15 PerAddr04 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO16 PerAddr05 */ \ +{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO17 IRQ0 */ \ +{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO18 IRQ1 */ \ +{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO19 IRQ2 */ \ +{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO20 IRQ3 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO21 IRQ4 */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO22 IRQ5 */ \ +{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO23 IRQ6 */ \ +{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO24 UART0_DCD */ \ +{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO25 UART0_DSR */ \ +{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO26 UART0_RI */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO27 UART0_DTR */ \ +{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO28 UART1_Rx */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO29 UART1_Tx */ \ +{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO30 RejectPkt0 */ \ +{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO31 RejectPkt1 */ \ +} \ } /* @@ -226,12 +230,22 @@ #define CONFIG_SYS_EBC_PB1CR 0xFB85A000 /* BAS=0xFF8,BS=4MB,BU=R/W,BW=8bit */ /* Memory Bank 2 (FPGA) initialization */ -#define CONFIG_FPGA_BASE 0x7f100000 +#define CONFIG_SYS_FPGA0_BASE 0x7f100000 #define CONFIG_SYS_EBC_PB2AP 0x92015480 #define CONFIG_SYS_EBC_PB2CR 0x7f11a000 /* BAS=0x7f1,BS=1MB,BU=R/W,BW=16bit */ +#define CONFIG_SYS_FPGA_BASE(k) CONFIG_SYS_FPGA0_BASE + +#define CONFIG_SYS_FPGA_COUNT 1 + /* Memory Bank 3 (Latches) initialization */ +#define CONFIG_SYS_LATCH_BASE 0x7f200000 #define CONFIG_SYS_EBC_PB3AP 0x92015480 #define CONFIG_SYS_EBC_PB3CR 0x7f21a000 /* BAS=0x7f2,BS=1MB,BU=R/W,BW=16bit */ +#define CONFIG_SYS_LATCH0_RESET 0xffff +#define CONFIG_SYS_LATCH0_BOOT 0xffff +#define CONFIG_SYS_LATCH1_RESET 0xffbf +#define CONFIG_SYS_LATCH1_BOOT 0xffff + #endif /* __CONFIG_H */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index ddeb4146f7..b891ee4925 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -399,7 +399,7 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (45 * 1024) +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000000 @@ -410,6 +410,7 @@ #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" +#define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBDISK_SUPPORT #define CONFIG_SPL_I2C_SUPPORT diff --git a/include/configs/omap3_evm_common.h b/include/configs/omap3_evm_common.h index 4910ddaa83..7b21a5c8c4 100644 --- a/include/configs/omap3_evm_common.h +++ b/include/configs/omap3_evm_common.h @@ -282,12 +282,13 @@ /* Defines for SPL */ #define CONFIG_SPL #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (45 * 1024) /* 45 KB */ +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ +#define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBDISK_SUPPORT #define CONFIG_SPL_I2C_SUPPORT diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 01360f6cbd..4ac17cc636 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -122,7 +122,7 @@ #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP -#define CONFIG_CMD_SETECPR /* Evaluate expressions */ +#define CONFIG_CMD_SETEXPR /* Evaluate expressions */ #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 64adc7455c..a0a7a1c42a 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -303,7 +303,7 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (45 * 1024) +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK /* move malloc and bss high to prevent clashing with the main image */ @@ -317,6 +317,7 @@ #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" +#define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBDISK_SUPPORT #define CONFIG_SPL_I2C_SUPPORT diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 4df5f5dac5..d02f338437 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -174,8 +174,7 @@ "usbtty=cdc_acm\0" \ "loadaddr=0x82000000\0" \ "bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \ - "rw rootflags=bulk_read console=ttyS0,115200n8 " \ - "vram=6272K omapfb.vram=0:3000K\0" \ + "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" \ #define CONFIG_BOOTCOMMAND \ diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index a989721afc..072e17bab8 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -35,7 +35,6 @@ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP44XX 1 /* which is a 44XX */ #define CONFIG_OMAP4430 1 /* which is in a 4430 */ -#define CONFIG_ARCH_CPU_INIT /* Get CPU defs */ #include <asm/arch/cpu.h> @@ -106,7 +105,6 @@ #define CONFIG_GENERIC_MMC 1 #define CONFIG_MMC 1 #define CONFIG_OMAP_HSMMC 1 -#define CONFIG_SYS_MMC_SET_DEV 1 #define CONFIG_DOS_PARTITION 1 @@ -151,6 +149,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "console=ttyO2,115200n8\0" \ + "fdt_high=0xffffffff\0" \ "usbtty=cdc_acm\0" \ "vram=16M\0" \ "mmcdev=0\0" \ @@ -287,4 +286,6 @@ #define CONFIG_SYS_ENABLE_PADS_ALL +#define CONFIG_SYS_THUMB_BUILD + #endif /* __CONFIG_OMAP4_COMMON_H */ diff --git a/include/configs/omap5912osk.h b/include/configs/omap5912osk.h index a8dfef321d..d3a2438e28 100644 --- a/include/configs/omap5912osk.h +++ b/include/configs/omap5912osk.h @@ -44,8 +44,6 @@ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ -#define CONFIG_MISC_INIT_R - #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 /* Required for ramdisk support */ diff --git a/include/configs/omap5_evm.h b/include/configs/omap5_evm.h index d3d526310e..38b5028060 100644 --- a/include/configs/omap5_evm.h +++ b/include/configs/omap5_evm.h @@ -38,7 +38,6 @@ #define CONFIG_OMAP54XX /* which is a 54XX */ #define CONFIG_OMAP5430 /* which is in a 5430 */ #define CONFIG_5430EVM /* working with EVM */ -#define CONFIG_ARCH_CPU_INIT /* Get CPU defs */ #include <asm/arch/cpu.h> @@ -49,8 +48,10 @@ #define CONFIG_DISPLAY_BOARDINFO /* Clock Defines */ -#define V_OSCK 38400000 /* Clock output from T2 */ +#define V_OSCK 19200000 /* Clock output from T2 */ #define V_SCLK V_OSCK +#define CONFIG_SYS_CLOCKS_ENABLE_ALL 1 /* Enable all clocks */ +#define CONFIG_SYS_ENABLE_PADS_ALL 1 /* Enable all PADS for now */ #undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R @@ -97,9 +98,10 @@ #define CONFIG_DRIVER_OMAP34XX_I2C #define CONFIG_I2C_MULTI_BUS -/* TWL6030 */ -#define CONFIG_TWL6030_POWER -#define CONFIG_CMD_BAT +/* TWL6035 */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_TWL6035_POWER +#endif /* MMC */ #define CONFIG_GENERIC_MMC @@ -111,14 +113,8 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ #define CONFIG_ENV_OFFSET 0xE0000 +#define CONFIG_CMD_SAVEENV -/* USB */ -#define CONFIG_MUSB_UDC -#define CONFIG_USB_OMAP3 - -/* USB device configuration */ -#define CONFIG_USB_DEVICE -#define CONFIG_USB_TTY #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Flash */ @@ -154,7 +150,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ - "console=ttyS2,115200n8\0" \ + "console=ttyO2,115200n8\0" \ "usbtty=cdc_acm\0" \ "vram=16M\0" \ "mmcdev=0\0" \ @@ -250,8 +246,8 @@ /* Defines for SPL */ #define CONFIG_SPL -#define CONFIG_SPL_TEXT_BASE 0x40304350 -#define CONFIG_SPL_MAX_SIZE 0x1E000 /* 120K */ +#define CONFIG_SPL_TEXT_BASE 0x40300350 +#define CONFIG_SPL_MAX_SIZE 0x19000 /* 100K */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ diff --git a/include/configs/omap730p2.h b/include/configs/omap730p2.h index 26e7e1f1e0..f7900e0d83 100644 --- a/include/configs/omap730p2.h +++ b/include/configs/omap730p2.h @@ -49,8 +49,6 @@ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ -#define CONFIG_MISC_INIT_R - #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 diff --git a/include/configs/origen.h b/include/configs/origen.h index 8ede82575c..d4d0f84be6 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -69,9 +69,10 @@ #define EXYNOS4_DEFAULT_UART_OFFSET 0x020000 /* SD/MMC configuration */ -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_MMC 1 -#define CONFIG_S5P_MMC 1 +#define CONFIG_GENERIC_MMC +#define CONFIG_MMC +#define CONFIG_SDHCI +#define CONFIG_S5P_SDHCI /* PWM */ #define CONFIG_PWM 1 @@ -82,7 +83,7 @@ /* Command definition*/ #include <config_cmd_default.h> -#define CONFIG_CMD_PING +#undef CONFIG_CMD_PING #define CONFIG_CMD_ELF #define CONFIG_CMD_DHCP #define CONFIG_CMD_MMC diff --git a/include/configs/otc570.h b/include/configs/otc570.h index b322c775a1..85993789b9 100644 --- a/include/configs/otc570.h +++ b/include/configs/otc570.h @@ -215,7 +215,6 @@ # define CONFIG_SYS_NAND_MASK_CLE (1 << 22) # define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15 # define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22 -# define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* Ethernet */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 3098c5acfe..04fd8d07f5 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -184,7 +184,7 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_CMD_SATA -#define CONFIG_SATA_SIL3114 +#define CONFIG_SATA_SIL #define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_LIBATA #define CONFIG_LBA48 @@ -227,7 +227,7 @@ /* DDR Setup */ #define CONFIG_FSL_DDR3 -#define CONFIG_DDR_RAW_TIMING +#define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS 0x52 @@ -534,9 +534,6 @@ #define CONFIG_OF_BOARD_SETUP #define CONFIG_OF_STDOUT_VIA_ALIAS -#define CONFIG_SYS_64BIT_VSPRINTF -#define CONFIG_SYS_64BIT_STRTOUL - /* new uImage format support */ #define CONFIG_FIT #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h new file mode 100644 index 0000000000..df46be5469 --- /dev/null +++ b/include/configs/pogo_e02.h @@ -0,0 +1,119 @@ +/* + * Copyright (C) 2012 + * David Purdy <david.c.purdy@gmail.com> + * + * Based on Kirkwood support: + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar <prafulla@marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef _CONFIG_POGO_E02_H +#define _CONFIG_POGO_E02_H + +/* + * Machine type definition and ID + */ +#define MACH_TYPE_POGO_E02 3542 +#define CONFIG_MACH_TYPE MACH_TYPE_POGO_E02 +#define CONFIG_IDENT_STRING "\nPogo E02" + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD /* SOC Family Name */ +#define CONFIG_KW88F6281 /* SOC Name */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ + +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ +#define CONFIG_SYS_MVFS +#include <config_cmd_default.h> +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_MII +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +/* Remove or override few declarations from mv-common.h */ +#undef CONFIG_SYS_PROMPT /* previously defined in mv-common.h */ +#define CONFIG_SYS_PROMPT "PogoE02> " + +/* + * Environment variables configurations + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K */ +#else +#define CONFIG_ENV_IS_NOWHERE +#endif + +#define CONFIG_ENV_SIZE 0x20000 /* 128k */ +#define CONFIG_ENV_OFFSET 0x60000 /* env starts here */ + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND \ + "setenv bootargs $(bootargs_console); " \ + "run bootcmd_usb; " \ + "bootm 0x00800000 0x01100000" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "mtdparts=mtdparts=orion_nand:1M(u-boot),4M(uImage)," \ + "32M(rootfs),-(data)\0"\ + "mtdids=nand0=orion_nand\0"\ + "bootargs_console=console=ttyS0,115200\0" \ + "bootcmd_usb=usb start; ext2load usb 0:1 0x00800000 /uImage; " \ + "ext2load usb 0:1 0x01100000 /uInitrd\0" + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ +#define CONFIG_PHY_BASE_ADR 0 +#endif /* CONFIG_CMD_NET */ + +/* + * File system + */ +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_RBTREE +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS +#define CONFIG_CMD_MTDPARTS +#define CONFIG_LZO + +#endif /* _CONFIG_POGO_E02_H */ diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h index dc5ec3aa82..5d0c385987 100644 --- a/include/configs/quad100hd.h +++ b/include/configs/quad100hd.h @@ -69,7 +69,6 @@ #define CONFIG_CMD_I2C #undef CONFIG_CMD_IRQ #define CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_LOG #undef CONFIG_CMD_MII #define CONFIG_CMD_NAND #undef CONFIG_CMD_PING diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 0ce3fa864c..9cdfc147e9 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -15,7 +15,6 @@ */ #include <config_cmd_default.h> -#define CONFIG_CMD_DFL #define CONFIG_CMD_CACHE #define CONFIG_CMD_FLASH #define CONFIG_CMD_PCI diff --git a/include/configs/rda8810.h b/include/configs/rda8810.h new file mode 100644 index 0000000000..8e63b43f55 --- /dev/null +++ b/include/configs/rda8810.h @@ -0,0 +1,25 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/rda_config_defaults.h> + +/* + * SoC Configuration + */ +#define CONFIG_MACH_RDA8810 + +#define CONFIG_MACH_TYPE (5002) + +/* + * Flash & Environment + */ +/* #define CONFIG_NAND_RDA_DMA */ +#define CONFIG_NAND_RDA_V1 /* V1 for rda8810, rda8850 */ +#define CONFIG_SYS_NAND_MAX_CHIPS 1 + +// Enable RDA signed bootloader: +#define CONFIG_SIGNATURE_CHECK_IMAGE + +#define CONFIG_SYS_CACHELINE_SIZE 32 + +#endif /* __CONFIG_H */ diff --git a/include/configs/rda8810e.h b/include/configs/rda8810e.h new file mode 100644 index 0000000000..998739f9fa --- /dev/null +++ b/include/configs/rda8810e.h @@ -0,0 +1,28 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/rda_config_defaults.h> + +/* + * SoC Configuration + */ +#define CONFIG_MACH_RDA8810E +/* #define CONFIG_RDA_FPGA */ + +/* + * Flash & Environment + */ +/* #define CONFIG_NAND_RDA_DMA */ +#define CONFIG_NAND_RDA_V2 /* V2 for rda8810e, rda8820 */ +#define CONFIG_SYS_NAND_MAX_CHIPS 1 + +#define NAND_IO_RECONFIG_WORKROUND + +#ifdef _TGT_AP_HW_TEST_ENABLE +/* force to run hardware test when pdl2 is running */ +//#define CONFIG_PDL_FORCE_HW_TEST +/* test list */ +#define CONFIG_VPU_TEST +#endif + +#endif /* __CONFIG_H */ diff --git a/include/configs/rda8810h.h b/include/configs/rda8810h.h new file mode 100644 index 0000000000..65121133fc --- /dev/null +++ b/include/configs/rda8810h.h @@ -0,0 +1,40 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/rda_config_defaults.h> + +/* + * SoC Configuration + */ +#define CONFIG_MACH_RDA8810H +#define CONFIG_RDA_FPGA + +/* + * Flash & Environment + */ +/* #define CONFIG_NAND_RDA_DMA */ +#define CONFIG_NAND_RDA_V3 +#define CONFIG_SYS_NAND_MAX_CHIPS 4 + +#define NAND_IO_RECONFIG_WORKROUND + +/* Enable RDA signed bootloader:*/ +/* #define CONFIG_SIGNATURE_CHECK_IMAGE */ + +#ifdef _TGT_AP_HW_TEST_ENABLE +/* force to run hardware test when pdl2 is running */ +//#define CONFIG_PDL_FORCE_HW_TEST +/* test list */ +#define CONFIG_VPU_TEST +/* #define CONFIG_DDR_TEST */ +/* #define CONFIG_TIMER_TEST */ +/* #define CONFIG_UART_TEST */ +/* #define CONFIG_GIC_TEST */ +/* #define CONFIG_CACHE_TEST */ +/* #define CONFIG_MIPI_LOOP_TEST */ +/* #define CONFIG_I2C_TEST */ +#endif + +#define CONFIG_SYS_CACHELINE_SIZE 64 + +#endif /* __CONFIG_H */ diff --git a/include/configs/rda8820.h b/include/configs/rda8820.h new file mode 100644 index 0000000000..e9c2e2ad42 --- /dev/null +++ b/include/configs/rda8820.h @@ -0,0 +1,19 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/rda_config_defaults.h> + +/* + * SoC Configuration + */ +#define CONFIG_MACH_RDA8820 +#define CONFIG_RDA_FPGA + +/* + * Flash & Environment + */ +/* #define CONFIG_NAND_RDA_DMA */ +#define CONFIG_NAND_RDA_V2 /* V2 for rda8810e, rda8820 */ +#define CONFIG_SYS_NAND_MAX_CHIPS 1 + +#endif /* __CONFIG_H */ diff --git a/include/configs/rda8850.h b/include/configs/rda8850.h new file mode 100644 index 0000000000..3e44ff658c --- /dev/null +++ b/include/configs/rda8850.h @@ -0,0 +1,19 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/rda_config_defaults.h> + +/* + * SoC Configuration + */ +#define CONFIG_MACH_RDA8850 +/* #define CONFIG_RDA_FPGA */ + +/* + * Flash & Environment + */ +/* #define CONFIG_NAND_RDA_DMA */ +#define CONFIG_NAND_RDA_V1 /* V1 for rda8810, rda8850 */ +#define CONFIG_SYS_NAND_MAX_CHIPS 1 + +#endif /* __CONFIG_H */ diff --git a/include/configs/rda8850e.h b/include/configs/rda8850e.h new file mode 100644 index 0000000000..7f628e0ef7 --- /dev/null +++ b/include/configs/rda8850e.h @@ -0,0 +1,37 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/rda_config_defaults.h> + +/* + * SoC Configuration + */ +#define CONFIG_MACH_RDA8850E +/*#define CONFIG_RDA_FPGA*/ + +/* Enable RDA signed bootloader:*/ +/* #define CONFIG_SIGNATURE_CHECK_IMAGE */ + +/* + * Flash & Environment + */ +/* #define CONFIG_NAND_RDA_DMA */ +#define CONFIG_NAND_RDA_V3 /* V3 for rda8850e*/ +#define CONFIG_SYS_NAND_MAX_CHIPS 4 + +#define CONFIG_SYS_CACHELINE_SIZE 64 + +#ifdef _TGT_AP_HW_TEST_ENABLE +#define CONFIG_VPU_TEST +/* #define CONFIG_DDR_TEST */ +/* #define CONFIG_TIMER_TEST */ +/* #define CONFIG_UART_TEST */ +/* #define CONFIG_GIC_TEST */ +/* #define CONFIG_CACHE_TEST */ +/* #define CONFIG_MIPI_LOOP_TEST */ +/* #define CONFIG_I2C_TEST */ +#endif + +#define CONFIG_USB_ACM_TWO_CHANS 1 + +#endif /* __CONFIG_H */ diff --git a/include/configs/rda_config_defaults.h b/include/configs/rda_config_defaults.h new file mode 100644 index 0000000000..84cc9bf308 --- /dev/null +++ b/include/configs/rda_config_defaults.h @@ -0,0 +1,411 @@ +#ifndef __RDA_CONFIG_H__ +#define __RDA_CONFIG_H__ + +#include <rda/tgt_ap_board_config.h> +#include <rda/tgt_ap_clock_config.h> +#define MEM_SIZE _TGT_AP_OS_MEM_SIZE + +/* + * Board + */ +#define CONFIG_RDA_MUX_CONFIG 1 + +/* + * SoC Configuration + */ +#define CONFIG_ARMV7 +#define CONFIG_SYS_HZ_CLOCK 2000000 /* 2M */ +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_TEXT_BASE 0x80008000 +/* #define CONFIG_SYS_ICACHE_OFF */ +/* #define CONFIG_SYS_DCACHE_OFF */ +/* #define CONFIG_SYS_NEON_OFF */ + +/* Display CPU and Board Info */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 +/* + * Memory Info + */ +#define CONFIG_SYS_MALLOC_LEN (0x10000 + 16*1024*1024) /* malloc() len */ +#define PHYS_SDRAM_1 (0x80000000) /* DRAM Start */ +#define PHYS_SDRAM_1_SIZE ((MEM_SIZE) << 20) + +/* memtest start addr */ +#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x00800000) + +/* memtest will be run on 16MB */ +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x00800000 + 16*1024*1024) + +/* spl need 20k bytes for nand one page data load (max size is 16k page size) */ +#define CONFIG_SPL_NAND_MIDDLE_DATA_BUFFER (PHYS_SDRAM_1 + 0x01000000) + +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_STACKSIZE (256*1024) /* regular stack */ + +/* + * Serial Driver info + */ +#define CONFIG_BAUDRATE 921600 /* Default baud rate */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 38400, 115200, 921600 } + +/* + * SD/MMC + */ +#define CONFIG_MMC +#define CONFIG_EFI_PARTITION +#define CONFIG_DOS_PARTITION +/*#define CONFIG_RDA_MMC_LEGACY*/ +#define CONFIG_GENERIC_MMC +#define CONFIG_RDA_MMC +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 +/* + * ROM in U0B chips cannot provide information on the booting media, whereas + * SPL and U-BOOT must know the media type. The macro, CONFIG_SDMMC_BOOT, + * is introduced to tell SPL and U-BOOT that this is a SDMMC boot. + * The macro will be obsoleted for future chips, after ROM is updated to + * provide such information. + */ +/*#define CONFIG_SDMMC_BOOT*/ + +#ifdef CONFIG_SDMMC_BOOT /* sdcard */ +#define CONFIG_MMC_DEV_NUM 0 +#define CONFIG_MMC_DEV_NAME "mmc0" +#else /* emmc */ +#define CONFIG_MMC_DEV_NUM 1 +#define CONFIG_MMC_DEV_NAME "mmc1" +#endif + +/* + * Misc drivers + */ +#define CONFIG_RDA_FACTORY 1 +#define CONFIG_RDA_PRDINFO 1 +#define CONFIG_CMD_PRDINFO 1 + +/* + * I2C Configuration + */ + +/* + * Flash & Environment + */ +#define CONFIG_NAND_RDA +#define CONFIG_SYS_NAND_USE_FLASH_BBT +#define CONFIG_SYS_NAND_PAGE_2K + +#define CONFIG_SYS_NAND_LARGEPAGE +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +#define CONFIG_SYS_NAND_BASE (PHYS_SDRAM_1 + 0x00800000) + +/* + * Console configuration + */ +#define CONFIG_SYS_PROMPT "RDA > " /* Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buf Sz */ +#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x02000000) +#define CONFIG_VERSION_VARIABLE +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC + +/* + * USB Configuration + */ +/* +#define CONFIG_MUSB_HCD 1 +*/ +#define CONFIG_MUSB_UDC 1 +#define CONFIG_USB_RDA + +#ifdef CONFIG_MUSB_HCD +#define MUSB_NO_MULTIPOINT +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_FAT_WRITE +#endif +/* + *USB Gadget Configuration + */ +#ifdef CONFIG_MUSB_UDC +#define CONFIG_RDA_USB_SERIAL +#define CONFIG_USB_DEVICE +#define CONFIG_USBD_HS +#endif + +/* + * U-BOOT only configurations + */ +#ifndef CONFIG_SPL_BUILD + +#ifdef UBIFS_SYSTEM_IMAGE +#define CONFIG_UBIFS_SYSTEM_IMAGE 1 +#endif + +#ifdef UBIFS_USER_IMAGES +#define CONFIG_UBIFS_USER_IMAGES 1 +#endif + +#ifdef EXTFS_SYSTEM_IMAGE +#define CONFIG_EXTFS_SYSTEM_IMAGE 1 +#endif + +#ifdef EXTFS_USER_IMAGES +#define CONFIG_EXTFS_USER_IMAGES 1 +#endif +/*#define CONFIG_SYS_NAND_BASE_LIST { (PHYS_SDRAM_1 + 0x00800000), } */ + +/* + * U-boot USB Configuration + */ + +#ifdef CONFIG_MUSB_UDC +#define CONFIG_USB_FASTBOOT +#define CONFIG_MUSB_DMA +#define CONFIG_CMD_FASTBOOT +#define CONFIG_CMD_PDL2 +#define SCRATCH_ADDR (PHYS_SDRAM_1 + 0x02000000) /* leave 32M for boot and test */ +#define FB_DOWNLOAD_BUF_SIZE (PHYS_SDRAM_1_SIZE - 0x02000000 - 0x800000) /* 216M */ +#endif + +/* + * U-Boot commands + */ +#include <config_cmd_default.h> +#include <asm/arch/mtdparts_def.h> +#define CONFIG_CMD_ENV +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_MMC +#define CONFIG_CMD_HWFLOW + +/* modem commands */ +#define CONFIG_CMD_MDCOM + +#ifdef CONFIG_NAND_RDA +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +/* +#define CONFIG_MTD_DEBUG +#define CONFIG_MTD_DEBUG_VERBOSE 3 +*/ +#define CONFIG_MTD_DEVICE +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NAND_YAFFS +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_CMD_SOURCE +#define CONFIG_CMD_BOOTZ +#define CONFIG_RBTREE + +/*#define CONFIG_YAFFS2*/ +#define MTDIDS_DEFAULT "nand0=rda_nand" +#define MTDPARTS_DEFAULT "mtdparts=rda_nand:"MTDPARTS_DEF +#define MTDPARTS_KERNEL_DEFAULT "mtdparts=rda_nand:"MTDPARTS_KERNEL_DEF +#endif + +/* + * U-BOOT library + */ +#define CONFIG_USE_ARCH_MEMCPY 1 +/* + * communication code between modem and ap + */ +#define CONFIG_MDCOM + +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_MII +#undef CONFIG_CMD_PING +#undef CONFIG_CMD_DNS +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_RARP +#undef CONFIG_CMD_SNTP + +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_SPI +#undef CONFIG_CMD_SF +#undef CONFIG_CMD_SAVEENV +#undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_XIMG +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_CONSOLE + +#undef CONFIG_BOOTM_NETBSD +#undef CONFIG_BOOTM_RTEMS + +#define CONFIG_LZO + +/* + * Linux Information + */ +#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) +#define CONFIG_CMDLINE_TAG +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG +#define CONFIG_SETUP_MEMORY_TAGS +// #define CONFIG_SERIAL_TAG + +/* The delay to check whether to stop auto boot */ +#define CONFIG_BOOTDELAY 1 +#define CONFIG_ZERO_BOOTDELAY_CHECK + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "script_addr=81000000\0" \ + "modem_addr=82000000\0" \ + "factorydata_addr=83000000\0" \ + "kernel_addr=84000000\0" \ + "initrd_addr=85000000\0" \ + "boot_device=mmc\0" \ + "" + +#define CONFIG_BOOTARGS \ + "mem="MK_STR(MEM_SIZE)"M " \ + "console=ttyS0," MK_STR(CONFIG_BAUDRATE) " " \ + "root=/dev/ram rw " \ + "rdinit=/init" + +#define CONFIG_BOOTCOMMAND \ + "mux_config; " \ + "mmc dev 0; " \ + "ext2load mmc 0:1 ${script_addr} boot.scr && source ${script_addr};" \ + "echo Running boot script failed;" + +#endif /* !CONFIG_SPL_BUILD */ + +#if !defined(CONFIG_USE_NAND) && \ + !defined(CONFIG_USE_NOR) && \ + !defined(CONFIG_USE_SPIFLASH) +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_SIZE (16 << 10) +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_ENV +#endif + +/* additions for new relocation code, must added to all boards */ +#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) + +/* + * Defines for SPL + */ +#define CONFIG_SPL +#define CONFIG_SYS_SRAM_BASE 0x00100000 +#define CONFIG_SYS_SRAM_SIZE 0x00010000 /* 64k */ +#define CONFIG_SPL_TEXT_BASE 0x00100100 /* first 4k leave for boot_rom bss */ +/* + * SPL Build for thumb code + */ +#define CONFIG_SPL_THUMB_BUILD 1 +/* + the spl code should be 48 KB,and must be aligned to page offset +*/ +/* In nand driver V3, + the first page of nand is nand parameter, + it is invisible to uplayer except for nand dump command, + so we also think that spl offset is 0. + need add one page offset when read and write bootloader in nand driver v3. + In nand driver V1, + spl offset must be 0. +*/ +#define NAND_START_ADDR 0 +#define CONFIG_SPL_NAND_OFFS (NAND_START_ADDR) +#define CONFIG_SPL_MAX_SIZE 49152 + +#define CONFIG_UIMAGEHDR_SIZE 0x40 + +#ifdef _TGT_AP_DDR_AUTO_CALI_ENABLE +#define CONFIG_DDR_CAL_VAL_SIZE 0x10 +#define CONFIG_SPL_CODE_MAX_SIZE 48880 //CONFIG_SPL_MAX_SIZE - CONFIG_DDR_CAL_VAL_SIZE - 0x100 +#else +#define CONFIG_DDR_CAL_VAL_SIZE 0 +#define CONFIG_SPL_CODE_MAX_SIZE 48896 //CONFIG_SPL_MAX_SIZE - 0x100 +#endif + +#define CONFIG_SPL_BOARD_INFO_SIZE 512 +#define CONFIG_SPL_BOARD_INFO_ADDR (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE - CONFIG_SPL_BOARD_INFO_SIZE) + +#define CONFIG_TRAP_SIZE 0x00c0 +#define CONFIG_SPL_LOAD_ADDRESS (CONFIG_SYS_SRAM_BASE + CONFIG_TRAP_SIZE) + +#define CONFIG_SPL_STACK CONFIG_SPL_BOARD_INFO_ADDR + +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_YMODEM_SUPPORT +#define CONFIG_SPL_IMAGE_SUPPORT + +#define CONFIG_MTD_PTBL_OFFS (CONFIG_SPL_NAND_OFFS + CONFIG_SPL_MAX_SIZE) +#define CONFIG_MTD_PTBL_SIZE ((SPL_APPENDING_TO-CONFIG_SPL_MAX_SIZE/1024)*1024) +#define CONFIG_SYS_BOOTLOADER_MAX_SIZE (1024*1024) + +#ifndef CONFIG_RDA_PDL +/* Check uimage*/ +#define CONFIG_SPL_CHECK_IMAGE + +/* NAND boot */ +#define CONFIG_SPL_NAND_LOAD +/* EMMC boot */ +#define CONFIG_SPL_EMMC_LOAD +/* XMODME boot */ +#define CONFIG_SPL_XMODEM_LOAD + +/* XMODEM load configs */ +#ifdef CONFIG_SPL_XMODEM_LOAD +#define CONFIG_SYS_XMODEM_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_XMODEM_U_BOOT_DST (CONFIG_SYS_TEXT_BASE - 64) +#endif + +/* + * NAND load configs +*/ +#ifdef CONFIG_SPL_NAND_LOAD +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_SIMPLE + +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_OFFS (CONFIG_SPL_NAND_OFFS + CONFIG_SPL_MAX_SIZE + CONFIG_MTD_PTBL_SIZE) +#define CONFIG_SYS_NAND_U_BOOT_SIZE (CONFIG_SYS_BOOTLOADER_MAX_SIZE - CONFIG_MTD_PTBL_SIZE - CONFIG_SPL_MAX_SIZE - CONFIG_SPL_NAND_OFFS) +#define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_TEXT_BASE - 64) +#endif /* CONFIG_SPL_NAND_LOAD */ + +/* + * EMMC load configs + */ +#ifdef CONFIG_SPL_EMMC_LOAD +#define CONFIG_SPL_EMMC_SUPPORT + +#define CONFIG_SPL_EMMC_OFFS 0x20000 + +#define CONFIG_SYS_EMMC_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_EMMC_U_BOOT_OFFS (CONFIG_SPL_EMMC_OFFS + CONFIG_SPL_MAX_SIZE + CONFIG_MTD_PTBL_SIZE) +#define CONFIG_SYS_EMMC_U_BOOT_SIZE (CONFIG_SYS_BOOTLOADER_MAX_SIZE - CONFIG_MTD_PTBL_SIZE - CONFIG_SPL_MAX_SIZE - CONFIG_SPL_EMMC_OFFS) +#define CONFIG_SYS_EMMC_U_BOOT_DST (CONFIG_SYS_TEXT_BASE - 64) +#endif /* CONFIG_SPL_EMMC_LOAD */ + +#else /* CONFIG_RDA_PDL */ + +#define CONFIG_SPL_USB_SUPPORT +#define CONFIG_SPL_MUSB_UDC_SUPPORT +#define CONFIG_SPL_RDA_PDL + +#endif /* CONFIG_RDA_PDL */ + +#define CONIFG_DDR_CAL_VAL_FLAG 0xA1B2 +#define CONFIG_DDR_CAL_SEC_OFFS CONFIG_SPL_MAX_SIZE - CONFIG_DDR_CAL_VAL_SIZE - 0x100 +#endif /* __RDA_CONFIG_H__ */ diff --git a/include/configs/rdaarm926ejs.h b/include/configs/rdaarm926ejs.h new file mode 100644 index 0000000000..aac6b05f29 --- /dev/null +++ b/include/configs/rdaarm926ejs.h @@ -0,0 +1,218 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * Board + */ + +/* + * SoC Configuration + */ +#define CONFIG_MACH_RDAARM926EJS +#define CONFIG_ARM926EJS /* arm926ejs CPU core */ +#define CONFIG_SYS_HZ_CLOCK 16384 +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_TEXT_BASE 0x84008000 + +/* + * Memory Info + */ +#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ +#define PHYS_SDRAM_1 0x84000000 /* DDR Start */ +#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 32MB */ +#define CONFIG_MAX_RAM_BANK_SIZE (64 << 20) /* max size from RDA */ + +/* memtest start addr */ +#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x00800000) + +/* memtest will be run on 16MB */ +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x00800000 + 16*1024*1024) + +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_STACKSIZE (256*1024) /* regular stack */ + +/* + * Serial Driver info + */ +#define CONFIG_BAUDRATE 921600 /* Default baud rate */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 38400, 115200, 921600 } + +/* + * SD/MMC + */ +#define CONFIG_MMC +#define CONFIG_DOS_PARTITION +/*#define CONFIG_RDA_MMC_LEGACY*/ +#define CONFIG_GENERIC_MMC +#define CONFIG_RDA_MMC + +/* + * I2C Configuration + */ + +/* + * Flash & Environment + */ +#define CONFIG_NAND_RDA +#define CONFIG_SYS_NAND_USE_FLASH_BBT +/*#define CONFIG_SYS_NAND_HW_ECC*/ +/*#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST*/ +#define CONFIG_SYS_NAND_PAGE_2K + +#define CONFIG_SYS_NAND_LARGEPAGE +#define CONFIG_SYS_NAND_BASE 0x01a26000 +/*#define CONFIG_SYS_NAND_BASE_LIST { 0x01a26000, } */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_MAX_CHIPS 1 + +/* + * Network & Ethernet Configuration + */ + +/* + *USB Gadget Configuration + */ + +#define CONFIG_USB_RDA +#define CONFIG_MUSB_UDC +/* +#define CONFIG_USB_TTY +*/ +#define CONFIG_USB_DEVICE +#define CONFIG_USBD_HS +#define CONFIG_USB_FASTBOOT +#define CONFIG_CMD_FASTBOOT +/* +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_RDA +#define CONFIG_USB_FASTBOOT +#define CONFIG_CMD_FASTBOOT +*/ +#define SCRATCH_ADDR 0x86000000 +#define FB_DOWNLOAD_BUF_SIZE (100*1024*1024) + +/* + * U-Boot general configuration + */ +#define CONFIG_BOOTFILE "uImage" /* Boot file name */ +#define CONFIG_SYS_PROMPT "RDA > " /* Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ +#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) +#define CONFIG_VERSION_VARIABLE +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_LONGHELP +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC + +/* + * Environment settings + */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "usbtty=cdc_acm\0" +/* + * Linux Information + */ +#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) +#define CONFIG_CMDLINE_TAG +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTARGS \ + "mem=64M console=ttyS0,115200n8 root=/dev/ram rw rdinit=/linuxrc init=/init " +#define CONFIG_BOOTDELAY 3 + +/* + * U-Boot commands + */ +#include <config_cmd_default.h> +#define CONFIG_CMD_ENV +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_MMC + +#ifdef CONFIG_NAND_RDA +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NAND_YAFFS +/*#define CONFIG_CMD_UBI*/ +/*#define CONFIG_CMD_UBIFS*/ +#define CONFIG_YAFFS2 +#define CONFIG_RBTREE +#define MTDIDS_DEFAULT "nand0=rda_nand" +#define MTDPARTS_DEFAULT "mtdparts=rda_nand:128k@0(preloader)," \ + "256k(config)," \ + "128k(u-boot_env)," \ + "512k(test_image)," \ + "1M(u-boot)," \ + "6M(kernel)," \ + "504M(system)," \ + "-(data)" +#endif + +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_MII +#undef CONFIG_CMD_PING +#undef CONFIG_CMD_DNS +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_RARP +#undef CONFIG_CMD_SNTP + +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_SPI +#undef CONFIG_CMD_SF +#undef CONFIG_CMD_SAVEENV + +#if !defined(CONFIG_USE_NAND) && \ + !defined(CONFIG_USE_NOR) && \ + !defined(CONFIG_USE_SPIFLASH) +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_SIZE (16 << 10) +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_ENV +#endif + +/* additions for new relocation code, must added to all boards */ +#define CONFIG_SYS_SDRAM_BASE 0x84000000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \ + GENERATED_GBL_DATA_SIZE) + +/* Defines for SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SYS_SRAM_BASE 0x01c00000 +#define CONFIG_SYS_SRAM_SIZE 0x00008000 /* 32k */ +#define CONFIG_SPL_TEXT_BASE 0x01c01000 /* first 4k leave for boot_rom bss */ +#define CONFIG_SPL_MAX_SIZE (20 * 1024) /* 8 KB for stack */ +#define CONFIG_SPL_STACK (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE) + +#define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SRAM_BASE /* reuse boot_rom bss */ +#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ + +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +/*#define CONFIG_SPL_LIBDISK_SUPPORT*/ +/*#define CONFIG_SPL_I2C_SUPPORT*/ +#define CONFIG_SPL_LIBGENERIC_SUPPORT +/*#define CONFIG_SPL_MMC_SUPPORT*/ +/*#define CONFIG_SPL_FAT_SUPPORT*/ +#define CONFIG_SPL_SERIAL_SUPPORT +/*#define CONFIG_SPL_NAND_SUPPORT*/ +/*#define CONFIG_SPL_POWER_SUPPORT*/ +/*#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"*/ + +#endif /* __CONFIG_H */ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 56b5547fd2..e133a17259 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -63,9 +63,10 @@ #define CONFIG_BAUDRATE 115200 /* MMC */ -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_MMC 1 -#define CONFIG_S5P_MMC 1 +#define CONFIG_GENERIC_MMC +#define CONFIG_MMC +#define CONFIG_SDHCI +#define CONFIG_S5P_SDHCI /* PWM */ #define CONFIG_PWM 1 diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 13012756ab..00db374182 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -66,9 +66,10 @@ #define CONFIG_BAUDRATE 115200 /* MMC */ -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_MMC 1 -#define CONFIG_S5P_MMC 1 +#define CONFIG_GENERIC_MMC +#define CONFIG_MMC +#define CONFIG_SDHCI +#define CONFIG_S5P_SDHCI /* PWM */ #define CONFIG_PWM 1 diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index ae075e786e..46d42281b7 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -25,6 +25,14 @@ #define __CONFIG_H #include <asm/sizes.h> + +/* LP0 suspend / resume */ +#define CONFIG_TEGRA2_LP0 +#define CONFIG_AES +#define CONFIG_TEGRA_PMU +#define CONFIG_TPS6586X_POWER +#define CONFIG_TEGRA_CLOCK_SCALING + #include "tegra2-common.h" /* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */ @@ -92,4 +100,12 @@ #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB +/* Enable keyboard */ +#define CONFIG_TEGRA2_KEYBOARD +#define CONFIG_KEYBOARD + +#undef TEGRA2_DEVICE_SETTINGS +#define TEGRA2_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \ + "stdout=serial\0" \ + "stderr=serial\0" #endif /* __CONFIG_H */ diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index 73d2a87596..708bff7bb7 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -41,7 +41,6 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_NFS -#define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM #define CONFIG_CMD_SF #define CONFIG_CMD_RUN diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 1e71bcc3ef..9c32bfc58b 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -37,7 +37,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_PING #define CONFIG_CMD_NFS -#define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM #define CONFIG_CMD_RUN #define CONFIG_CMD_SAVEENV diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index 9659f9ebd9..0f63040d25 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -78,7 +78,8 @@ /* SD/MMC configuration */ #define CONFIG_GENERIC_MMC #define CONFIG_MMC -#define CONFIG_S5P_MMC +#define CONFIG_SDHCI +#define CONFIG_S5P_SDHCI #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 93c25da1cf..702134bda3 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -68,9 +68,10 @@ #define EXYNOS4_DEFAULT_UART_OFFSET 0x010000 /* SD/MMC configuration */ -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_MMC 1 -#define CONFIG_S5P_MMC 1 +#define CONFIG_GENERIC_MMC +#define CONFIG_MMC +#define CONFIG_SDHCI +#define CONFIG_S5P_SDHCI /* PWM */ #define CONFIG_PWM 1 diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index 5fef8cce80..ab1b33209e 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -41,7 +41,7 @@ /* I2C driver configuration */ #define CONFIG_HARD_I2C -#define CONFIG_SPEAR_I2C +#define CONFIG_DW_I2C #define CONFIG_SYS_I2C_SPEED 400000 #define CONFIG_SYS_I2C_SLAVE 0x02 @@ -196,7 +196,6 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_LOAD_ADDR 0x00800000 #define CONFIG_SYS_CONSOLE_INFO_QUIET 1 -#define CONFIG_SYS_64BIT_VSPRINTF 1 #define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_USBTTY diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index 4c4321d2ff..3fc2c44349 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -146,7 +146,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ /* NAND devices */ -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #define CONFIG_AUTO_COMPLETE @@ -258,7 +257,7 @@ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE (45 << 10) /* 45 K */ +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h index 837f859c7c..068ce8855f 100644 --- a/include/configs/tegra2-common.h +++ b/include/configs/tegra2-common.h @@ -26,6 +26,14 @@ #include <asm/sizes.h> /* + * QUOTE(m) will evaluate to a string version of the value of the macro m + * passed in. The extra level of indirection here is to first evaluate the + * macro m before applying the quoting operator. + */ +#define QUOTE_(m) #m +#define QUOTE(m) QUOTE_(m) + +/* * High Level Configuration Options */ #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ @@ -50,6 +58,15 @@ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_OF_LIBFDT /* enable passing of devicetree */ +#ifdef CONFIG_TEGRA2_LP0 +#define TEGRA_LP0_ADDR 0x1C406000 +#define TEGRA_LP0_SIZE 0x2000 +#define TEGRA_LP0_VEC \ + "lp0_vec=" QUOTE(TEGRA_LP0_SIZE) "@" QUOTE(TEGRA_LP0_ADDR) " " +#else +#define TEGRA_LP0_VEC +#endif + /* Environment */ #define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */ @@ -115,11 +132,18 @@ #define CONFIG_SYS_NO_FLASH -/* Environment information */ +/* Environment information, boards can override if required */ +#define CONFIG_CONSOLE_MUX +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define TEGRA2_DEVICE_SETTINGS "stdin=serial\0" \ + "stdout=serial\0" \ + "stderr=serial\0" + #define CONFIG_EXTRA_ENV_SETTINGS \ "console=ttyS0,115200n8\0" \ "mem=" TEGRA2_SYSMEM "\0" \ "smpflag=smp\0" \ + TEGRA2_DEVICE_SETTINGS #define CONFIG_LOADADDR 0x408000 /* def. location for kernel */ #define CONFIG_BOOTDELAY 2 /* -1 to disable auto boot */ diff --git a/include/configs/trats.h b/include/configs/trats.h index 10f11d9579..ef6510e67d 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -53,7 +53,6 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG -#define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG #define CONFIG_CMDLINE_EDITING #define CONFIG_SKIP_LOWLEVEL_INIT @@ -74,7 +73,8 @@ /* MMC */ #define CONFIG_GENERIC_MMC #define CONFIG_MMC -#define CONFIG_S5P_MMC +#define CONFIG_S5P_SDHCI +#define CONFIG_SDHCI /* PWM */ #define CONFIG_PWM @@ -174,9 +174,9 @@ /* TRATS has 2 banks of DRAM */ #define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */ -#define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */ +#define PHYS_SDRAM_1_SIZE (512 << 20) /* 512 MB in CS 0 */ #define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */ -#define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */ +#define PHYS_SDRAM_2_SIZE (512 << 20) /* 512 MB in CS 0 */ #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ @@ -208,10 +208,18 @@ #define CONFIG_PMIC #define CONFIG_PMIC_I2C -#define CONFIG_PMIC_MAX8998 +#define CONFIG_PMIC_MAX8997 #define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_S3C_UDC_OTG #define CONFIG_USB_GADGET_DUALSPEED +/* LCD */ +#define CONFIG_EXYNOS_FB +#define CONFIG_LCD +#define CONFIG_FB_ADDR 0x52504000 +#define CONFIG_S6E8AX0 +#define CONFIG_EXYNOS_MIPI_DSIM +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (1280 * 720 * 4) + #endif /* __CONFIG_H */ diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 801a24fd88..9955fca476 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -278,6 +278,7 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBDISK_SUPPORT #define CONFIG_SPL_I2C_SUPPORT @@ -293,7 +294,7 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */ +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/ diff --git a/include/configs/tx25.h b/include/configs/tx25.h index 87bd8a6756..3dfafa5077 100644 --- a/include/configs/tx25.h +++ b/include/configs/tx25.h @@ -117,8 +117,6 @@ #define CONFIG_MXC_NAND_HWECC #define CONFIG_SYS_NAND_LARGEPAGE -#define CONFIG_SYS_64BIT_VSPRINTF - /* U-Boot general configuration */ #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ diff --git a/include/configs/u8500_href.h b/include/configs/u8500_href.h index 4747fbd351..95028de059 100644 --- a/include/configs/u8500_href.h +++ b/include/configs/u8500_href.h @@ -95,7 +95,6 @@ #define CONFIG_CMD_MMC #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 -#define CONFIG_CMD_EMMC #define CONFIG_CMD_SOURCE #define CONFIG_CMD_I2C diff --git a/include/configs/zeus.h b/include/configs/zeus.h index 63279b01ce..2556e3b3ef 100644 --- a/include/configs/zeus.h +++ b/include/configs/zeus.h @@ -78,7 +78,6 @@ #define CONFIG_CMD_ELF #define CONFIG_CMD_I2C #define CONFIG_CMD_IRQ -#define CONFIG_CMD_LOG #define CONFIG_CMD_MII #define CONFIG_CMD_NET #define CONFIG_CMD_NFS diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h index 599d5bb42a..d7ce6c64de 100644 --- a/include/configs/zmx25.h +++ b/include/configs/zmx25.h @@ -93,8 +93,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_CACHE -#define CONFIG_SYS_64BIT_VSPRINTF - /* * Additional command */ diff --git a/include/dialog_pmic.h b/include/dialog_pmic.h new file mode 100644 index 0000000000..8d43585e24 --- /dev/null +++ b/include/dialog_pmic.h @@ -0,0 +1,187 @@ +/* + * da9053 register declarations. + * + * Copyright(c) 2009 Dialog Semiconductor Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#ifndef __DIALOG_PMIC_H__ +#define __DIALOG_PMIC_H__ + +enum { + DA9053_PAGECON0_REG = 0, + DA9053_STATUSA_REG, + DA9053_STATUSB_REG, + DA9053_STATUSC_REG, + DA9053_STATUSD_REG, + DA9053_EVENTA_REG, + DA9053_EVENTB_REG, + DA9053_EVENTC_REG, + DA9053_EVENTD_REG, + DA9053_FAULTLOG_REG, + DA9053_IRQMASKA_REG, + DA9053_IRQMASKB_REG, + DA9053_IRQMASKC_REG, + DA9053_IRQMASKD_REG, + DA9053_CONTROLA_REG, + DA9053_CONTROLB_REG, + DA9053_CONTROLC_REG, + DA9053_CONTROLD_REG, + DA9053_PDDIS_REG, + DA9053_INTERFACE_REG, + DA9053_RESET_REG, + DA9053_GPIO0001_REG, + DA9053_GPIO0203_REG, + DA9053_GPIO0405_REG, + DA9053_GPIO0607_REG, + DA9053_GPIO0809_REG, + DA9053_GPIO1011_REG, + DA9053_GPIO1213_REG, + DA9053_GPIO1415_REG, + DA9053_ID01_REG, + DA9053_ID23_REG, + DA9053_ID45_REG, + DA9053_ID67_REG, + DA9053_ID89_REG, + DA9053_ID1011_REG, + DA9053_ID1213_REG, + DA9053_ID1415_REG, + DA9053_ID1617_REG, + DA9053_ID1819_REG, + DA9053_ID2021_REG, + DA9053_SEQSTATUS_REG, + DA9053_SEQA_REG, + DA9053_SEQB_REG, + DA9053_SEQTIMER_REG, + DA9053_BUCKA_REG, + DA9053_BUCKB_REG, + DA9053_BUCKCORE_REG, + DA9053_BUCKPRO_REG, + DA9053_BUCKMEM_REG, + DA9053_BUCKPERI_REG, + DA9053_LDO1_REG, + DA9053_LDO2_REG, + DA9053_LDO3_REG, + DA9053_LDO4_REG, + DA9053_LDO5_REG, + DA9053_LDO6_REG, + DA9053_LDO7_REG, + DA9053_LDO8_REG, + DA9053_LDO9_REG, + DA9053_LDO10_REG, + DA9053_SUPPLY_REG, + DA9053_PULLDOWN_REG, + DA9053_CHGBUCK_REG, + DA9053_WAITCONT_REG, + DA9053_ISET_REG, + DA9053_BATCHG_REG, + DA9053_CHGCONT_REG, + DA9053_INPUTCONT_REG, + DA9053_CHGTIME_REG, + DA9053_BBATCONT_REG, + DA9053_BOOST_REG, + DA9053_LEDCONT_REG, + DA9053_LEDMIN123_REG, + DA9053_LED1CONF_REG, + DA9053_LED2CONF_REG, + DA9053_LED3CONF_REG, + DA9053_LED1CONT_REG, + DA9053_LED2CONT_REG, + DA9053_LED3CONT_REG, + DA9053_LED4CONT_REG, + DA9053_LED5CONT_REG, + DA9053_ADCMAN_REG, + DA9053_ADCCONT_REG, + DA9053_ADCRESL_REG, + DA9053_ADCRESH_REG, + DA9053_VDDRES_REG, + DA9053_VDDMON_REG, + DA9053_ICHGAV_REG, + DA9053_ICHGTHD_REG, + DA9053_ICHGEND_REG, + DA9053_TBATRES_REG, + DA9053_TBATHIGHP_REG, + DA9053_TBATHIGHIN_REG, + DA9053_TBATLOW_REG, + DA9053_TOFFSET_REG, + DA9053_ADCIN4RES_REG, + DA9053_AUTO4HIGH_REG, + DA9053_AUTO4LOW_REG, + DA9053_ADCIN5RES_REG, + DA9053_AUTO5HIGH_REG, + DA9053_AUTO5LOW_REG, + DA9053_ADCIN6RES_REG, + DA9053_AUTO6HIGH_REG, + DA9053_AUTO6LOW_REG, + DA9053_TJUNCRES_REG, + DA9053_TSICONTA_REG, + DA9053_TSICONTB_REG, + DA9053_TSIXMSB_REG, + DA9053_TSIYMSB_REG, + DA9053_TSILSB_REG, + DA9053_TSIZMSB_REG, + DA9053_COUNTS_REG, + DA9053_COUNTMI_REG, + DA9053_COUNTH_REG, + DA9053_COUNTD_REG, + DA9053_COUNTMO_REG, + DA9053_COUNTY_REG, + DA9053_ALARMMI_REG, + DA9053_ALARMH_REG, + DA9053_ALARMD_REG, + DA9053_ALARMMO_REG, + DA9053_ALARMY_REG, + DA9053_SECONDA_REG, + DA9053_SECONDB_REG, + DA9053_SECONDC_REG, + DA9053_SECONDD_REG, + DA9053_PAGECON128_REG, + DA9053_CHIPID_REG, + DA9053_CONFIGID_REG, + DA9053_OTPCONT_REG, + DA9053_OSCTRIM_REG, + DA9053_GPID0_REG, + DA9053_GPID1_REG, + DA9053_GPID2_REG, + DA9053_GPID3_REG, + DA9053_GPID4_REG, + DA9053_GPID5_REG, + DA9053_GPID6_REG, + DA9053_GPID7_REG, + DA9053_GPID8_REG, + DA9053_GPID9_REG, + DIALOG_NUM_OF_REGS, +}; + +#define DA_BUCKCORE_VBCORE_1_250V 0x1E + +/* BUCKCORE REGISTER */ +#define DA9052_BUCKCORE_BCORECONF (1 << 7) +#define DA9052_BUCKCORE_BCOREEN (1 << 6) +#define DA9052_BUCKCORE_VBCORE 63 + +/* SUPPLY REGISTER */ +#define DA9052_SUPPLY_VLOCK (1 << 7) +#define DA9052_SUPPLY_VMEMSWEN (1 << 6) +#define DA9052_SUPPLY_VPERISWEN (1 << 5) +#define DA9052_SUPPLY_VLDO3GO (1 << 4) +#define DA9052_SUPPLY_VLDO2GO (1 << 3) +#define DA9052_SUPPLY_VBMEMGO (1 << 2) +#define DA9052_SUPPLY_VBPROGO (1 << 1) +#define DA9052_SUPPLY_VBCOREGO (1 << 0) + +#endif /* __DIALOG_PMIC_H__ */ diff --git a/include/fat.h b/include/fat.h index 4c92442fd3..f1b4a0d97c 100644 --- a/include/fat.h +++ b/include/fat.h @@ -178,12 +178,12 @@ typedef struct dir_slot { typedef struct { __u8 *fatbuf; /* Current FAT buffer */ int fatsize; /* Size of FAT in bits */ - __u16 fatlength; /* Length of FAT in sectors */ + __u32 fatlength; /* Length of FAT in sectors */ __u16 fat_sect; /* Starting sector of the FAT */ - __u16 rootdir_sect; /* Start sector of root directory */ + __u32 rootdir_sect; /* Start sector of root directory */ __u16 sect_size; /* Size of sectors in bytes */ __u16 clust_size; /* Size of clusters in sectors */ - short data_begin; /* The sector of the first cluster, can be negative */ + int data_begin; /* The sector of the first cluster, can be negative */ int fatbufnum; /* Used by get_fatent, init to -1 */ } fsdata; diff --git a/include/fdtdec.h b/include/fdtdec.h index 171c628485..fab577ed32 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -60,6 +60,9 @@ enum fdt_compat_id { COMPAT_NVIDIA_TEGRA20_USB, /* Tegra2 USB port */ COMPAT_NVIDIA_TEGRA20_I2C, /* Tegra2 i2c */ COMPAT_NVIDIA_TEGRA20_DVC, /* Tegra2 dvc (really just i2c) */ + COMPAT_NVIDIA_TEGRA20_EMC, /* Tegra2 memory controller */ + COMPAT_NVIDIA_TEGRA20_EMC_TABLE, /* Tegra2 memory timing table */ + COMPAT_NVIDIA_TEGRA20_KBC, /* Tegra2 Keyboard */ COMPAT_COUNT, }; @@ -117,6 +120,23 @@ int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id); /** + * Find the next compatible subnode for a peripheral. + * + * Do the first call with node set to the parent and depth = 0. This + * function will return the offset of the next compatible node. Next time + * you call this function, pass the node value returned last time, with + * depth unchanged, and the next node will be provided. + * + * @param blob FDT blob to use + * @param node Start node for search + * @param id Compatible ID to look for (enum fdt_compat_id) + * @param depthp Current depth (set to 0 before first call) + * @return offset of next compatible node, or -FDT_ERR_NOTFOUND if no more + */ +int fdtdec_next_compatible_subnode(const void *blob, int node, + enum fdt_compat_id id, int *depthp); + +/** * Look up an address property in a node and return it as an address. * The property must hold either one address with no trailing data or * one address with a length. This is only tested on 32-bit machines. @@ -272,6 +292,25 @@ int fdtdec_get_int_array(const void *blob, int node, const char *prop_name, u32 *array, int count); /** + * Look up a property in a node and return a pointer to its contents as a + * unsigned int array of given length. The property must have at least enough + * data for the array ('count' cells). It may have more, but this will be + * ignored. The data is not copied. + * + * Note that you must access elements of the array with fdt32_to_cpu(), + * since the elements will be big endian even on a little endian machine. + * + * @param blob FDT blob + * @param node node to examine + * @param prop_name name of property to find + * @param count number of array elements + * @return pointer to array if found, or NULL if the property is not + * found or there is not enough data + */ +const u32 *fdtdec_locate_array(const void *blob, int node, + const char *prop_name, int count); + +/** * Look up a boolean property in a node and return it. * * A boolean properly is true if present in the device tree and false if not @@ -311,3 +350,35 @@ int fdtdec_decode_gpio(const void *blob, int node, const char *prop_name, * @return 0 if all ok or gpio was FDT_GPIO_NONE; -1 on error */ int fdtdec_setup_gpio(struct fdt_gpio_state *gpio); + +/* + * Look up a property in a node and return its contents in a byte + * array of given length. The property must have at least enough data for + * the array (count bytes). It may have more, but this will be ignored. + * + * @param blob FDT blob + * @param node node to examine + * @param prop_name name of property to find + * @param array array to fill with data + * @param count number of array elements + * @return 0 if ok, or -FDT_ERR_MISSING if the property is not found, + * or -FDT_ERR_BADLAYOUT if not enough data + */ +int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name, + u8 *array, int count); + +/** + * Look up a property in a node and return a pointer to its contents as a + * byte array of given length. The property must have at least enough data + * for the array (count bytes). It may have more, but this will be ignored. + * The data is not copied. + * + * @param blob FDT blob + * @param node node to examine + * @param prop_name name of property to find + * @param count number of array elements + * @return pointer to byte array if found, or NULL if the property is not + * found or there is not enough data + */ +const u8 *fdtdec_locate_byte_array(const void *blob, int node, + const char *prop_name, int count); diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 8418bf7f47..0e265584bd 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -34,12 +34,13 @@ #define SYSCTL_INITA 0x08000000 #define SYSCTL_TIMEOUT_MASK 0x000f0000 #define SYSCTL_CLOCK_MASK 0x0000fff0 -#define SYSCTL_RSTA 0x01000000 #define SYSCTL_CKEN 0x00000008 #define SYSCTL_PEREN 0x00000004 #define SYSCTL_HCKEN 0x00000002 #define SYSCTL_IPGEN 0x00000001 #define SYSCTL_RSTA 0x01000000 +#define SYSCTL_RSTC 0x02000000 +#define SYSCTL_RSTD 0x04000000 #define IRQSTAT 0x0002e030 #define IRQSTAT_DMAE (0x10000000) @@ -85,6 +86,7 @@ #define IRQSTATEN_CC (0x00000001) #define PRSSTAT 0x0002e024 +#define PRSSTAT_DAT0 (0x01000000) #define PRSSTAT_CLSL (0x00800000) #define PRSSTAT_WPSPL (0x00080000) #define PRSSTAT_CDPL (0x00040000) diff --git a/include/fsl_pmic.h b/include/fsl_pmic.h index 742f2e19f9..64c1e2ef65 100644 --- a/include/fsl_pmic.h +++ b/include/fsl_pmic.h @@ -122,4 +122,15 @@ enum { /* Interrupt status 1 */ #define RTCRSTI (1 << 7) +/* MC34708 Definitions */ +#define SWx_VOLT_MASK_MC34708 0x3F +#define SWx_1_250V_MC34708 0x30 +#define SWx_1_300V_MC34708 0x34 +#define TIMER_MASK_MC34708 0x300 +#define TIMER_4S_MC34708 0x100 +#define VUSBSEL_MC34708 (1 << 2) +#define VUSBEN_MC34708 (1 << 3) +#define SWBST_CTRL 31 +#define SWBST_AUTO 0x8 + #endif diff --git a/include/gdsys_fpga.h b/include/gdsys_fpga.h index 949864c0f2..1758d7445e 100644 --- a/include/gdsys_fpga.h +++ b/include/gdsys_fpga.h @@ -35,20 +35,20 @@ enum { int get_fpga_state(unsigned dev); void print_fpga_state(unsigned dev); -typedef struct ihs_gpio { +struct ihs_gpio { u16 read; u16 clear; u16 set; -} ihs_gpio_t; +}; -typedef struct ihs_i2c { +struct ihs_i2c { u16 write_mailbox; u16 write_mailbox_ext; u16 read_mailbox; u16 read_mailbox_ext; -} ihs_i2c_t; +}; -typedef struct ihs_osd { +struct ihs_osd { u16 version; u16 features; u16 control; @@ -56,10 +56,21 @@ typedef struct ihs_osd { u16 xy_scale; u16 x_pos; u16 y_pos; -} ihs_osd_t; +}; + +#ifdef CONFIG_NEO +struct ihs_fpga { + u16 reflection_low; /* 0x0000 */ + u16 versions; /* 0x0002 */ + u16 fpga_features; /* 0x0004 */ + u16 fpga_version; /* 0x0006 */ + u16 reserved_0[8187]; /* 0x0008 */ + u16 reflection_high; /* 0x3ffe */ +}; +#endif #ifdef CONFIG_IO -typedef struct ihs_fpga { +struct ihs_fpga { u16 reflection_low; /* 0x0000 */ u16 versions; /* 0x0002 */ u16 fpga_features; /* 0x0004 */ @@ -68,11 +79,11 @@ typedef struct ihs_fpga { u16 quad_serdes_reset; /* 0x0012 */ u16 reserved_1[8181]; /* 0x0014 */ u16 reflection_high; /* 0x3ffe */ -} ihs_fpga_t; +}; #endif #ifdef CONFIG_IO64 -typedef struct ihs_fpga { +struct ihs_fpga { u16 reflection_low; /* 0x0000 */ u16 versions; /* 0x0002 */ u16 fpga_features; /* 0x0004 */ @@ -87,30 +98,30 @@ typedef struct ihs_fpga { u16 ch0_hicb_config_int;/* 0x0502 */ u16 reserved_3[7549]; /* 0x0504 */ u16 reflection_high; /* 0x3ffe */ -} ihs_fpga_t; +}; #endif #ifdef CONFIG_IOCON -typedef struct ihs_fpga { +struct ihs_fpga { u16 reflection_low; /* 0x0000 */ u16 versions; /* 0x0002 */ u16 fpga_version; /* 0x0004 */ u16 fpga_features; /* 0x0006 */ u16 reserved_0[6]; /* 0x0008 */ - ihs_gpio_t gpio; /* 0x0014 */ + struct ihs_gpio gpio; /* 0x0014 */ u16 mpc3w_control; /* 0x001a */ u16 reserved_1[19]; /* 0x001c */ u16 videocontrol; /* 0x0042 */ u16 reserved_2[93]; /* 0x0044 */ u16 reflection_high; /* 0x00fe */ - ihs_osd_t osd; /* 0x0100 */ - u16 reserved_3[88]; /* 0x010e */ + struct ihs_osd osd; /* 0x0100 */ + u16 reserved_3[889]; /* 0x010e */ u16 videomem; /* 0x0800 */ -} ihs_fpga_t; +}; #endif #ifdef CONFIG_DLVISION_10G -typedef struct ihs_fpga { +struct ihs_fpga { u16 reflection_low; /* 0x0000 */ u16 versions; /* 0x0002 */ u16 fpga_version; /* 0x0004 */ @@ -118,16 +129,16 @@ typedef struct ihs_fpga { u16 reserved_0[10]; /* 0x0008 */ u16 extended_interrupt; /* 0x001c */ u16 reserved_1[9]; /* 0x001e */ - ihs_i2c_t i2c; /* 0x0030 */ + struct ihs_i2c i2c; /* 0x0030 */ u16 reserved_2[16]; /* 0x0038 */ u16 mpc3w_control; /* 0x0058 */ u16 reserved_3[34]; /* 0x005a */ u16 videocontrol; /* 0x009e */ u16 reserved_4[176]; /* 0x00a0 */ - ihs_osd_t osd; /* 0x0200 */ + struct ihs_osd osd; /* 0x0200 */ u16 reserved_5[761]; /* 0x020e */ u16 videomem; /* 0x0800 */ -} ihs_fpga_t; +}; #endif #endif diff --git a/include/ide.h b/include/ide.h index 8ecc9dd3a5..0424d045a1 100644 --- a/include/ide.h +++ b/include/ide.h @@ -2,31 +2,16 @@ * (C) Copyright 2000 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef _IDE_H #define _IDE_H -#define IDE_BUS(dev) (dev >> 1) +#define IDE_BUS(dev) (dev / (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS)) #define ATA_CURR_BASE(dev) (CONFIG_SYS_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)]) +extern ulong ide_bus_offset[]; #ifdef CONFIG_IDE_LED @@ -42,8 +27,12 @@ #ifdef CONFIG_SYS_64BIT_LBA typedef uint64_t lbaint_t; +#define LBAF "%llx" +#define LBAFU "%llu" #else typedef ulong lbaint_t; +#define LBAF "%lx" +#define LBAFU "%lu" #endif /* @@ -51,8 +40,17 @@ typedef ulong lbaint_t; */ void ide_init(void); -ulong ide_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer); -ulong ide_write(int device, lbaint_t blknr, ulong blkcnt, const void *buffer); +ulong ide_read(int device, lbaint_t blknr, lbaint_t blkcnt, void *buffer); +ulong ide_write(int device, lbaint_t blknr, lbaint_t blkcnt, + const void *buffer); + +#ifdef CONFIG_IDE_PREINIT +int ide_preinit(void); +#endif + +#ifdef CONFIG_IDE_INIT_POSTRESET +int ide_init_postreset(void); +#endif #if defined(CONFIG_OF_IDE_FIXUP) int ide_device_present(int dev); @@ -62,6 +60,23 @@ int ide_device_present(int dev); unsigned char ide_read_register(int dev, unsigned int port); void ide_write_register(int dev, unsigned int port, unsigned char val); void ide_read_data(int dev, ulong *sect_buf, int words); -void ide_write_data(int dev, ulong *sect_buf, int words); +void ide_write_data(int dev, const ulong *sect_buf, int words); #endif + +/* + * I/O function overrides + */ +void ide_input_swap_data(int dev, ulong *sect_buf, int words); +void ide_input_data(int dev, ulong *sect_buf, int words); +void ide_output_data(int dev, const ulong *sect_buf, int words); +void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts); +void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts); + +/** + * board_start_ide() - Start up the board IDE interfac + * + * @return 0 if ok + */ +int board_start_ide(void); + #endif /* _IDE_H */ diff --git a/include/image.h b/include/image.h index a1c6e4e9ad..aa9daa2deb 100644 --- a/include/image.h +++ b/include/image.h @@ -531,9 +531,9 @@ static inline int image_check_target_arch(const image_header_t *hdr) #define FIT_MAX_HASH_LEN 20 /* max(crc32_len(4), sha1_len(20)) */ /* cmdline argument format parsing */ -inline int fit_parse_conf(const char *spec, ulong addr_curr, +int fit_parse_conf(const char *spec, ulong addr_curr, ulong *addr, const char **conf_name); -inline int fit_parse_subimage(const char *spec, ulong addr_curr, +int fit_parse_subimage(const char *spec, ulong addr_curr, ulong *addr, const char **image_name); void fit_print_contents(const void *fit); diff --git a/include/input.h b/include/input.h new file mode 100644 index 0000000000..31b1ef9603 --- /dev/null +++ b/include/input.h @@ -0,0 +1,147 @@ +/* + * Keyboard input helper functions (too small to be called a layer) + * + * Copyright (c) 2011 The Chromium OS Authors. + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _INPUT_H +#define _INPUT_H + +enum { + INPUT_MAX_MODIFIERS = 4, + INPUT_BUFFER_LEN = 16, +}; + +enum { + /* Keyboard LEDs */ + INPUT_LED_SCROLL = 1 << 0, + INPUT_LED_CAPS = 1 << 1, + INPUT_LED_NUM = 1 << 2, +}; + +/* + * This table translates key codes to ASCII. Most of the entries are ASCII + * codes, but entries after KEY_FIRST_MOD indicate that this key is a + * modifier key, like shift, ctrl. KEY_FIRST_MOD + MOD_SHIFT is the shift + * key, for example. + */ +struct input_key_xlate { + /* keycode of the modifiers which select this table, -1 if none */ + int left_keycode; + int right_keycode; + const uchar *xlate; /* keycode to ASCII table */ + int num_entries; /* number of entries in this table */ +}; + +struct input_config { + uchar fifo[INPUT_BUFFER_LEN]; + int fifo_in, fifo_out; + + /* Which modifiers are active (1 bit for each MOD_... value) */ + uchar modifiers; + uchar flags; /* active state keys (FLAGS_...) */ + uchar leds; /* active LEDS (INPUT_LED_...) */ + uchar num_tables; /* number of modifier tables */ + int prev_keycodes[INPUT_BUFFER_LEN]; /* keys held last time */ + int num_prev_keycodes; /* number of prev keys */ + struct input_key_xlate table[INPUT_MAX_MODIFIERS]; + + /** + * Function the input helper calls to scan the keyboard + * + * @param config Input state + * @return 0 if no keys read, otherwise number of keys read, or 1 if + * unknown + */ + int (*read_keys)(struct input_config *config); + unsigned int next_repeat_ms; /* Next time we repeat a key */ + unsigned int repeat_delay_ms; /* Time before autorepeat starts */ + unsigned int repeat_rate_ms; /* Autorepeat rate in ms */ +}; + +struct stdio_dev; + +/** + * Convert a list of key codes into ASCII and send them + * + * @param config Input state + * @param keycode List of key codes to examine + * @param num_keycodes Number of key codes + */ +int input_send_keycodes(struct input_config *config, int keycode[], int count); + +/** + * Add a new key translation table to the input + * + * @param config Input state + * @param left_keycode Key to hold to get into this table + * @param right_keycode Another key to hold to get into this table + * @param xlate Conversion table from key codes to ASCII + * @param num_entries Number of entries in xlate table + */ +int input_add_table(struct input_config *config, int left_keycode, + int right_keycode, const uchar *xlate, int num_entries); + +/** + * Test if keys are available to be read + * + * @param config Input state + * @return 0 if no keys available, 1 if keys are available + */ +int input_tstc(struct input_config *config); + +/** + * Read a key + * + * TODO: U-Boot wants 0 for no key, but Ctrl-@ is a valid key... + * + * @param config Input state + * @return key, or 0 if no key, or -1 if error + */ +int input_getc(struct input_config *config); + +/** + * Register a new device with stdio and switch to it if wanted + * + * @param dev Pointer to device + * @return 0 if ok, -1 on error + */ +int input_stdio_register(struct stdio_dev *dev); + +/** + * Set up the input handler with basic key maps. + * + * @param config Input state + * @param leds Initial LED value (INPUT_LED_ mask), 0 suggested + * @param repeat_delay_ms Delay before key auto-repeat starts (in ms) + * @param repeat_rate_ms Delay between successive key repeats (in ms) + * @return 0 if ok, -1 on error + */ +int input_init(struct input_config *config, int leds, int repeat_delay_ms, + int repeat_rate_ms); + +#ifdef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +extern int overwrite_console(void); +#define OVERWRITE_CONSOLE overwrite_console() +#else +#define OVERWRITE_CONSOLE 0 +#endif /* CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE */ + +#endif diff --git a/include/jffs2/load_kernel.h b/include/jffs2/load_kernel.h index 906eb3d3cd..23bb4ae0a3 100644 --- a/include/jffs2/load_kernel.h +++ b/include/jffs2/load_kernel.h @@ -46,11 +46,12 @@ struct part_info { struct list_head link; char *name; /* partition name */ u8 auto_name; /* set to 1 for generated name */ - u32 size; /* total size of the partition */ - u32 offset; /* offset within device */ + u64 size; /* total size of the partition */ + u64 offset; /* offset within device */ void *jffs2_priv; /* used internaly by jffs2 */ u32 mask_flags; /* kernel MTD mask flags */ u32 sector_size; /* size of sector */ + int dirty; /* if true, the mtd has been wrotten data*/ struct mtd_device *dev; /* parent device */ }; @@ -58,7 +59,7 @@ struct mtdids { struct list_head link; u8 type; /* device type */ u8 num; /* device number */ - u32 size; /* device size */ + u64 size; /* device size */ char *mtd_id; /* linux kernel device id */ }; @@ -79,5 +80,6 @@ extern int mtdparts_init(void); extern int find_dev_and_part(const char *id, struct mtd_device **dev, u8 *part_num, struct part_info **part); extern struct mtd_device *device_find(u8 type, u8 num); +int mtdparts_clear_all_dirty(struct mtd_device *dev); #endif /* load_kernel_h */ diff --git a/include/key_matrix.h b/include/key_matrix.h new file mode 100644 index 0000000000..f41331407d --- /dev/null +++ b/include/key_matrix.h @@ -0,0 +1,99 @@ +/* + * Keyboard matrix helper functions + * + * Copyright (c) 2012 The Chromium OS Authors. + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _KEY_MATRIX_H +#define _KEY_MATRIX_H + +#include <common.h> + +/* Information about a matrix keyboard */ +struct key_matrix { + /* Dimensions of the keyboard matrix, in rows and columns */ + int num_rows; + int num_cols; + int key_count; /* number of keys in the matrix (= rows * cols) */ + + /* + * Information about keycode mappings. The plain_keycode array must + * exist but fn may be NULL in which case it is not decoded. + */ + const u8 *plain_keycode; /* key code for each row / column */ + const u8 *fn_keycode; /* ...when Fn held down */ + int fn_pos; /* position of Fn key in key (or -1) */ +}; + +/* Information about a particular key (row, column pair) in the matrix */ +struct key_matrix_key { + uint8_t row; /* row number (0 = first) */ + uint8_t col; /* column number (0 = first) */ + uint8_t valid; /* 1 if valid, 0 to ignore this */ +}; + +/** + * Decode a set of pressed keys into key codes + * + * Given a list of keys that are pressed, this converts this list into + * a list of key codes. Each of the keys has a valid flag, which can be + * used to mark a particular key as invalid (so that it is ignored). + * + * The plain keymap is used, unless the Fn key is detected along the way, + * at which point we switch to the Fn key map. + * + * If key ghosting is detected, we simply ignore the keys and return 0. + * + * @param config Keyboard matrix config + * @param keys List of keys to process (each is row, col) + * @param num_keys Number of keys to process + * @param keycode Returns a list of key codes, decoded from input + * @param max_keycodes Size of key codes array (suggest 8) + * + */ +int key_matrix_decode(struct key_matrix *config, struct key_matrix_key *keys, + int num_keys, int keycode[], int max_keycodes); + +/** + * Read the keyboard configuration out of the fdt. + * + * Decode properties of named "linux,<type>keymap" where <type> is either + * empty, or "fn-". Then set up the plain key map (and the FN keymap if + * present). + * + * @param config Keyboard matrix config + * @param blob FDT blob + * @param node Node containing compatible data + * @return 0 if ok, -1 on error + */ +int key_matrix_decode_fdt(struct key_matrix *config, const void *blob, + int node); + +/** + * Set up a new key matrix. + * + * @param config Keyboard matrix config + * @param rows Number of rows in key matrix + * @param cols Number of columns in key matrix + * @return 0 if ok, -1 on error + */ +int key_matrix_init(struct key_matrix *config, int rows, int cols); + +#endif diff --git a/include/lcd.h b/include/lcd.h index d95feeb791..3d9ef16710 100644 --- a/include/lcd.h +++ b/include/lcd.h @@ -183,6 +183,70 @@ typedef struct vidinfo { u_long mmio; /* Memory mapped registers */ } vidinfo_t; +#elif defined(CONFIG_EXYNOS_FB) + +enum { + FIMD_RGB_INTERFACE = 1, + FIMD_CPU_INTERFACE = 2, +}; + +typedef struct vidinfo { + ushort vl_col; /* Number of columns (i.e. 640) */ + ushort vl_row; /* Number of rows (i.e. 480) */ + ushort vl_width; /* Width of display area in millimeters */ + ushort vl_height; /* Height of display area in millimeters */ + + /* LCD configuration register */ + u_char vl_freq; /* Frequency */ + u_char vl_clkp; /* Clock polarity */ + u_char vl_oep; /* Output Enable polarity */ + u_char vl_hsp; /* Horizontal Sync polarity */ + u_char vl_vsp; /* Vertical Sync polarity */ + u_char vl_dp; /* Data polarity */ + u_char vl_bpix; /* Bits per pixel */ + + /* Horizontal control register. Timing from data sheet */ + u_char vl_hspw; /* Horz sync pulse width */ + u_char vl_hfpd; /* Wait before of line */ + u_char vl_hbpd; /* Wait end of line */ + + /* Vertical control register. */ + u_char vl_vspw; /* Vertical sync pulse width */ + u_char vl_vfpd; /* Wait before of frame */ + u_char vl_vbpd; /* Wait end of frame */ + u_char vl_cmd_allow_len; /* Wait end of frame */ + + void (*cfg_gpio)(void); + void (*backlight_on)(unsigned int onoff); + void (*reset_lcd)(void); + void (*lcd_power_on)(void); + void (*cfg_ldo)(void); + void (*enable_ldo)(unsigned int onoff); + void (*mipi_power)(void); + void (*backlight_reset)(void); + + unsigned int win_id; + unsigned int init_delay; + unsigned int power_on_delay; + unsigned int reset_delay; + unsigned int interface_mode; + unsigned int mipi_enabled; + unsigned int cs_setup; + unsigned int wr_setup; + unsigned int wr_act; + unsigned int wr_hold; + + /* parent clock name(MPLL, EPLL or VPLL) */ + unsigned int pclk_name; + /* ratio value for source clock from parent clock. */ + unsigned int sclk_div; + + unsigned int dual_lcd_enabled; + +} vidinfo_t; + +void init_panel_info(vidinfo_t *vid); + #else typedef struct vidinfo { diff --git a/include/linux/mtd/compat.h b/include/linux/compat.h index 39c693f7a8..593b07f4b5 100644 --- a/include/linux/mtd/compat.h +++ b/include/linux/compat.h @@ -48,5 +48,8 @@ #define BUG_ON(condition) do { if (condition) BUG(); } while(0) #endif /* BUG */ +#define WARN_ON(x) if (x) {printf("WARNING in %s line %d\n" \ + , __FILE__, __LINE__); } + #define PAGE_SIZE 4096 #endif diff --git a/include/linux/compiler-gcc.h b/include/linux/compiler-gcc.h index 73dcf804bc..ad6627787c 100644 --- a/include/linux/compiler-gcc.h +++ b/include/linux/compiler-gcc.h @@ -44,9 +44,10 @@ */ #if !defined(CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING) || \ !defined(CONFIG_OPTIMIZE_INLINING) || (__GNUC__ < 4) -# define inline inline __attribute__((always_inline)) -# define __inline__ __inline__ __attribute__((always_inline)) -# define __inline __inline __attribute__((always_inline)) +/* XXX: check __GNUC_STDC_INLINE__, fix line length */ +# define inline inline __attribute__((always_inline)) __attribute__((__gnu_inline__)) +# define __inline__ __inline__ __attribute__((always_inline)) __attribute__((__gnu_inline__)) +# define __inline __inline __attribute__((always_inline)) __attribute__((__gnu_inline__)) #endif #define __deprecated __attribute__((deprecated)) diff --git a/include/linux/compiler-gcc5.h b/include/linux/compiler-gcc5.h new file mode 100644 index 0000000000..c8c5659525 --- /dev/null +++ b/include/linux/compiler-gcc5.h @@ -0,0 +1,65 @@ +#ifndef __LINUX_COMPILER_H +#error "Please don't include <linux/compiler-gcc5.h> directly, include <linux/compiler.h> instead." +#endif + +#define __used __attribute__((__used__)) +#define __must_check __attribute__((warn_unused_result)) +#define __compiler_offsetof(a, b) __builtin_offsetof(a, b) + +/* Mark functions as cold. gcc will assume any path leading to a call + to them will be unlikely. This means a lot of manual unlikely()s + are unnecessary now for any paths leading to the usual suspects + like BUG(), printk(), panic() etc. [but let's keep them for now for + older compilers] + + Early snapshots of gcc 4.3 don't support this and we can't detect this + in the preprocessor, but we can live with this because they're unreleased. + Maketime probing would be overkill here. + + gcc also has a __attribute__((__hot__)) to move hot functions into + a special section, but I don't see any sense in this right now in + the kernel context */ +#define __cold __attribute__((__cold__)) + +#define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__) + +#ifndef __CHECKER__ +# define __compiletime_warning(message) __attribute__((warning(message))) +# define __compiletime_error(message) __attribute__((error(message))) +#endif /* __CHECKER__ */ + +/* + * Mark a position in code as unreachable. This can be used to + * suppress control flow warnings after asm blocks that transfer + * control elsewhere. + * + * Early snapshots of gcc 4.5 don't support this and we can't detect + * this in the preprocessor, but we can live with this because they're + * unreleased. Really, we need to have autoconf for the kernel. + */ +#define unreachable() __builtin_unreachable() + +/* Mark a function definition as prohibited from being cloned. */ +#define __noclone __attribute__((__noclone__)) + +/* + * Tell the optimizer that something else uses this function or variable. + */ +#define __visible __attribute__((externally_visible)) + +/* + * GCC 'asm goto' miscompiles certain code sequences: + * + * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58670 + * + * Work it around via a compiler barrier quirk suggested by Jakub Jelinek. + * + * (asm goto is automatically volatile - the naming reflects this.) + */ +#define asm_volatile_goto(x...) do { asm goto(x); asm (""); } while (0) + +#ifdef CONFIG_ARCH_USE_BUILTIN_BSWAP +#define __HAVE_BUILTIN_BSWAP32__ +#define __HAVE_BUILTIN_BSWAP64__ +#define __HAVE_BUILTIN_BSWAP16__ +#endif /* CONFIG_ARCH_USE_BUILTIN_BSWAP */ diff --git a/include/linux/compiler-gcc6.h b/include/linux/compiler-gcc6.h new file mode 100644 index 0000000000..a3d00d8d31 --- /dev/null +++ b/include/linux/compiler-gcc6.h @@ -0,0 +1,66 @@ +#ifndef __LINUX_COMPILER_H +#error "Please don't include <linux/compiler-gcc6.h> directly, include <linux/compiler.h> instead." +#endif + +#define __used __attribute__((__used__)) +#define __must_check __attribute__((warn_unused_result)) +#define __compiler_offsetof(a, b) __builtin_offsetof(a, b) + +/* Mark functions as cold. gcc will assume any path leading to a call + to them will be unlikely. This means a lot of manual unlikely()s + are unnecessary now for any paths leading to the usual suspects + like BUG(), printk(), panic() etc. [but let's keep them for now for + older compilers] + + Early snapshots of gcc 4.3 don't support this and we can't detect this + in the preprocessor, but we can live with this because they're unreleased. + Maketime probing would be overkill here. + + gcc also has a __attribute__((__hot__)) to move hot functions into + a special section, but I don't see any sense in this right now in + the kernel context */ +#define __cold __attribute__((__cold__)) + +#define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__) + +#ifndef __CHECKER__ +# define __compiletime_warning(message) __attribute__((warning(message))) +# define __compiletime_error(message) __attribute__((error(message))) +#endif /* __CHECKER__ */ + +/* + * Mark a position in code as unreachable. This can be used to + * suppress control flow warnings after asm blocks that transfer + * control elsewhere. + * + * Early snapshots of gcc 4.5 don't support this and we can't detect + * this in the preprocessor, but we can live with this because they're + * unreleased. Really, we need to have autoconf for the kernel. + */ +#define unreachable() __builtin_unreachable() + +/* Mark a function definition as prohibited from being cloned. */ +#define __noclone __attribute__((__noclone__)) + +/* + * Tell the optimizer that something else uses this function or variable. + */ +#define __visible __attribute__((externally_visible)) + +/* + * GCC 'asm goto' miscompiles certain code sequences: + * + * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58670 + * + * Work it around via a compiler barrier quirk suggested by Jakub Jelinek. + * Fixed in GCC 4.8.2 and later versions. + * + * (asm goto is automatically volatile - the naming reflects this.) + */ +#define asm_volatile_goto(x...) do { asm goto(x); asm (""); } while (0) + +#ifdef CONFIG_ARCH_USE_BUILTIN_BSWAP +#define __HAVE_BUILTIN_BSWAP32__ +#define __HAVE_BUILTIN_BSWAP64__ +#define __HAVE_BUILTIN_BSWAP16__ +#endif /* CONFIG_ARCH_USE_BUILTIN_BSWAP */ diff --git a/include/linux/err.h b/include/linux/err.h index 4e08c4fe68..96c0c72baa 100644 --- a/include/linux/err.h +++ b/include/linux/err.h @@ -5,7 +5,7 @@ #if 0 #include <linux/compiler.h> #else -#include <linux/mtd/compat.h> +#include <linux/compat.h> #endif #include <asm/errno.h> diff --git a/include/linux/input.h b/include/linux/input.h new file mode 100644 index 0000000000..44aec763dc --- /dev/null +++ b/include/linux/input.h @@ -0,0 +1,155 @@ +/* + * Copyright (c) 1999-2002 Vojtech Pavlik + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + */ + +#ifndef _LINUX_INPUT_H +#define _LINUX_INPUT_H + +/* + * Keys and buttons + * + * Most of the keys/buttons are modeled after USB HUT 1.12 + * (see http://www.usb.org/developers/hidpage). + * Abbreviations in the comments: + * AC - Application Control + * AL - Application Launch Button + * SC - System Control + */ + +#define KEY_RESERVED 0 +#define KEY_ESC 1 +#define KEY_1 2 +#define KEY_2 3 +#define KEY_3 4 +#define KEY_4 5 +#define KEY_5 6 +#define KEY_6 7 +#define KEY_7 8 +#define KEY_8 9 +#define KEY_9 10 +#define KEY_0 11 +#define KEY_MINUS 12 +#define KEY_EQUAL 13 +#define KEY_BACKSPACE 14 +#define KEY_TAB 15 +#define KEY_Q 16 +#define KEY_W 17 +#define KEY_E 18 +#define KEY_R 19 +#define KEY_T 20 +#define KEY_Y 21 +#define KEY_U 22 +#define KEY_I 23 +#define KEY_O 24 +#define KEY_P 25 +#define KEY_LEFTBRACE 26 +#define KEY_RIGHTBRACE 27 +#define KEY_ENTER 28 +#define KEY_LEFTCTRL 29 +#define KEY_A 30 +#define KEY_S 31 +#define KEY_D 32 +#define KEY_F 33 +#define KEY_G 34 +#define KEY_H 35 +#define KEY_J 36 +#define KEY_K 37 +#define KEY_L 38 +#define KEY_SEMICOLON 39 +#define KEY_APOSTROPHE 40 +#define KEY_GRAVE 41 +#define KEY_LEFTSHIFT 42 +#define KEY_BACKSLASH 43 +#define KEY_Z 44 +#define KEY_X 45 +#define KEY_C 46 +#define KEY_V 47 +#define KEY_B 48 +#define KEY_N 49 +#define KEY_M 50 +#define KEY_COMMA 51 +#define KEY_DOT 52 +#define KEY_SLASH 53 +#define KEY_RIGHTSHIFT 54 +#define KEY_KPASTERISK 55 +#define KEY_LEFTALT 56 +#define KEY_SPACE 57 +#define KEY_CAPSLOCK 58 +#define KEY_F1 59 +#define KEY_F2 60 +#define KEY_F3 61 +#define KEY_F4 62 +#define KEY_F5 63 +#define KEY_F6 64 +#define KEY_F7 65 +#define KEY_F8 66 +#define KEY_F9 67 +#define KEY_F10 68 +#define KEY_NUMLOCK 69 +#define KEY_SCROLLLOCK 70 +#define KEY_KP7 71 +#define KEY_KP8 72 +#define KEY_KP9 73 +#define KEY_KPMINUS 74 +#define KEY_KP4 75 +#define KEY_KP5 76 +#define KEY_KP6 77 +#define KEY_KPPLUS 78 +#define KEY_KP1 79 +#define KEY_KP2 80 +#define KEY_KP3 81 +#define KEY_KP0 82 +#define KEY_KPDOT 83 + +#define KEY_ZENKAKUHANKAKU 85 +#define KEY_102ND 86 +#define KEY_F11 87 +#define KEY_F12 88 +#define KEY_RO 89 +#define KEY_KATAKANA 90 +#define KEY_HIRAGANA 91 +#define KEY_HENKAN 92 +#define KEY_KATAKANAHIRAGANA 93 +#define KEY_MUHENKAN 94 +#define KEY_KPJPCOMMA 95 +#define KEY_KPENTER 96 +#define KEY_RIGHTCTRL 97 +#define KEY_KPSLASH 98 +#define KEY_SYSRQ 99 +#define KEY_RIGHTALT 100 +#define KEY_LINEFEED 101 +#define KEY_HOME 102 +#define KEY_UP 103 +#define KEY_PAGEUP 104 +#define KEY_LEFT 105 +#define KEY_RIGHT 106 +#define KEY_END 107 +#define KEY_DOWN 108 +#define KEY_PAGEDOWN 109 +#define KEY_INSERT 110 +#define KEY_DELETE 111 +#define KEY_MACRO 112 +#define KEY_MUTE 113 +#define KEY_VOLUMEDOWN 114 +#define KEY_VOLUMEUP 115 +#define KEY_POWER 116 /* SC System Power Down */ +#define KEY_KPEQUAL 117 +#define KEY_KPPLUSMINUS 118 +#define KEY_PAUSE 119 +#define KEY_SCALE 120 /* AL Compiz Scale (Expose) */ + +#define KEY_KPCOMMA 121 +#define KEY_HANGEUL 122 +#define KEY_HANGUEL KEY_HANGEUL +#define KEY_HANJA 123 +#define KEY_YEN 124 +#define KEY_LEFTMETA 125 +#define KEY_RIGHTMETA 126 +#define KEY_COMPOSE 127 +#define KEY_FN 0x1d0 + +#endif diff --git a/include/linux/linkage.h b/include/linux/linkage.h index ed4cf6cbcd..7b749bbda7 100644 --- a/include/linux/linkage.h +++ b/include/linux/linkage.h @@ -44,8 +44,13 @@ #define SYMBOL_NAME_LABEL(X) X: #endif +#ifndef __ALIGN #define __ALIGN .align 4 +#endif + +#ifndef __ALIGN_STR #define __ALIGN_STR ".align 4" +#endif #ifdef __ASSEMBLY__ @@ -67,7 +72,7 @@ #ifndef ENDPROC #define ENDPROC(name) \ - .type name, @function; \ + .type name STT_FUNC; \ END(name) #endif diff --git a/include/linux/mtd/mtd-abi.h b/include/linux/mtd/mtd-abi.h index 8d5f60c75e..5991157065 100644 --- a/include/linux/mtd/mtd-abi.h +++ b/include/linux/mtd/mtd-abi.h @@ -8,7 +8,7 @@ #define __MTD_ABI_H__ #if 1 -#include <linux/mtd/compat.h> +#include <linux/compat.h> #endif struct erase_info_user { diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 141c96024c..dbcc05ae86 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -236,6 +236,11 @@ struct mtd_info { void (*put_device) (struct mtd_info *mtd); }; +static inline int is_power_of_2(unsigned long n) +{ + return (n != 0 && ((n & (n - 1)) == 0)); +} + static inline uint32_t mtd_div_by_eb(uint64_t sz, struct mtd_info *mtd) { do_div(sz, mtd->erasesize); @@ -247,6 +252,30 @@ static inline uint32_t mtd_mod_by_eb(uint64_t sz, struct mtd_info *mtd) return do_div(sz, mtd->erasesize); } +static inline uint32_t mtd_div_by_ws(uint64_t sz, struct mtd_info *mtd) +{ + do_div(sz, mtd->writesize); + return sz; +} + +static inline uint32_t mtd_mod_by_ws(uint64_t sz, struct mtd_info *mtd) +{ + return do_div(sz, mtd->writesize); +} + +static inline uint32_t mtd_div_by_var(uint64_t sz, uint32_t var) +{ + (void)(((typeof((var)) *)0) == ((uint32_t *)0)); + do_div(sz, var); + return sz; +} + +static inline uint32_t mtd_mod_by_var(uint64_t sz, uint32_t var) +{ + (void)(((typeof((var)) *)0) == ((uint32_t *)0)); + return do_div(sz, var); +} + /* Kernel-side ioctl definitions */ extern int add_mtd_device(struct mtd_info *mtd); diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index da6fa184c3..eb580f3e99 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -20,7 +20,7 @@ #include "config.h" -#include "linux/mtd/compat.h" +#include "linux/compat.h" #include "linux/mtd/mtd.h" #include "linux/mtd/bbm.h" @@ -47,7 +47,7 @@ extern void nand_wait_ready(struct mtd_info *mtd); * adjust this accordingly. */ #define NAND_MAX_OOBSIZE 576 -#define NAND_MAX_PAGESIZE 8192 +#define NAND_MAX_PAGESIZE 16384 /* * Constants for hardware specific CLE/ALE/NCE function @@ -480,6 +480,7 @@ struct nand_chip { void __iomem *IO_ADDR_R; void __iomem *IO_ADDR_W; + void (*read_nand_ID)(struct mtd_info *mtd); uint8_t (*read_byte)(struct mtd_info *mtd); u16 (*read_word)(struct mtd_info *mtd); void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len); @@ -556,6 +557,7 @@ struct nand_chip { #define NAND_MFR_HYNIX 0xad #define NAND_MFR_MICRON 0x2c #define NAND_MFR_AMD 0x01 +#define NAND_MFR_ESMT 0xc8 /** * struct nand_flash_dev - NAND Flash Device ID Structure @@ -671,6 +673,35 @@ struct platform_nand_chip *get_platform_nandchip(struct mtd_info *mtd) return chip->priv; } +static inline uint32_t mtd_div_by_cs(uint64_t sz, struct mtd_info *mtd) +{ + struct nand_chip *chip = mtd->priv; + + if(chip->chipsize >> 32){ + //assume the chipsize is not out of 4096TB(4*1024*1024*GB) + //4096TB is 52bits. + sz >>= 20; + do_div(sz, chip->chipsize >> 20); + }else{ + do_div(sz, chip->chipsize); + } + return sz; +} + +static inline uint32_t mtd_mod_by_cs(uint64_t sz, struct mtd_info *mtd) +{ + struct nand_chip *chip = mtd->priv; + + if(chip->chipsize >> 32){ + //assume the chipsize is not out of 4096TB(4*1024*1024*GB) + //4096TB is 52bits. + sz >>= 20; + return do_div(sz, chip->chipsize >> 20); + }else{ + return do_div(sz, chip->chipsize); + } +} + /* Standard NAND functions from nand_base.c */ void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len); void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len); diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h index bb4a4a6b28..e7b63ddd10 100644 --- a/include/linux/mtd/onenand.h +++ b/include/linux/mtd/onenand.h @@ -17,7 +17,7 @@ /* Note: The header order is impoertant */ #include <onenand_uboot.h> -#include <linux/mtd/compat.h> +#include <linux/compat.h> #include <linux/mtd/bbm.h> #define MAX_DIES 2 diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h index 49b748337a..ce1d1e10ba 100644 --- a/include/linux/usb/ch9.h +++ b/include/linux/usb/ch9.h @@ -204,28 +204,6 @@ struct usb_descriptor_header { __u8 bDescriptorType; } __attribute__ ((packed)); - -/*-------------------------------------------------------------------------*/ - -/* USB_DT_DEVICE: Device descriptor */ -struct usb_device_descriptor { - __u8 bLength; - __u8 bDescriptorType; - - __le16 bcdUSB; - __u8 bDeviceClass; - __u8 bDeviceSubClass; - __u8 bDeviceProtocol; - __u8 bMaxPacketSize0; - __le16 idVendor; - __le16 idProduct; - __le16 bcdDevice; - __u8 iManufacturer; - __u8 iProduct; - __u8 iSerialNumber; - __u8 bNumConfigurations; -} __attribute__ ((packed)); - #define USB_DT_DEVICE_SIZE 18 @@ -282,56 +260,11 @@ struct usb_config_descriptor { #define USB_CONFIG_ATT_WAKEUP (1 << 5) /* can wakeup */ #define USB_CONFIG_ATT_BATTERY (1 << 4) /* battery powered */ -/*-------------------------------------------------------------------------*/ - -/* USB_DT_STRING: String descriptor */ -struct usb_string_descriptor { - __u8 bLength; - __u8 bDescriptorType; - - __le16 wData[1]; /* UTF-16LE encoded */ -} __attribute__ ((packed)); - /* note that "string" zero is special, it holds language codes that * the device supports, not Unicode characters. */ -/*-------------------------------------------------------------------------*/ - -/* USB_DT_INTERFACE: Interface descriptor */ -struct usb_interface_descriptor { - __u8 bLength; - __u8 bDescriptorType; - - __u8 bInterfaceNumber; - __u8 bAlternateSetting; - __u8 bNumEndpoints; - __u8 bInterfaceClass; - __u8 bInterfaceSubClass; - __u8 bInterfaceProtocol; - __u8 iInterface; -} __attribute__ ((packed)); - #define USB_DT_INTERFACE_SIZE 9 - -/*-------------------------------------------------------------------------*/ - -/* USB_DT_ENDPOINT: Endpoint descriptor */ -struct usb_endpoint_descriptor { - __u8 bLength; - __u8 bDescriptorType; - - __u8 bEndpointAddress; - __u8 bmAttributes; - __le16 wMaxPacketSize; - __u8 bInterval; - - /* NOTE: these two are _only_ in audio endpoints. */ - /* use USB_DT_ENDPOINT*_SIZE in bLength, not sizeof. */ - __u8 bRefresh; - __u8 bSynchAddress; -} __attribute__ ((packed)); - #define USB_DT_ENDPOINT_SIZE 7 #define USB_DT_ENDPOINT_AUDIO_SIZE 9 /* Audio extension */ diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h new file mode 100644 index 0000000000..53cb095507 --- /dev/null +++ b/include/linux/usb/composite.h @@ -0,0 +1,350 @@ +/* + * composite.h -- framework for usb gadgets which are composite devices + * + * Copyright (C) 2006-2008 David Brownell + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __LINUX_USB_COMPOSITE_H +#define __LINUX_USB_COMPOSITE_H + +/* + * This framework is an optional layer on top of the USB Gadget interface, + * making it easier to build (a) Composite devices, supporting multiple + * functions within any single configuration, and (b) Multi-configuration + * devices, also supporting multiple functions but without necessarily + * having more than one function per configuration. + * + * Example: a device with a single configuration supporting both network + * link and mass storage functions is a composite device. Those functions + * might alternatively be packaged in individual configurations, but in + * the composite model the host can use both functions at the same time. + */ + +#include <common.h> +#include <linux/usb/ch9.h> +#include <linux/usb/gadget.h> +#include <usb/lin_gadget_compat.h> + +struct usb_configuration; + +/** + * struct usb_function - describes one function of a configuration + * @name: For diagnostics, identifies the function. + * @strings: tables of strings, keyed by identifiers assigned during bind() + * and by language IDs provided in control requests + * @descriptors: Table of full (or low) speed descriptors, using interface and + * string identifiers assigned during @bind(). If this pointer is null, + * the function will not be available at full speed (or at low speed). + * @hs_descriptors: Table of high speed descriptors, using interface and + * string identifiers assigned during @bind(). If this pointer is null, + * the function will not be available at high speed. + * @config: assigned when @usb_add_function() is called; this is the + * configuration with which this function is associated. + * @bind: Before the gadget can register, all of its functions bind() to the + * available resources including string and interface identifiers used + * in interface or class descriptors; endpoints; I/O buffers; and so on. + * @unbind: Reverses @bind; called as a side effect of unregistering the + * driver which added this function. + * @set_alt: (REQUIRED) Reconfigures altsettings; function drivers may + * initialize usb_ep.driver data at this time (when it is used). + * Note that setting an interface to its current altsetting resets + * interface state, and that all interfaces have a disabled state. + * @get_alt: Returns the active altsetting. If this is not provided, + * then only altsetting zero is supported. + * @disable: (REQUIRED) Indicates the function should be disabled. Reasons + * include host resetting or reconfiguring the gadget, and disconnection. + * @setup: Used for interface-specific control requests. + * @suspend: Notifies functions when the host stops sending USB traffic. + * @resume: Notifies functions when the host restarts USB traffic. + * + * A single USB function uses one or more interfaces, and should in most + * cases support operation at both full and high speeds. Each function is + * associated by @usb_add_function() with a one configuration; that function + * causes @bind() to be called so resources can be allocated as part of + * setting up a gadget driver. Those resources include endpoints, which + * should be allocated using @usb_ep_autoconfig(). + * + * To support dual speed operation, a function driver provides descriptors + * for both high and full speed operation. Except in rare cases that don't + * involve bulk endpoints, each speed needs different endpoint descriptors. + * + * Function drivers choose their own strategies for managing instance data. + * The simplest strategy just declares it "static', which means the function + * can only be activated once. If the function needs to be exposed in more + * than one configuration at a given speed, it needs to support multiple + * usb_function structures (one for each configuration). + * + * A more complex strategy might encapsulate a @usb_function structure inside + * a driver-specific instance structure to allows multiple activations. An + * example of multiple activations might be a CDC ACM function that supports + * two or more distinct instances within the same configuration, providing + * several independent logical data links to a USB host. + */ +struct usb_function { + const char *name; + struct usb_gadget_strings **strings; + struct usb_descriptor_header **descriptors; + struct usb_descriptor_header **hs_descriptors; + + struct usb_configuration *config; + + /* REVISIT: bind() functions can be marked __init, which + * makes trouble for section mismatch analysis. See if + * we can't restructure things to avoid mismatching. + * Related: unbind() may kfree() but bind() won't... + */ + + /* configuration management: bind/unbind */ + int (*bind)(struct usb_configuration *, + struct usb_function *); + void (*unbind)(struct usb_configuration *, + struct usb_function *); + + /* runtime state management */ + int (*set_alt)(struct usb_function *, + unsigned interface, unsigned alt); + int (*get_alt)(struct usb_function *, + unsigned interface); + void (*disable)(struct usb_function *); + int (*setup)(struct usb_function *, + const struct usb_ctrlrequest *); + void (*suspend)(struct usb_function *); + void (*resume)(struct usb_function *); + + /* private: */ + /* internals */ + struct list_head list; + DECLARE_BITMAP(endpoints, 32); +}; + +int usb_add_function(struct usb_configuration *, struct usb_function *); + +int usb_function_deactivate(struct usb_function *); +int usb_function_activate(struct usb_function *); + +int usb_interface_id(struct usb_configuration *, struct usb_function *); + +/** + * ep_choose - select descriptor endpoint at current device speed + * @g: gadget, connected and running at some speed + * @hs: descriptor to use for high speed operation + * @fs: descriptor to use for full or low speed operation + */ +static inline struct usb_endpoint_descriptor * +ep_choose(struct usb_gadget *g, struct usb_endpoint_descriptor *hs, + struct usb_endpoint_descriptor *fs) +{ + if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH) + return hs; + return fs; +} + +#define MAX_CONFIG_INTERFACES 16 /* arbitrary; max 255 */ + +/** + * struct usb_configuration - represents one gadget configuration + * @label: For diagnostics, describes the configuration. + * @strings: Tables of strings, keyed by identifiers assigned during @bind() + * and by language IDs provided in control requests. + * @descriptors: Table of descriptors preceding all function descriptors. + * Examples include OTG and vendor-specific descriptors. + * @bind: Called from @usb_add_config() to allocate resources unique to this + * configuration and to call @usb_add_function() for each function used. + * @unbind: Reverses @bind; called as a side effect of unregistering the + * driver which added this configuration. + * @setup: Used to delegate control requests that aren't handled by standard + * device infrastructure or directed at a specific interface. + * @bConfigurationValue: Copied into configuration descriptor. + * @iConfiguration: Copied into configuration descriptor. + * @bmAttributes: Copied into configuration descriptor. + * @bMaxPower: Copied into configuration descriptor. + * @cdev: assigned by @usb_add_config() before calling @bind(); this is + * the device associated with this configuration. + * + * Configurations are building blocks for gadget drivers structured around + * function drivers. Simple USB gadgets require only one function and one + * configuration, and handle dual-speed hardware by always providing the same + * functionality. Slightly more complex gadgets may have more than one + * single-function configuration at a given speed; or have configurations + * that only work at one speed. + * + * Composite devices are, by definition, ones with configurations which + * include more than one function. + * + * The lifecycle of a usb_configuration includes allocation, initialization + * of the fields described above, and calling @usb_add_config() to set up + * internal data and bind it to a specific device. The configuration's + * @bind() method is then used to initialize all the functions and then + * call @usb_add_function() for them. + * + * Those functions would normally be independant of each other, but that's + * not mandatory. CDC WMC devices are an example where functions often + * depend on other functions, with some functions subsidiary to others. + * Such interdependency may be managed in any way, so long as all of the + * descriptors complete by the time the composite driver returns from + * its bind() routine. + */ +struct usb_configuration { + const char *label; + struct usb_gadget_strings **strings; + const struct usb_descriptor_header **descriptors; + + /* REVISIT: bind() functions can be marked __init, which + * makes trouble for section mismatch analysis. See if + * we can't restructure things to avoid mismatching... + */ + + /* configuration management: bind/unbind */ + int (*bind)(struct usb_configuration *); + void (*unbind)(struct usb_configuration *); + int (*setup)(struct usb_configuration *, + const struct usb_ctrlrequest *); + + /* fields in the config descriptor */ + u8 bConfigurationValue; + u8 iConfiguration; + u8 bmAttributes; + u8 bMaxPower; + + struct usb_composite_dev *cdev; + + /* private: */ + /* internals */ + struct list_head list; + struct list_head functions; + u8 next_interface_id; + unsigned highspeed:1; + unsigned fullspeed:1; + struct usb_function *interface[MAX_CONFIG_INTERFACES]; +}; + +int usb_add_config(struct usb_composite_dev *, + struct usb_configuration *); + +/** + * struct usb_composite_driver - groups configurations into a gadget + * @name: For diagnostics, identifies the driver. + * @dev: Template descriptor for the device, including default device + * identifiers. + * @strings: tables of strings, keyed by identifiers assigned during bind() + * and language IDs provided in control requests + * @bind: (REQUIRED) Used to allocate resources that are shared across the + * whole device, such as string IDs, and add its configurations using + * @usb_add_config(). This may fail by returning a negative errno + * value; it should return zero on successful initialization. + * @unbind: Reverses @bind(); called as a side effect of unregistering + * this driver. + * @disconnect: optional driver disconnect method + * @suspend: Notifies when the host stops sending USB traffic, + * after function notifications + * @resume: Notifies configuration when the host restarts USB traffic, + * before function notifications + * + * Devices default to reporting self powered operation. Devices which rely + * on bus powered operation should report this in their @bind() method. + * + * Before returning from @bind, various fields in the template descriptor + * may be overridden. These include the idVendor/idProduct/bcdDevice values + * normally to bind the appropriate host side driver, and the three strings + * (iManufacturer, iProduct, iSerialNumber) normally used to provide user + * meaningful device identifiers. (The strings will not be defined unless + * they are defined in @dev and @strings.) The correct ep0 maxpacket size + * is also reported, as defined by the underlying controller driver. + */ +struct usb_composite_driver { + const char *name; + const struct usb_device_descriptor *dev; + struct usb_gadget_strings **strings; + + /* REVISIT: bind() functions can be marked __init, which + * makes trouble for section mismatch analysis. See if + * we can't restructure things to avoid mismatching... + */ + + int (*bind)(struct usb_composite_dev *); + int (*unbind)(struct usb_composite_dev *); + + void (*disconnect)(struct usb_composite_dev *); + + /* global suspend hooks */ + void (*suspend)(struct usb_composite_dev *); + void (*resume)(struct usb_composite_dev *); +}; + +extern int usb_composite_register(struct usb_composite_driver *); +extern void usb_composite_unregister(struct usb_composite_driver *); + + +/** + * struct usb_composite_device - represents one composite usb gadget + * @gadget: read-only, abstracts the gadget's usb peripheral controller + * @req: used for control responses; buffer is pre-allocated + * @bufsiz: size of buffer pre-allocated in @req + * @config: the currently active configuration + * + * One of these devices is allocated and initialized before the + * associated device driver's bind() is called. + * + * OPEN ISSUE: it appears that some WUSB devices will need to be + * built by combining a normal (wired) gadget with a wireless one. + * This revision of the gadget framework should probably try to make + * sure doing that won't hurt too much. + * + * One notion for how to handle Wireless USB devices involves: + * (a) a second gadget here, discovery mechanism TBD, but likely + * needing separate "register/unregister WUSB gadget" calls; + * (b) updates to usb_gadget to include flags "is it wireless", + * "is it wired", plus (presumably in a wrapper structure) + * bandgroup and PHY info; + * (c) presumably a wireless_ep wrapping a usb_ep, and reporting + * wireless-specific parameters like maxburst and maxsequence; + * (d) configurations that are specific to wireless links; + * (e) function drivers that understand wireless configs and will + * support wireless for (additional) function instances; + * (f) a function to support association setup (like CBAF), not + * necessarily requiring a wireless adapter; + * (g) composite device setup that can create one or more wireless + * configs, including appropriate association setup support; + * (h) more, TBD. + */ +struct usb_composite_dev { + struct usb_gadget *gadget; + struct usb_request *req; + unsigned bufsiz; + + struct usb_configuration *config; + + /* private: */ + /* internals */ + unsigned int suspended:1; + struct usb_device_descriptor desc; + struct list_head configs; + struct usb_composite_driver *driver; + u8 next_string_id; + + /* the gadget driver won't enable the data pullup + * while the deactivation count is nonzero. + */ + unsigned deactivations; +}; + +extern int usb_string_id(struct usb_composite_dev *c); +extern int usb_string_ids_tab(struct usb_composite_dev *c, + struct usb_string *str); +extern int usb_string_ids_n(struct usb_composite_dev *c, unsigned n); + +#endif /* __LINUX_USB_COMPOSITE_H */ diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h index 275cb5fe15..eba865ea09 100644 --- a/include/linux/usb/gadget.h +++ b/include/linux/usb/gadget.h @@ -411,6 +411,7 @@ struct usb_gadget_ops { struct device { void *driver_data; /* data private to the driver */ + void *device_data; /* data private to the device */ }; /** @@ -481,6 +482,11 @@ static inline void *get_gadget_data(struct usb_gadget *gadget) return gadget->dev.driver_data; } +static inline struct usb_gadget *dev_to_usb_gadget(struct device *dev) +{ + return container_of(dev, struct usb_gadget, dev); +} + /* iterates the non-control endpoints; 'tmp' is a struct usb_ep pointer */ #define gadget_for_each_ep(tmp, gadget) \ list_for_each_entry(tmp, &(gadget)->ep_list, ep_list) diff --git a/include/max8997_pmic.h b/include/max8997_pmic.h new file mode 100644 index 0000000000..17ae24ea6a --- /dev/null +++ b/include/max8997_pmic.h @@ -0,0 +1,190 @@ +/* + * Copyright (C) 2011 Samsung Electronics + * Lukasz Majewski <l.majewski@samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MAX8997_PMIC_H_ +#define __MAX8997_PMIC_H_ + +/* MAX 8997 registers */ +enum { + MAX8997_REG_PMIC_ID0 = 0x00, + MAX8997_REG_PMIC_ID1 = 0x01, + MAX8997_REG_INTSRC = 0x02, + MAX8997_REG_INT1 = 0x03, + MAX8997_REG_INT2 = 0x04, + MAX8997_REG_INT3 = 0x05, + MAX8997_REG_INT4 = 0x06, + + MAX8997_REG_INT1MSK = 0x08, + MAX8997_REG_INT2MSK = 0x09, + MAX8997_REG_INT3MSK = 0x0a, + MAX8997_REG_INT4MSK = 0x0b, + + MAX8997_REG_STATUS1 = 0x0d, + MAX8997_REG_STATUS2 = 0x0e, + MAX8997_REG_STATUS3 = 0x0f, + MAX8997_REG_STATUS4 = 0x10, + + MAX8997_REG_MAINCON1 = 0x13, + MAX8997_REG_MAINCON2 = 0x14, + MAX8997_REG_BUCKRAMP = 0x15, + + MAX8997_REG_BUCK1CTRL = 0x18, + MAX8997_REG_BUCK1DVS1 = 0x19, + MAX8997_REG_BUCK1DVS2 = 0x1a, + MAX8997_REG_BUCK1DVS3 = 0x1b, + MAX8997_REG_BUCK1DVS4 = 0x1c, + MAX8997_REG_BUCK1DVS5 = 0x1d, + MAX8997_REG_BUCK1DVS6 = 0x1e, + MAX8997_REG_BUCK1DVS7 = 0x1f, + MAX8997_REG_BUCK1DVS8 = 0x20, + MAX8997_REG_BUCK2CTRL = 0x21, + MAX8997_REG_BUCK2DVS1 = 0x22, + MAX8997_REG_BUCK2DVS2 = 0x23, + MAX8997_REG_BUCK2DVS3 = 0x24, + MAX8997_REG_BUCK2DVS4 = 0x25, + MAX8997_REG_BUCK2DVS5 = 0x26, + MAX8997_REG_BUCK2DVS6 = 0x27, + MAX8997_REG_BUCK2DVS7 = 0x28, + MAX8997_REG_BUCK2DVS8 = 0x29, + MAX8997_REG_BUCK3CTRL = 0x2a, + MAX8997_REG_BUCK3DVS = 0x2b, + MAX8997_REG_BUCK4CTRL = 0x2c, + MAX8997_REG_BUCK4DVS = 0x2d, + MAX8997_REG_BUCK5CTRL = 0x2e, + MAX8997_REG_BUCK5DVS1 = 0x2f, + MAX8997_REG_BUCK5DVS2 = 0x30, + MAX8997_REG_BUCK5DVS3 = 0x31, + MAX8997_REG_BUCK5DVS4 = 0x32, + MAX8997_REG_BUCK5DVS5 = 0x33, + MAX8997_REG_BUCK5DVS6 = 0x34, + MAX8997_REG_BUCK5DVS7 = 0x35, + MAX8997_REG_BUCK5DVS8 = 0x36, + MAX8997_REG_BUCK6CTRL = 0x37, + MAX8997_REG_BUCK6BPSKIPCTRL = 0x38, + MAX8997_REG_BUCK7CTRL = 0x39, + MAX8997_REG_BUCK7DVS = 0x3a, + MAX8997_REG_LDO1CTRL = 0x3b, + MAX8997_REG_LDO2CTRL = 0x3c, + MAX8997_REG_LDO3CTRL = 0x3d, + MAX8997_REG_LDO4CTRL = 0x3e, + MAX8997_REG_LDO5CTRL = 0x3f, + MAX8997_REG_LDO6CTRL = 0x40, + MAX8997_REG_LDO7CTRL = 0x41, + MAX8997_REG_LDO8CTRL = 0x42, + MAX8997_REG_LDO9CTRL = 0x43, + MAX8997_REG_LDO10CTRL = 0x44, + MAX8997_REG_LDO11CTRL = 0x45, + MAX8997_REG_LDO12CTRL = 0x46, + MAX8997_REG_LDO13CTRL = 0x47, + MAX8997_REG_LDO14CTRL = 0x48, + MAX8997_REG_LDO15CTRL = 0x49, + MAX8997_REG_LDO16CTRL = 0x4a, + MAX8997_REG_LDO17CTRL = 0x4b, + MAX8997_REG_LDO18CTRL = 0x4c, + MAX8997_REG_LDO21CTRL = 0x4d, + + MAX8997_REG_MBCCTRL1 = 0x50, + MAX8997_REG_MBCCTRL2 = 0x51, + MAX8997_REG_MBCCTRL3 = 0x52, + MAX8997_REG_MBCCTRL4 = 0x53, + MAX8997_REG_MBCCTRL5 = 0x54, + MAX8997_REG_MBCCTRL6 = 0x55, + MAX8997_REG_OTPCGHCVS = 0x56, + + MAX8997_REG_SAFEOUTCTRL = 0x5a, + + MAX8997_REG_LBCNFG1 = 0x5e, + MAX8997_REG_LBCNFG2 = 0x5f, + MAX8997_REG_BBCCTRL = 0x60, + + MAX8997_REG_FLASH1_CUR = 0x63, /* 0x63 ~ 0x6e for FLASH */ + MAX8997_REG_FLASH2_CUR = 0x64, + MAX8997_REG_MOVIE_CUR = 0x65, + MAX8997_REG_GSMB_CUR = 0x66, + MAX8997_REG_BOOST_CNTL = 0x67, + MAX8997_REG_LEN_CNTL = 0x68, + MAX8997_REG_FLASH_CNTL = 0x69, + MAX8997_REG_WDT_CNTL = 0x6a, + MAX8997_REG_MAXFLASH1 = 0x6b, + MAX8997_REG_MAXFLASH2 = 0x6c, + MAX8997_REG_FLASHSTATUS = 0x6d, + MAX8997_REG_FLASHSTATUSMASK = 0x6e, + + MAX8997_REG_GPIOCNTL1 = 0x70, + MAX8997_REG_GPIOCNTL2 = 0x71, + MAX8997_REG_GPIOCNTL3 = 0x72, + MAX8997_REG_GPIOCNTL4 = 0x73, + MAX8997_REG_GPIOCNTL5 = 0x74, + MAX8997_REG_GPIOCNTL6 = 0x75, + MAX8997_REG_GPIOCNTL7 = 0x76, + MAX8997_REG_GPIOCNTL8 = 0x77, + MAX8997_REG_GPIOCNTL9 = 0x78, + MAX8997_REG_GPIOCNTL10 = 0x79, + MAX8997_REG_GPIOCNTL11 = 0x7a, + MAX8997_REG_GPIOCNTL12 = 0x7b, + + MAX8997_REG_LDO1CONFIG = 0x80, + MAX8997_REG_LDO2CONFIG = 0x81, + MAX8997_REG_LDO3CONFIG = 0x82, + MAX8997_REG_LDO4CONFIG = 0x83, + MAX8997_REG_LDO5CONFIG = 0x84, + MAX8997_REG_LDO6CONFIG = 0x85, + MAX8997_REG_LDO7CONFIG = 0x86, + MAX8997_REG_LDO8CONFIG = 0x87, + MAX8997_REG_LDO9CONFIG = 0x88, + MAX8997_REG_LDO10CONFIG = 0x89, + MAX8997_REG_LDO11CONFIG = 0x8a, + MAX8997_REG_LDO12CONFIG = 0x8b, + MAX8997_REG_LDO13CONFIG = 0x8c, + MAX8997_REG_LDO14CONFIG = 0x8d, + MAX8997_REG_LDO15CONFIG = 0x8e, + MAX8997_REG_LDO16CONFIG = 0x8f, + MAX8997_REG_LDO17CONFIG = 0x90, + MAX8997_REG_LDO18CONFIG = 0x91, + MAX8997_REG_LDO21CONFIG = 0x92, + + MAX8997_REG_DVSOKTIMER1 = 0x97, + MAX8997_REG_DVSOKTIMER2 = 0x98, + MAX8997_REG_DVSOKTIMER4 = 0x99, + MAX8997_REG_DVSOKTIMER5 = 0x9a, + + PMIC_NUM_OF_REGS = 0x9b, +}; + +#define ENSAFEOUT1 (1 << 6) +#define ENSAFEOUT2 (1 << 7) + +#define MAX8997_I2C_ADDR (0xCC >> 1) +#define MAX8997_RTC_ADDR (0x0C >> 1) +#define MAX8997_MUIC_ADDR (0x4A >> 1) +#define MAX8997_FG_ADDR (0x6C >> 1) + +enum { + LDO_OFF = 0, + LDO_ON = 1, + + DIS_LDO = (0x00 << 6), + EN_LDO = (0x3 << 6), +}; + +#endif /* __MAX8997_PMIC_H_ */ diff --git a/include/max8998_pmic.h b/include/max8998_pmic.h index 10c892a51d..ca21f882c2 100644 --- a/include/max8998_pmic.h +++ b/include/max8998_pmic.h @@ -75,6 +75,7 @@ enum { }; #define MAX8998_LDO3 (1 << 2) +#define MAX8998_LDO4 (1 << 1) #define MAX8998_LDO8 (1 << 5) #define MAX8998_SAFEOUT1 (1 << 4) diff --git a/include/mmc.h b/include/mmc.h index f52df70ad4..70a54034a9 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -4,48 +4,43 @@ * * Based (loosely) on the Linux code * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef _MMC_H_ #define _MMC_H_ #include <linux/list.h> +#include <linux/compiler.h> #define SD_VERSION_SD 0x20000 -#define SD_VERSION_2 (SD_VERSION_SD | 0x20) -#define SD_VERSION_1_0 (SD_VERSION_SD | 0x10) -#define SD_VERSION_1_10 (SD_VERSION_SD | 0x1a) +#define SD_VERSION_3 (SD_VERSION_SD | 0x300) +#define SD_VERSION_2 (SD_VERSION_SD | 0x200) +#define SD_VERSION_1_0 (SD_VERSION_SD | 0x100) +#define SD_VERSION_1_10 (SD_VERSION_SD | 0x10a) #define MMC_VERSION_MMC 0x10000 #define MMC_VERSION_UNKNOWN (MMC_VERSION_MMC) -#define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x12) -#define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x14) -#define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x22) -#define MMC_VERSION_3 (MMC_VERSION_MMC | 0x30) -#define MMC_VERSION_4 (MMC_VERSION_MMC | 0x40) - -#define MMC_MODE_HS 0x001 -#define MMC_MODE_HS_52MHz 0x010 -#define MMC_MODE_4BIT 0x100 -#define MMC_MODE_8BIT 0x200 -#define MMC_MODE_SPI 0x400 -#define MMC_MODE_HC 0x800 +#define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x102) +#define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x104) +#define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x202) +#define MMC_VERSION_3 (MMC_VERSION_MMC | 0x300) +#define MMC_VERSION_4 (MMC_VERSION_MMC | 0x400) +#define MMC_VERSION_4_1 (MMC_VERSION_MMC | 0x401) +#define MMC_VERSION_4_2 (MMC_VERSION_MMC | 0x402) +#define MMC_VERSION_4_3 (MMC_VERSION_MMC | 0x403) +#define MMC_VERSION_4_41 (MMC_VERSION_MMC | 0x429) +#define MMC_VERSION_4_5 (MMC_VERSION_MMC | 0x405) + +#define MMC_MODE_HS (1 << 0) +#define MMC_MODE_HS_52MHz (1 << 1) +#define MMC_MODE_4BIT (1 << 2) +#define MMC_MODE_8BIT (1 << 3) +#define MMC_MODE_SPI (1 << 4) +#define MMC_MODE_HC (1 << 5) +#define MMC_MODE_DDR_52MHz (1 << 6) + +#define MMC_MODE_MASK_WIDTH_BITS (MMC_MODE_4BIT | MMC_MODE_8BIT) +#define MMC_MODE_WIDTH_BITS_SHIFT 8 #define SD_DATA_4BIT 0x00040000 @@ -58,6 +53,8 @@ #define UNUSABLE_ERR -17 /* Unusable Card */ #define COMM_ERR -18 /* Communications Error */ #define TIMEOUT -19 +#define IN_PROGRESS -20 /* operation is in progress */ +#define SWITCH_ERR -21 /* Card reports failure to switch mode */ #define MMC_CMD_GO_IDLE_STATE 0 #define MMC_CMD_SEND_OP_COND 1 @@ -74,6 +71,7 @@ #define MMC_CMD_SET_BLOCKLEN 16 #define MMC_CMD_READ_SINGLE_BLOCK 17 #define MMC_CMD_READ_MULTIPLE_BLOCK 18 +#define MMC_CMD_SET_BLOCK_COUNT 23 #define MMC_CMD_WRITE_SINGLE_BLOCK 24 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25 #define MMC_CMD_ERASE_GROUP_START 35 @@ -82,6 +80,11 @@ #define MMC_CMD_APP_CMD 55 #define MMC_CMD_SPI_READ_OCR 58 #define MMC_CMD_SPI_CRC_ON_OFF 59 +#define MMC_CMD_RES_MAN 62 + +#define MMC_CMD62_ARG1 0xefac62ec +#define MMC_CMD62_ARG2 0xcbaea7 + #define SD_CMD_SEND_RELATIVE_ADDR 3 #define SD_CMD_SWITCH_FUNC 6 @@ -108,6 +111,7 @@ #define SECURE_ERASE 0x80000000 #define MMC_STATUS_MASK (~0x0206BF7F) +#define MMC_STATUS_SWITCH_ERROR (1 << 7) #define MMC_STATUS_RDY_FOR_DATA (1 << 8) #define MMC_STATUS_CURR_STATE (0xf << 9) #define MMC_STATUS_ERROR (1 << 19) @@ -147,15 +151,21 @@ /* * EXT_CSD fields */ +#define EXT_CSD_GP_SIZE_MULT 143 /* R/W */ +#define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */ #define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */ +#define EXT_CSD_RPMB_MULT 168 /* RO */ #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ +#define EXT_CSD_BOOT_BUS_WIDTH 177 #define EXT_CSD_PART_CONF 179 /* R/W */ #define EXT_CSD_BUS_WIDTH 183 /* R/W */ #define EXT_CSD_HS_TIMING 185 /* R/W */ #define EXT_CSD_REV 192 /* RO */ #define EXT_CSD_CARD_TYPE 196 /* RO */ #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ +#define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */ #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ +#define EXT_CSD_BOOT_MULT 226 /* RO */ /* * EXT_CSD field definitions @@ -167,10 +177,26 @@ #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ +#define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2) +#define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3) +#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \ + | EXT_CSD_CARD_TYPE_DDR_1_2V) #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ +#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */ +#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ + +#define EXT_CSD_BOOT_ACK_ENABLE (1 << 6) +#define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3) +#define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0) +#define EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0) + +#define EXT_CSD_BOOT_ACK(x) (x << 6) +#define EXT_CSD_BOOT_PART_NUM(x) (x << 3) +#define EXT_CSD_PARTITION_ACCESS(x) (x << 0) + #define R1_ILLEGAL_COMMAND (1 << 22) #define R1_APP_CMD (1 << 5) @@ -195,6 +221,26 @@ #define MMCPART_NOAVAILABLE (0xff) #define PART_ACCESS_MASK (0x7) #define PART_SUPPORT (0x1) +#define PART_ENH_ATTRIB (0x1f) + +/* + * MMC Flash Manufacturer ID Codes + */ +#define MMC_MFR_TOSHIBA 0x11 +#define MMC_MFR_SAMSUNG 0x15 +#define MMC_MFR_SANDISK 0x45 +#define MMC_MFR_HYNIX 0x90 +#define MMC_MFR_MICRON 0x13 +#define MMC_MFR_MICRON1 0xfe +#define MMC_MFR_GIGADEVICE 0xC8 + +/* Maximum block size for MMC */ +#define MMC_MAX_BLOCK_LEN 512 + +/* The number of MMC physical partitions. These consist of: + * boot partitions (2), general purpose partitions (4) in MMC v4.4. + */ +#define MMC_NUM_BOOT_PARTITION 2 struct mmc_cid { unsigned long psn; @@ -205,54 +251,14 @@ struct mmc_cid { char pnm[7]; }; -/* - * WARNING! - * - * This structure is used by atmel_mci.c only. - * It works for the AVR32 architecture but NOT - * for ARM/AT91 architectures. - * Its use is highly depreciated. - * After the atmel_mci.c driver for AVR32 has - * been replaced this structure will be removed. - */ -struct mmc_csd -{ - u8 csd_structure:2, - spec_vers:4, - rsvd1:2; - u8 taac; - u8 nsac; - u8 tran_speed; - u16 ccc:12, - read_bl_len:4; - u64 read_bl_partial:1, - write_blk_misalign:1, - read_blk_misalign:1, - dsr_imp:1, - rsvd2:2, - c_size:12, - vdd_r_curr_min:3, - vdd_r_curr_max:3, - vdd_w_curr_min:3, - vdd_w_curr_max:3, - c_size_mult:3, - sector_size:5, - erase_grp_size:5, - wp_grp_size:5, - wp_grp_enable:1, - default_ecc:2, - r2w_factor:3, - write_bl_len:4, - write_bl_partial:1, - rsvd3:5; - u8 file_format_grp:1, - copy:1, - perm_write_protect:1, - tmp_write_protect:1, - file_format:2, - ecc:2; - u8 crc:7; - u8 one:1; +/** + * struct mmc_manufacturers - MMC Flash Manufacturer ID Structure + * @name: Manufacturer name + * @id: manufacturer ID code of device. +*/ +struct mmc_manufacturers { + int id; + char *name; }; struct mmc_cmd { @@ -260,7 +266,6 @@ struct mmc_cmd { uint resp_type; uint cmdarg; uint response[4]; - uint flags; }; struct mmc_data { @@ -299,19 +304,30 @@ struct mmc { uint write_bl_len; uint erase_grp_size; u64 capacity; + u64 capacity_user; + u64 capacity_boot; + u64 capacity_rpmb; + u64 capacity_gp[4]; block_dev_desc_t block_dev; int (*send_cmd)(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data); void (*set_ios)(struct mmc *mmc); int (*init)(struct mmc *mmc); int (*getcd)(struct mmc *mmc); + int (*getwp)(struct mmc *mmc); uint b_max; + char op_cond_pending; /* 1 if we are waiting on an op_cond command */ + char init_in_progress; /* 1 if we have done mmc_start_init() */ + char preinit; /* start init as early as possible */ + uint op_cond_response; /* the response byte from the last op_cond */ }; int mmc_register(struct mmc *mmc); int mmc_initialize(bd_t *bis); int mmc_init(struct mmc *mmc); int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size); +int mmc_write(struct mmc *mmc, u64 to, uchar *buf, int size); +int mmc_erase(unsigned int from, unsigned int size); void mmc_set_clock(struct mmc *mmc, uint clock); struct mmc *find_mmc_device(int dev_num); int mmc_set_dev(int dev_num); @@ -320,9 +336,45 @@ int get_mmc_num(void); int board_mmc_getcd(struct mmc *mmc); int mmc_switch_part(int dev_num, unsigned int part_num); int mmc_getcd(struct mmc *mmc); +int mmc_getwp(struct mmc *mmc); +void spl_mmc_load(void) __noreturn; +/* Function to change the size of boot partition and rpmb partitions */ +int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, + unsigned long rpmbsize); +/* Function to send commands to open/close the specified boot partition */ +int mmc_boot_part_access(struct mmc *mmc, u8 ack, u8 part_num, u8 access); + +/** + * Start device initialization and return immediately; it does not block on + * polling OCR (operation condition register) status. Then you should call + * mmc_init, which would block on polling OCR status and complete the device + * initializatin. + * + * @param mmc Pointer to a MMC device struct + * @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error. + */ +int mmc_start_init(struct mmc *mmc); + +/** + * Set preinit flag of mmc device. + * + * This will cause the device to be pre-inited during mmc_initialize(), + * which may save boot time if the device is not accessed until later. + * Some eMMC devices take 200-300ms to init, but unfortunately they + * must be sent a series of commands to even get them to start preparing + * for operation. + * + * @param mmc Pointer to a MMC device struct + * @param preinit preinit flag value + */ +void mmc_set_preinit(struct mmc *mmc, int preinit); #ifdef CONFIG_GENERIC_MMC +#ifdef CONFIG_MMC_SPI #define mmc_host_is_spi(mmc) ((mmc)->host_caps & MMC_MODE_SPI) +#else +#define mmc_host_is_spi(mmc) 0 +#endif struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode); #else int mmc_legacy_init(int verbose); diff --git a/include/mmc/mmcpart.h b/include/mmc/mmcpart.h new file mode 100644 index 0000000000..285eb7cdf8 --- /dev/null +++ b/include/mmc/mmcpart.h @@ -0,0 +1,36 @@ +/* Copyright (c) 2011, Code Aurora Forum. All rights reserved. + + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * * Neither the name of Code Aurora Forum, Inc. nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN + * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __MMC_PARTITION_PARSER_H__ +#define __MMC_PARTITION_PARSER_H__ +#include <mmc.h> + +int mmc_parts_init(void); +int mmc_parts_format(void); +#endif + diff --git a/include/mmc/sparse.h b/include/mmc/sparse.h new file mode 100644 index 0000000000..ecd0edee2e --- /dev/null +++ b/include/mmc/sparse.h @@ -0,0 +1,48 @@ +/* + * Copyright (C) 2010 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +typedef struct sparse_header { + uint32_t magic; /* 0xed26ff3a */ + uint16_t major_version; /* (0x1) - reject images with higher major versions */ + uint16_t minor_version; /* (0x0) - allow images with higer minor versions */ + uint16_t file_hdr_sz; /* 28 bytes for first revision of the file format */ + uint16_t chunk_hdr_sz; /* 12 bytes for first revision of the file format */ + uint32_t blk_sz; /* block size in bytes, must be a multiple of 4 (4096) */ + uint32_t total_blks; /* total blocks in the non-sparse output image */ + uint32_t total_chunks; /* total chunks in the sparse input image */ + uint32_t image_checksum; /* CRC32 checksum of the original data, counting "don't care" */ + /* as 0. Standard 802.3 polynomial, use a Public Domain */ + /* table implementation */ +} sparse_header_t; + +#define SPARSE_HEADER_MAGIC 0xed26ff3a + +#define CHUNK_TYPE_RAW 0xCAC1 +#define CHUNK_TYPE_FILL 0xCAC2 +#define CHUNK_TYPE_DONT_CARE 0xCAC3 +#define CHUNK_TYPE_CRC 0xCAC4 + +typedef struct chunk_header { + uint16_t chunk_type; /* 0xCAC1 -> raw; 0xCAC2 -> fill; 0xCAC3 -> don't care */ + uint16_t reserved1; + uint32_t chunk_sz; /* in blocks in output image */ + uint32_t total_sz; /* in bytes of chunk input file including chunk header and data */ +} chunk_header_t; + +/* Following a Raw or Fill chunk is data. For a Raw chunk, it's the data in chunk_sz * blk_sz. + * For a Fill chunk, it's 4 bytes of the fill data. + */ + diff --git a/include/mtd/nand/rda_nand.h b/include/mtd/nand/rda_nand.h new file mode 100644 index 0000000000..58edd54687 --- /dev/null +++ b/include/mtd/nand/rda_nand.h @@ -0,0 +1,121 @@ +#ifndef __RDA_NAND_H__ +#define __RDA_NAND_H__ + +#include <asm/arch-rda/rda_sys.h> + +typedef enum +{ + NAND_MSG_LEN_1K = 0, + NAND_MSG_LEN_2K = 1, + NAND_MSG_LEN_4K = 2, + NAND_MSG_LEN_1152 = 3 +} NAND_ECC_MSG_LEN_TYPE; + +typedef enum +{ + NAND_OOB_LEN_32 = 0, + NAND_OOB_LEN_16 = 1 +} NAND_OOB_LEN_TYPE; + +typedef enum +{ + NAND_BUS_WIDTH_8BIT = 0, + NAND_BUS_WIDTH_16BIT = 1 +} NAND_BUS_WIDTH_TYPE; + +typedef union +{ + struct{ + unsigned short pagesize:2; + unsigned short eccmode:4; + unsigned short eccmsglen:2; + unsigned short ooblen:1; + }; + unsigned short reg; +}EFUSE_NAND_INFO_T; + +typedef enum +{ + NAND_PARAMETER_BY_GPIO = 0, + NAND_PARAMETER_BY_NAND = 1 +} NAND_PARAMETER_MODE_TYPE; + +/*************************************************************/ + +#define RDA_EFUSE_INDEX_NAND_INFO (4) + +/* + Fuse layout:low 9 bit + O.MM.VVVV.NN + NN: NAND_PAGE_TYPE + VVVV:NAND_ECC_TYPE + MM:NAND_ECC_MSG_LEN + O:OOB LEN +*/ +/* define bit for rda nand info config */ +#define RDA_NAND_PAGESIZE_INDEX(n) (((n)&0x3)<<0) +#define RDA_NAND_GET_PAGESIZE(r) (((r)>>0)&0x3) +#define RDA_NAND_ECCMODE(n) (((n)&0xF)<<2) +#define RDA_NAND_GET_ECCMODE(r) (((r)>>2)&0xF) +#define RDA_NAND_ECCMSGLEN(n) (((n)&0x3)<<6) +#define RDA_NAND_GET_ECCMSGLEN(r) (((r)>>6)&0x3) +#define RDA_NAND_OOBLEN(n) (((n)&0x1)<<8) +#define RDA_NAND_GET_OOBLEN(r) (((r)>>8)&0x1) +/**************************************************************/ + +struct rda_nand_info { + int type; + int hard_ecc_hec; + int ecc_mode; + int bus_width_16; + int page_num_per_block; + + int page_size; + int erase_size; + int page_shift; + int oob_size; + + int vir_page_size; + int vir_erase_size; + int vir_page_shift; + int vir_oob_size; + + int cmd; + int col_addr; + int page_addr; + int read_ptr; + u32 byte_buf[4]; // for read_id, status, etc + int index; + int write_ptr; + void __iomem *nand_data_phys; + u8 dma_ch; + unsigned long master_clk; + unsigned long clk; + int cmd_flag; + + u8 spl_adjust_ratio; + /*specially for nand dump command to read first 16K of nand v3.*/ + u8 dump_debug_flag; + /*8810:8K/16k setting*/ + /*nand_use_type = 1: 8K used as 2 4k or 3K*/ + /*nand_use_type = 3: 16K used as 4 4k or 3K*/ + /*nand_use_type = 0: 2K or 4k*/ + u8 nand_use_type; + int logic_page_size; + int logic_oob_size; + int logic_operate_time; + /* rda8850e use*/ + int page_total_num; + unsigned short flash_oob_off; + unsigned short message_len; + u32 bch_data; + u32 bch_oob; + u16 ecc_mode_bak; + u16 max_eccmode_support; + u8 type_bak; + NAND_PARAMETER_MODE_TYPE parameter_mode_select; + u32 spl_logic_pageaddr; + u32 boot_logic_end_pageaddr; +}; +#endif + diff --git a/include/nand.h b/include/nand.h index 8b3a1a77a3..3b9d510ad1 100644 --- a/include/nand.h +++ b/include/nand.h @@ -37,7 +37,7 @@ extern void nand_init(void); -#include <linux/mtd/compat.h> +#include <linux/compat.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> @@ -53,22 +53,24 @@ typedef struct mtd_info nand_info_t; extern int nand_curr_device; extern nand_info_t nand_info[]; -static inline int nand_read(nand_info_t *info, loff_t ofs, size_t *len, u_char *buf) +static inline int nand_read(nand_info_t * info, loff_t ofs, size_t * len, + u_char * buf) { - return info->read(info, ofs, *len, (size_t *)len, buf); + return info->read(info, ofs, *len, (size_t *) len, buf); } -static inline int nand_write(nand_info_t *info, loff_t ofs, size_t *len, u_char *buf) +static inline int nand_write(nand_info_t * info, loff_t ofs, size_t * len, + u_char * buf) { - return info->write(info, ofs, *len, (size_t *)len, buf); + return info->write(info, ofs, *len, (size_t *) len, buf); } -static inline int nand_block_isbad(nand_info_t *info, loff_t ofs) +static inline int nand_block_isbad(nand_info_t * info, loff_t ofs) { return info->block_isbad(info, ofs); } -static inline int nand_erase(nand_info_t *info, loff_t off, size_t size) +static inline int nand_erase(nand_info_t * info, loff_t off, size_t size) { struct erase_info instr; @@ -80,7 +82,6 @@ static inline int nand_erase(nand_info_t *info, loff_t off, size_t size) return info->erase(info, &instr); } - /***************************************************************************** * declarations from nand_util.c ****************************************************************************/ @@ -104,7 +105,7 @@ typedef struct nand_write_options nand_write_options_t; typedef struct mtd_oob_ops mtd_oob_ops_t; struct nand_read_options { - u_char *buffer; /* memory block in which read image is written*/ + u_char *buffer; /* memory block in which read image is written */ ulong length; /* number of bytes to read */ ulong offset; /* start address in NAND */ int quiet; /* don't display progress messages */ @@ -128,42 +129,55 @@ struct nand_erase_options { typedef struct nand_erase_options nand_erase_options_t; -int nand_read_skip_bad(nand_info_t *nand, loff_t offset, size_t *length, - u_char *buffer); - -#define WITH_YAFFS_OOB (1 << 0) /* whether write with yaffs format. This flag - * is a 'mode' meaning it cannot be mixed with - * other flags */ -#define WITH_DROP_FFS (1 << 1) /* drop trailing all-0xff pages */ - -int nand_write_skip_bad(nand_info_t *nand, loff_t offset, size_t *length, - u_char *buffer, int flags); -int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts); +int nand_read_skip_bad(nand_info_t * nand, loff_t offset, size_t * length, + u_char * buffer); + +#define WITH_YAFFS_OOB (1 << 0) /* whether write with yaffs format. This flag + * is a 'mode' meaning it cannot be mixed with + * other flags */ +#define WITH_DROP_FFS (1 << 1) /* drop trailing all-0xff pages */ + +int nand_erase_opts(nand_info_t * meminfo, const nand_erase_options_t * opts); +int nand_write_skip_bad(nand_info_t * nand, loff_t offset, size_t * length, + u_char * buffer, int flags); +int nand_write_skip_bad_new(nand_info_t * nand, loff_t offset, size_t * length, + loff_t max_limit, u_char * buffer, + int flags, u32 * skip_blocks); +int nand_write_unsparse(nand_info_t * nand, loff_t offset, size_t * length, + loff_t max_limit, u_char * buffer, + int flags, u32 * skip_blocks); +int nand_read_skip_bad_new(nand_info_t * nand, loff_t offset, size_t * length, + u_char * buffer, u32 * skip_blocks); #define NAND_LOCK_STATUS_TIGHT 0x01 #define NAND_LOCK_STATUS_LOCK 0x02 #define NAND_LOCK_STATUS_UNLOCK 0x04 -int nand_lock( nand_info_t *meminfo, int tight ); -int nand_unlock( nand_info_t *meminfo, ulong start, ulong length ); -int nand_get_lock_status(nand_info_t *meminfo, loff_t offset); +int nand_lock(nand_info_t * meminfo, int tight); +int nand_unlock(nand_info_t * meminfo, ulong start, ulong length); +int nand_get_lock_status(nand_info_t * meminfo, loff_t offset); -int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst); +int nand_spl_load_image(uint64_t offs, uint64_t size, void *dst); void nand_deselect(void); - +int nand_spl_read_skip_bad(uint64_t offs, uint64_t size, u8 * dst, + u32 * skip_blocks); +void nand_spl_mtd_info(u32 * page_size, u32 * block_size); +#ifdef CONFIG_RDA_FPGA +void nand_dirty_block_erase(int page); +#endif #ifdef CONFIG_SYS_NAND_SELECT_DEVICE void board_nand_select_device(struct nand_chip *nand, int chip); #endif -__attribute__((noreturn)) void nand_boot(void); +void nand_boot(void); #endif #ifdef CONFIG_ENV_OFFSET_OOB -#define ENV_OOB_MARKER 0x30425645 /*"EVB0" in little-endian -- offset is stored - as block number*/ -#define ENV_OOB_MARKER_OLD 0x30564e45 /*"ENV0" in little-endian -- offset is - stored as byte number */ +#define ENV_OOB_MARKER 0x30425645 /*"EVB0" in little-endian -- offset is stored + as block number */ +#define ENV_OOB_MARKER_OLD 0x30564e45 /*"ENV0" in little-endian -- offset is + stored as byte number */ #define ENV_OFFSET_SIZE 8 -int get_nand_env_oob(nand_info_t *nand, unsigned long *result); +int get_nand_env_oob(nand_info_t * nand, unsigned long *result); #endif diff --git a/include/net.h b/include/net.h index ee11f82ccc..a092f291bb 100644 --- a/include/net.h +++ b/include/net.h @@ -19,6 +19,10 @@ #include <asm/cache.h> #include <asm/byteorder.h> /* for nton* / ntoh* stuff */ +#define DEBUG_LL_STATE 0 /* Link local state machine changes */ +#define DEBUG_DEV_PKT 0 /* Packets or info directed to the device */ +#define DEBUG_NET_PKT 0 /* Packets on info on the network at large */ +#define DEBUG_INT_STATE 0 /* Internal network state changes */ /* * The number of receive packet buffers, and the required packet buffer @@ -80,14 +84,14 @@ struct eth_device { int iobase; int state; - int (*init) (struct eth_device*, bd_t*); - int (*send) (struct eth_device*, volatile void* packet, int length); - int (*recv) (struct eth_device*); - void (*halt) (struct eth_device*); + int (*init) (struct eth_device *, bd_t *); + int (*send) (struct eth_device *, void *packet, int length); + int (*recv) (struct eth_device *); + void (*halt) (struct eth_device *); #ifdef CONFIG_MCAST_TFTP - int (*mcast) (struct eth_device*, u32 ip, u8 set); + int (*mcast) (struct eth_device *, u32 ip, u8 set); #endif - int (*write_hwaddr) (struct eth_device*); + int (*write_hwaddr) (struct eth_device *); struct eth_device *next; int index; void *priv; @@ -101,7 +105,7 @@ extern void eth_set_current(void); /* set nterface to ethcur var */ extern struct eth_device *eth_get_dev(void); /* get the current device MAC */ extern struct eth_device *eth_get_dev_by_name(const char *devname); extern struct eth_device *eth_get_dev_by_index(int index); /* get dev @ index */ -extern int eth_get_dev_index (void); /* get the device index */ +extern int eth_get_dev_index(void); /* get the device index */ extern void eth_parse_enetaddr(const char *addr, uchar *enetaddr); extern int eth_getenv_enetaddr(char *name, uchar *enetaddr); extern int eth_setenv_enetaddr(char *name, const uchar *enetaddr); @@ -120,10 +124,11 @@ extern int eth_getenv_enetaddr_by_index(const char *base_name, int index, extern int usb_eth_initialize(bd_t *bi); extern int eth_init(bd_t *bis); /* Initialize the device */ -extern int eth_send(volatile void *packet, int length); /* Send a packet */ +extern int eth_send(void *packet, int length); /* Send a packet */ #ifdef CONFIG_API -extern int eth_receive(volatile void *packet, int length); /* Receive a packet*/ +extern int eth_receive(void *packet, int length); /* Receive a packet*/ +extern void (*push_packet)(void *packet, int length); #endif extern int eth_rx(void); /* Check for received packets */ extern void eth_halt(void); /* stop SCC */ @@ -142,8 +147,8 @@ int eth_write_hwaddr(struct eth_device *dev, const char *base_name, int eth_number); #ifdef CONFIG_MCAST_TFTP -int eth_mcast_join( IPaddr_t mcast_addr, u8 join); -u32 ether_crc (size_t len, unsigned char const *p); +int eth_mcast_join(IPaddr_t mcast_addr, u8 join); +u32 ether_crc(size_t len, unsigned char const *p); #endif @@ -155,7 +160,17 @@ u32 ether_crc (size_t len, unsigned char const *p); /* * Ethernet header */ -typedef struct { + +struct ethernet_hdr { + uchar et_dest[6]; /* Destination node */ + uchar et_src[6]; /* Source node */ + ushort et_protlen; /* Protocol or length */ +}; + +/* Ethernet header size */ +#define ETHER_HDR_SIZE (sizeof(struct ethernet_hdr)) + +struct e802_hdr { uchar et_dest[6]; /* Destination node */ uchar et_src[6]; /* Source node */ ushort et_protlen; /* Protocol or length */ @@ -166,23 +181,24 @@ typedef struct { uchar et_snap2; uchar et_snap3; ushort et_prot; /* 802 protocol */ -} Ethernet_t; +}; -#define ETHER_HDR_SIZE 14 /* Ethernet header size */ -#define E802_HDR_SIZE 22 /* 802 ethernet header size */ +/* 802 + SNAP + ethernet header size */ +#define E802_HDR_SIZE (sizeof(struct e802_hdr)) /* - * Ethernet header + * Virtual LAN Ethernet header */ -typedef struct { +struct vlan_ethernet_hdr { uchar vet_dest[6]; /* Destination node */ uchar vet_src[6]; /* Source node */ ushort vet_vlan_type; /* PROT_VLAN */ ushort vet_tag; /* TAG of VLAN */ ushort vet_type; /* protocol type */ -} VLAN_Ethernet_t; +}; -#define VLAN_ETHER_HDR_SIZE 18 /* VLAN Ethernet header size */ +/* VLAN Ethernet header size */ +#define VLAN_ETHER_HDR_SIZE (sizeof(struct vlan_ethernet_hdr)) #define PROT_IP 0x0800 /* IP protocol */ #define PROT_ARP 0x0806 /* IP ARP protocol */ @@ -195,7 +211,7 @@ typedef struct { /* * Internet Protocol (IP) header. */ -typedef struct { +struct ip_hdr { uchar ip_hl_v; /* header length and version */ uchar ip_tos; /* type of service */ ushort ip_len; /* total length */ @@ -206,11 +222,7 @@ typedef struct { ushort ip_sum; /* checksum */ IPaddr_t ip_src; /* Source IP address */ IPaddr_t ip_dst; /* Destination IP address */ - ushort udp_src; /* UDP source port */ - ushort udp_dst; /* UDP destination port */ - ushort udp_len; /* Length of UDP packet */ - ushort udp_xsum; /* Checksum */ -} IP_t; +}; #define IP_OFFS 0x1fff /* ip offset *= 8 */ #define IP_FLAGS 0xe000 /* first 3 bits */ @@ -218,20 +230,42 @@ typedef struct { #define IP_FLAGS_DFRAG 0x4000 /* don't fragments */ #define IP_FLAGS_MFRAG 0x2000 /* more fragments */ -#define IP_HDR_SIZE_NO_UDP (sizeof (IP_t) - 8) -#define IP_HDR_SIZE (sizeof (IP_t)) +#define IP_HDR_SIZE (sizeof(struct ip_hdr)) + +/* + * Internet Protocol (IP) + UDP header. + */ +struct ip_udp_hdr { + uchar ip_hl_v; /* header length and version */ + uchar ip_tos; /* type of service */ + ushort ip_len; /* total length */ + ushort ip_id; /* identification */ + ushort ip_off; /* fragment offset field */ + uchar ip_ttl; /* time to live */ + uchar ip_p; /* protocol */ + ushort ip_sum; /* checksum */ + IPaddr_t ip_src; /* Source IP address */ + IPaddr_t ip_dst; /* Destination IP address */ + ushort udp_src; /* UDP source port */ + ushort udp_dst; /* UDP destination port */ + ushort udp_len; /* Length of UDP packet */ + ushort udp_xsum; /* Checksum */ +}; +#define IP_UDP_HDR_SIZE (sizeof(struct ip_udp_hdr)) +#define UDP_HDR_SIZE (IP_UDP_HDR_SIZE - IP_HDR_SIZE) /* * Address Resolution Protocol (ARP) header. */ -typedef struct -{ +struct arp_hdr { ushort ar_hrd; /* Format of hardware address */ # define ARP_ETHER 1 /* Ethernet hardware address */ ushort ar_pro; /* Format of protocol address */ uchar ar_hln; /* Length of hardware address */ +# define ARP_HLEN 6 uchar ar_pln; /* Length of protocol address */ +# define ARP_PLEN 4 ushort ar_op; /* Operation */ # define ARPOP_REQUEST 1 /* Request to resolve address */ # define ARPOP_REPLY 2 /* Response to previous request */ @@ -245,13 +279,17 @@ typedef struct * specific hardware/protocol combinations. */ uchar ar_data[0]; +#define ar_sha ar_data[0] +#define ar_spa ar_data[ARP_HLEN] +#define ar_tha ar_data[ARP_HLEN + ARP_PLEN] +#define ar_tpa ar_data[ARP_HLEN + ARP_PLEN + ARP_HLEN] #if 0 uchar ar_sha[]; /* Sender hardware address */ uchar ar_spa[]; /* Sender protocol address */ uchar ar_tha[]; /* Target hardware address */ uchar ar_tpa[]; /* Target protocol address */ #endif /* 0 */ -} ARP_t; +}; #define ARP_HDR_SIZE (8+20) /* Size assuming ethernet */ @@ -270,7 +308,7 @@ typedef struct /* Codes for NOT_REACH */ #define ICMP_NOT_REACH_PORT 3 /* Port unreachable */ -typedef struct icmphdr { +struct icmp_hdr { uchar type; uchar code; ushort checksum; @@ -286,8 +324,10 @@ typedef struct icmphdr { } frag; uchar data[0]; } un; -} ICMP_t; +}; +#define ICMP_HDR_SIZE (sizeof(struct icmp_hdr)) +#define IP_ICMP_HDR_SIZE (IP_HDR_SIZE + ICMP_HDR_SIZE) /* * Maximum packet size; used to allocate packet storage. @@ -326,54 +366,44 @@ typedef struct icmphdr { /* net.c */ /** BOOTP EXTENTIONS **/ -extern IPaddr_t NetOurGatewayIP; /* Our gateway IP addresse */ -extern IPaddr_t NetOurSubnetMask; /* Our subnet mask (0 = unknown)*/ -extern IPaddr_t NetOurDNSIP; /* Our Domain Name Server (0 = unknown)*/ +extern IPaddr_t NetOurGatewayIP; /* Our gateway IP address */ +extern IPaddr_t NetOurSubnetMask; /* Our subnet mask (0 = unknown) */ +extern IPaddr_t NetOurDNSIP; /* Our Domain Name Server (0 = unknown) */ #if defined(CONFIG_BOOTP_DNS2) -extern IPaddr_t NetOurDNS2IP; /* Our 2nd Domain Name Server (0 = unknown)*/ +extern IPaddr_t NetOurDNS2IP; /* Our 2nd Domain Name Server (0 = unknown) */ #endif -extern char NetOurNISDomain[32]; /* Our NIS domain */ -extern char NetOurHostName[32]; /* Our hostname */ -extern char NetOurRootPath[64]; /* Our root path */ -extern ushort NetBootFileSize; /* Our boot file size in blocks */ +extern char NetOurNISDomain[32]; /* Our NIS domain */ +extern char NetOurHostName[32]; /* Our hostname */ +extern char NetOurRootPath[64]; /* Our root path */ +extern ushort NetBootFileSize; /* Our boot file size in blocks */ /** END OF BOOTP EXTENTIONS **/ -extern ulong NetBootFileXferSize; /* size of bootfile in bytes */ -extern uchar NetOurEther[6]; /* Our ethernet address */ -extern uchar NetServerEther[6]; /* Boot server enet address */ -extern IPaddr_t NetOurIP; /* Our IP addr (0 = unknown) */ -extern IPaddr_t NetServerIP; /* Server IP addr (0 = unknown) */ -extern volatile uchar * NetTxPacket; /* THE transmit packet */ -extern volatile uchar * NetRxPackets[PKTBUFSRX];/* Receive packets */ -extern volatile uchar * NetRxPacket; /* Current receive packet */ -extern int NetRxPacketLen; /* Current rx packet length */ -extern unsigned NetIPID; /* IP ID (counting) */ -extern uchar NetBcastAddr[6]; /* Ethernet boardcast address */ +extern ulong NetBootFileXferSize; /* size of bootfile in bytes */ +extern uchar NetOurEther[6]; /* Our ethernet address */ +extern uchar NetServerEther[6]; /* Boot server enet address */ +extern IPaddr_t NetOurIP; /* Our IP addr (0 = unknown) */ +extern IPaddr_t NetServerIP; /* Server IP addr (0 = unknown) */ +extern uchar *NetTxPacket; /* THE transmit packet */ +extern uchar *NetRxPackets[PKTBUFSRX]; /* Receive packets */ +extern uchar *NetRxPacket; /* Current receive packet */ +extern int NetRxPacketLen; /* Current rx packet length */ +extern unsigned NetIPID; /* IP ID (counting) */ +extern uchar NetBcastAddr[6]; /* Ethernet boardcast address */ extern uchar NetEtherNullAddr[6]; -#define VLAN_NONE 4095 /* untagged */ -#define VLAN_IDMASK 0x0fff /* mask of valid vlan id */ -extern ushort NetOurVLAN; /* Our VLAN */ -extern ushort NetOurNativeVLAN; /* Our Native VLAN */ - -extern uchar NetCDPAddr[6]; /* Ethernet CDP address */ -extern ushort CDPNativeVLAN; /* CDP returned native VLAN */ -extern ushort CDPApplianceVLAN; /* CDP returned appliance VLAN */ - -extern int NetState; /* Network loop state */ -#define NETLOOP_CONTINUE 1 -#define NETLOOP_RESTART 2 -#define NETLOOP_SUCCESS 3 -#define NETLOOP_FAIL 4 +#define VLAN_NONE 4095 /* untagged */ +#define VLAN_IDMASK 0x0fff /* mask of valid vlan id */ +extern ushort NetOurVLAN; /* Our VLAN */ +extern ushort NetOurNativeVLAN; /* Our Native VLAN */ -extern int NetRestartWrap; /* Tried all network devices */ +extern int NetRestartWrap; /* Tried all network devices */ enum proto_t { BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP, - TFTPSRV, TFTPPUT + TFTPSRV, TFTPPUT, LINKLOCAL }; /* from net/net.c */ -extern char BootFile[128]; /* Boot File name */ +extern char BootFile[128]; /* Boot File name */ #if defined(CONFIG_CMD_DNS) extern char *NetDNSResolve; /* The host to resolve */ @@ -381,21 +411,36 @@ extern char *NetDNSenvvar; /* the env var to put the ip into */ #endif #if defined(CONFIG_CMD_PING) -extern IPaddr_t NetPingIP; /* the ip address to ping */ +extern IPaddr_t NetPingIP; /* the ip address to ping */ #endif #if defined(CONFIG_CMD_CDP) /* when CDP completes these hold the return values */ -extern ushort CDPNativeVLAN; -extern ushort CDPApplianceVLAN; +extern ushort CDPNativeVLAN; /* CDP returned native VLAN */ +extern ushort CDPApplianceVLAN; /* CDP returned appliance VLAN */ + +/* + * Check for a CDP packet by examining the received MAC address field + */ +static inline int is_cdp_packet(const uchar *et_addr) +{ + extern const uchar NetCDPAddr[6]; + + return memcmp(et_addr, NetCDPAddr, 6) == 0; +} #endif #if defined(CONFIG_CMD_SNTP) -extern IPaddr_t NetNtpServerIP; /* the ip address to NTP */ -extern int NetTimeOffset; /* offset time from UTC */ +extern IPaddr_t NetNtpServerIP; /* the ip address to NTP */ +extern int NetTimeOffset; /* offset time from UTC */ +#endif + +#if defined(CONFIG_MCAST_TFTP) +extern IPaddr_t Mcast_addr; #endif /* Initialize the network adapter */ +extern void net_init(void); extern int NetLoop(enum proto_t); /* Shutdown adapters and cleanup */ @@ -408,28 +453,67 @@ extern void NetStartAgain(void); extern int NetEthHdrSize(void); /* Set ethernet header; returns the size of the header */ -extern int NetSetEther(volatile uchar *, uchar *, uint); +extern int NetSetEther(uchar *, uchar *, uint); +extern int net_update_ether(struct ethernet_hdr *et, uchar *addr, uint prot); /* Set IP header */ -extern void NetSetIP(volatile uchar *, IPaddr_t, int, int, int); +extern void net_set_ip_header(uchar *pkt, IPaddr_t dest, IPaddr_t source); +extern void net_set_udp_header(uchar *pkt, IPaddr_t dest, int dport, + int sport, int len); /* Checksum */ -extern int NetCksumOk(uchar *, int); /* Return true if cksum OK */ -extern uint NetCksum(uchar *, int); /* Calculate the checksum */ - -/* Set callbacks */ -extern void NetSetHandler(rxhand_f *); /* Set RX packet handler */ +extern int NetCksumOk(uchar *, int); /* Return true if cksum OK */ +extern uint NetCksum(uchar *, int); /* Calculate the checksum */ + +/* Callbacks */ +extern rxhand_f *net_get_udp_handler(void); /* Get UDP RX packet handler */ +extern void net_set_udp_handler(rxhand_f *); /* Set UDP RX packet handler */ +extern rxhand_f *net_get_arp_handler(void); /* Get ARP RX packet handler */ +extern void net_set_arp_handler(rxhand_f *); /* Set ARP RX packet handler */ extern void net_set_icmp_handler(rxhand_icmp_f *f); /* Set ICMP RX handler */ -extern void NetSetTimeout(ulong, thand_f *);/* Set timeout handler */ +extern void NetSetTimeout(ulong, thand_f *);/* Set timeout handler */ + +/* Network loop state */ +enum net_loop_state { + NETLOOP_CONTINUE, + NETLOOP_RESTART, + NETLOOP_SUCCESS, + NETLOOP_FAIL +}; +static inline void net_set_state(enum net_loop_state state) +{ + extern enum net_loop_state net_state; -/* Transmit "NetTxPacket" */ -extern void NetSendPacket(volatile uchar *, int); + debug_cond(DEBUG_INT_STATE, "--- NetState set to %d\n", state); + net_state = state; +} -/* Transmit UDP packet, performing ARP request if needed */ -extern int NetSendUDPPacket(uchar *ether, IPaddr_t dest, int dport, int sport, int len); +/* Transmit a packet */ +static inline void NetSendPacket(uchar *pkt, int len) +{ + (void) eth_send(pkt, len); +} + +/* + * Transmit "NetTxPacket" as UDP packet, performing ARP request if needed + * (ether will be populated) + * + * @param ether Raw packet buffer + * @param dest IP address to send the datagram to + * @param dport Destination UDP port + * @param sport Source UDP port + * @param payload_len Length of data after the UDP header + */ +extern int NetSendUDPPacket(uchar *ether, IPaddr_t dest, int dport, + int sport, int payload_len); /* Processes a received packet */ -extern void NetReceive(volatile uchar *, int); +extern void NetReceive(uchar *, int); + +#ifdef CONFIG_NETCONSOLE +void NcStart(void); +int nc_input_packet(uchar *pkt, unsigned dest, unsigned src, unsigned len); +#endif /* * Check if autoload is enabled. If so, use either NFS or TFTP to download @@ -445,10 +529,11 @@ void net_auto_load(void); * footprint in our tests. */ /* return IP *in network byteorder* */ -static inline IPaddr_t NetReadIP(volatile void *from) +static inline IPaddr_t NetReadIP(void *from) { IPaddr_t ip; - memcpy((void*)&ip, (void*)from, sizeof(ip)); + + memcpy((void *)&ip, (void *)from, sizeof(ip)); return ip; } @@ -456,26 +541,27 @@ static inline IPaddr_t NetReadIP(volatile void *from) static inline ulong NetReadLong(ulong *from) { ulong l; - memcpy((void*)&l, (void*)from, sizeof(l)); + + memcpy((void *)&l, (void *)from, sizeof(l)); return l; } /* write IP *in network byteorder* */ static inline void NetWriteIP(void *to, IPaddr_t ip) { - memcpy(to, (void*)&ip, sizeof(ip)); + memcpy(to, (void *)&ip, sizeof(ip)); } /* copy IP */ -static inline void NetCopyIP(volatile void *to, void *from) +static inline void NetCopyIP(void *to, void *from) { - memcpy((void*)to, from, sizeof(IPaddr_t)); + memcpy((void *)to, from, sizeof(IPaddr_t)); } /* copy ulong */ static inline void NetCopyLong(ulong *to, ulong *from) { - memcpy((void*)to, (void*)from, sizeof(ulong)); + memcpy((void *)to, (void *)from, sizeof(ulong)); } /** @@ -498,7 +584,7 @@ static inline int is_zero_ether_addr(const u8 *addr) */ static inline int is_multicast_ether_addr(const u8 *addr) { - return (0x01 & addr[0]); + return 0x01 & addr[0]; } /* @@ -509,7 +595,8 @@ static inline int is_multicast_ether_addr(const u8 *addr) */ static inline int is_broadcast_ether_addr(const u8 *addr) { - return (addr[0] & addr[1] & addr[2] & addr[3] & addr[4] & addr[5]) == 0xff; + return (addr[0] & addr[1] & addr[2] & addr[3] & addr[4] & addr[5]) == + 0xff; } /* @@ -529,13 +616,13 @@ static inline int is_valid_ether_addr(const u8 *addr) } /* Convert an IP address to a string */ -extern void ip_to_string (IPaddr_t x, char *s); +extern void ip_to_string(IPaddr_t x, char *s); /* Convert a string to ip address */ extern IPaddr_t string_to_ip(const char *s); /* Convert a VLAN id to a string */ -extern void VLAN_to_string (ushort x, char *s); +extern void VLAN_to_string(ushort x, char *s); /* Convert a string to a vlan id */ extern ushort string_to_VLAN(const char *s); @@ -544,7 +631,7 @@ extern ushort string_to_VLAN(const char *s); extern ushort getenv_VLAN(char *); /* copy a filename (allow for "..." notation, limit length) */ -extern void copy_filename (char *dst, const char *src, int size); +extern void copy_filename(char *dst, const char *src, int size); /* get a random source port */ extern unsigned int random_port(void); diff --git a/include/part.h b/include/part.h index 182776791d..eda896d471 100644 --- a/include/part.h +++ b/include/part.h @@ -2,23 +2,7 @@ * (C) Copyright 2000-2004 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef _PART_H #define _PART_H @@ -36,25 +20,34 @@ typedef struct block_dev_desc { #ifdef CONFIG_LBA48 unsigned char lba48; /* device can use 48bit addr (ATA/ATAPI v7) */ #endif - lbaint_t lba; /* number of blocks */ + lbaint_t lba; /* number of blocks */ unsigned long blksz; /* block size */ + int log2blksz; /* for convenience: log2(blksz) */ char vendor [40+1]; /* IDE model, SCSI Vendor */ char product[20+1]; /* IDE Serial no, SCSI product */ char revision[8+1]; /* firmware revision */ unsigned long (*block_read)(int dev, - unsigned long start, + lbaint_t start, lbaint_t blkcnt, void *buffer); unsigned long (*block_write)(int dev, - unsigned long start, + lbaint_t start, lbaint_t blkcnt, const void *buffer); unsigned long (*block_erase)(int dev, - unsigned long start, + lbaint_t start, lbaint_t blkcnt); void *priv; /* driver private struct pointer */ }block_dev_desc_t; +#define BLOCK_CNT(size, block_dev_desc) (PAD_COUNT(size, block_dev_desc->blksz)) +#define PAD_TO_BLOCKSIZE(size, block_dev_desc) \ + (PAD_SIZE(size, block_dev_desc->blksz)) +#define LOG2(x) (((x & 0xaaaaaaaa) ? 1 : 0) + ((x & 0xcccccccc) ? 2 : 0) + \ + ((x & 0xf0f0f0f0) ? 4 : 0) + ((x & 0xff00ff00) ? 8 : 0) + \ + ((x & 0xffff0000) ? 16 : 0)) +#define LOG2_INVALID(type) ((type)((sizeof(type)<<3)-1)) + /* Interface types: */ #define IF_TYPE_UNKNOWN 0 #define IF_TYPE_IDE 1 @@ -88,16 +81,21 @@ typedef struct block_dev_desc { #define DEV_TYPE_OPDISK 0x07 /* optical disk */ typedef struct disk_partition { - ulong start; /* # of first block in partition */ - ulong size; /* number of blocks in partition */ + lbaint_t start; /* # of first block in partition */ + lbaint_t size; /* number of blocks in partition */ ulong blksz; /* block size in bytes */ uchar name[32]; /* partition name */ uchar type[32]; /* string type description */ + int bootable; /* Active/Bootable flag is set */ +#ifdef CONFIG_PARTITION_UUIDS + char uuid[37]; /* filesystem UUID as string, if exists */ +#endif } disk_partition_t; /* Misc _get_dev functions */ #ifdef CONFIG_PARTITIONS -block_dev_desc_t* get_dev(char* ifname, int dev); +block_dev_desc_t *get_dev(const char *ifname, int dev); +block_dev_desc_t *get_dev_by_name(char *devname); block_dev_desc_t* ide_get_dev(int dev); block_dev_desc_t* sata_get_dev(int dev); block_dev_desc_t* scsi_get_dev(int dev); @@ -107,12 +105,58 @@ block_dev_desc_t* systemace_get_dev(int dev); block_dev_desc_t* mg_disk_get_dev(int dev); /* disk/part.c */ +/* Refer to doc/README.partition_funcs for information about these functions. */ +int get_partition_by_name(block_dev_desc_t *dev, const char *partition_name, + disk_partition_t *partition); +int partition_erase_pre(disk_partition_t *ptn); +int partition_erase_post(disk_partition_t *ptn); +int partition_read_pre(disk_partition_t *ptn); +int partition_read_post(disk_partition_t *ptn); +int partition_write_pre(disk_partition_t *ptn); +int partition_write_post(disk_partition_t *ptn); +int partition_erase_blks(block_dev_desc_t *dev, disk_partition_t *partition, + lbaint_t *blkcnt); +int partition_erase_bytes(block_dev_desc_t *dev, disk_partition_t *partition, + loff_t *bytecnt); +#ifdef CONFIG_MD5 +void partition_md5_helper(block_dev_desc_t *dev, lbaint_t blk_start, + lbaint_t *blkcnt, unsigned char md5[16]); +int partition_md5_blks(block_dev_desc_t *dev, disk_partition_t *partition, + lbaint_t *blkcnt, unsigned char md5[16]); +int partition_md5_bytes(block_dev_desc_t *dev, disk_partition_t *partition, + loff_t *bytecnt, unsigned char md5[16]); +#endif /* CONFIG_MD5 */ +int partition_read_blks(block_dev_desc_t *dev, disk_partition_t *partition, + lbaint_t *blkcnt, void *buffer); +int partition_read_bytes(block_dev_desc_t *dev, disk_partition_t *partition, + loff_t *bytecnt, void *buffer); +int partition_write_blks(block_dev_desc_t *dev, disk_partition_t *partition, + lbaint_t *blkcnt, const void *buffer); +int partition_write_bytes(block_dev_desc_t *dev, disk_partition_t *partition, + loff_t *bytecnt, const void *buffer); +int partition_unsparse(block_dev_desc_t *dev, disk_partition_t *ptn, + unsigned char *source, lbaint_t sector, lbaint_t num_blks); +disk_partition_t *partition_find_ptn(const char *name); int get_partition_info (block_dev_desc_t * dev_desc, int part, disk_partition_t *info); void print_part (block_dev_desc_t *dev_desc); void init_part (block_dev_desc_t *dev_desc); void dev_print(block_dev_desc_t *dev_desc); +int get_device(const char *ifname, const char *dev_str, + block_dev_desc_t **dev_desc); +int get_device_and_partition(const char *ifname, const char *dev_part_str, + block_dev_desc_t **dev_desc, + disk_partition_t *info, int allow_whole_dev); +#ifndef CONFIG_MIN_PARTITION_NUM +#define CONFIG_MIN_PARTITION_NUM 0 +#endif +#ifndef CONFIG_MAX_PARTITION_NUM +#define CONFIG_MAX_PARTITION_NUM 20 +#endif #else -static inline block_dev_desc_t* get_dev(char* ifname, int dev) { return NULL; } +static inline block_dev_desc_t *get_dev(const char *ifname, int dev) +{ return NULL; } +static inline block_dev_desc_t *get_dev_by_name(char* ifname, + int dev) { return NULL; } static inline block_dev_desc_t* ide_get_dev(int dev) { return NULL; } static inline block_dev_desc_t* sata_get_dev(int dev) { return NULL; } static inline block_dev_desc_t* scsi_get_dev(int dev) { return NULL; } @@ -120,12 +164,76 @@ static inline block_dev_desc_t* usb_stor_get_dev(int dev) { return NULL; } static inline block_dev_desc_t* mmc_get_dev(int dev) { return NULL; } static inline block_dev_desc_t* systemace_get_dev(int dev) { return NULL; } static inline block_dev_desc_t* mg_disk_get_dev(int dev) { return NULL; } - +static inline block_dev_desc_t *nand_get_dev(int dev) { return NULL; } +static inline int get_partition_by_name(block_dev_desc_t *dev, + const char *partition_name, + disk_partition_t *partition) { return -ENODEV; } +static inline int partition_erase_pre(disk_partition_t *ptn) + { return -ENODEV; } +static inline int partition_erase_post(disk_partition_t *ptn) + { return -ENODEV; } +static inline int partition_read_pre(disk_partition_t *ptn) + { return -ENODEV; } +static inline int partition_read_post(disk_partition_t *ptn) + { return -ENODEV; } +static inline int partition_write_pre(disk_partition_t *ptn) + { return -ENODEV; } +static inline int partition_write_post(disk_partition_t *ptn) + { return -ENODEV; } +static inline int partition_erase_blks(block_dev_desc_t *dev, + disk_partition_t *partition, + lbaint_t *blkcnt) { return -ENODEV; } +static inline int partition_erase_bytes(block_dev_desc_t *dev, + disk_partition_t *partition, + loff_t *bytecnt) { return -ENODEV; } +#ifdef CONFIG_MD5 +static inline void partition_md5_helper(block_dev_desc_t *dev, + lbaint_t blk_start, lbaint_t *blkcnt, + unsigned char md5[16]) { *blkcnt = 0; } +static inline int partition_md5_blks(block_dev_desc_t *dev, + disk_partition_t *partition, lbaint_t *blkcnt, + unsigned char md5[16]) { return -ENODEV; } +static inline int partition_md5_bytes(block_dev_desc_t *dev, + disk_partition_t *partition, loff_t *bytecnt, + unsigned char md5[16]) { return -ENODEV; } +#endif /* CONFIG_MD5 */ +static inline int partition_read_blks(block_dev_desc_t *dev, + disk_partition_t *partition, lbaint_t *blkcnt, + void *buffer) { return -ENODEV; } +static inline int partition_read_bytes(block_dev_desc_t *dev, + disk_partition_t *partition, loff_t *bytecnt, + void *buffer) { return -ENODEV; } +static inline int partition_write_blks(block_dev_desc_t *dev, + disk_partition_t *partition, lbaint_t *blkcnt, + const void *buffer) { return -ENODEV; } +static inline int partition_write_bytes(block_dev_desc_t *dev, + disk_partition_t *partition, loff_t *bytecnt, + const void *buffer) { return -ENODEV; } +int partition_unsparse(block_dev_desc_t *dev, disk_partition_t *ptn, + unsigned char *source, lbaint_t sector, lbaint_t num_blks) + { return -ENODEV;} +disk_partition_t *partition_find_ptn(const char *name) + { return NULL;} static inline int get_partition_info (block_dev_desc_t * dev_desc, int part, disk_partition_t *info) { return -1; } static inline void print_part (block_dev_desc_t *dev_desc) {} static inline void init_part (block_dev_desc_t *dev_desc) {} static inline void dev_print(block_dev_desc_t *dev_desc) {} +static inline int get_device(const char *ifname, const char *dev_str, + block_dev_desc_t **dev_desc) +{ return -1; } +static inline int get_device_and_partition(const char *ifname, + const char *dev_part_str, + block_dev_desc_t **dev_desc, + disk_partition_t *info, + int allow_whole_dev) +{ *dev_desc = NULL; return -1; } +#ifndef CONFIG_MIN_PARTITION_NUM +#define CONFIG_MIN_PARTITION_NUM 0 +#endif +#ifndef CONFIG_MAX_PARTITION_NUM +#define CONFIG_MAX_PARTITION_NUM 0 +#endif #endif #ifdef CONFIG_MAC_PARTITION @@ -157,10 +265,62 @@ int test_part_amiga (block_dev_desc_t *dev_desc); #endif #ifdef CONFIG_EFI_PARTITION +#include <part_efi.h> /* disk/part_efi.c */ int get_partition_info_efi (block_dev_desc_t * dev_desc, int part, disk_partition_t *info); void print_part_efi (block_dev_desc_t *dev_desc); int test_part_efi (block_dev_desc_t *dev_desc); + +/** + * write_gpt_table() - Write the GUID Partition Table to disk + * + * @param dev_desc - block device descriptor + * @param gpt_h - pointer to GPT header representation + * @param gpt_e - pointer to GPT partition table entries + * + * @return - zero on success, otherwise error + */ +int write_gpt_table(block_dev_desc_t *dev_desc, + gpt_header *gpt_h, gpt_entry *gpt_e); + +/** + * gpt_fill_pte(): Fill the GPT partition table entry + * + * @param gpt_h - GPT header representation + * @param gpt_e - GPT partition table entries + * @param partitions - list of partitions + * @param parts - number of partitions + * + * @return zero on success + */ +int gpt_fill_pte(gpt_header *gpt_h, gpt_entry *gpt_e, + disk_partition_t *partitions, int parts); + +/** + * gpt_fill_header(): Fill the GPT header + * + * @param dev_desc - block device descriptor + * @param gpt_h - GPT header representation + * @param str_guid - disk guid string representation + * @param parts_count - number of partitions + * + * @return - error on str_guid conversion error + */ +int gpt_fill_header(block_dev_desc_t *dev_desc, gpt_header *gpt_h, + char *str_guid, int parts_count); + +/** + * gpt_restore(): Restore GPT partition table + * + * @param dev_desc - block device descriptor + * @param str_disk_guid - disk GUID + * @param partitions - list of partitions + * @param parts - number of partitions + * + * @return zero on success + */ +int gpt_restore(block_dev_desc_t *dev_desc, char *str_disk_guid, + disk_partition_t *partitions, const int parts_count); #endif #endif /* _PART_H */ diff --git a/include/part_efi.h b/include/part_efi.h new file mode 100644 index 0000000000..5903e7c812 --- /dev/null +++ b/include/part_efi.h @@ -0,0 +1,139 @@ +/* + * Copyright (C) 2008 RuggedCom, Inc. + * Richard Retanubun <RichardRetanubun@RuggedCom.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * See also linux/fs/partitions/efi.h + * + * EFI GUID Partition Table + * Per Intel EFI Specification v1.02 + * http://developer.intel.com/technology/efi/efi.htm +*/ + +#ifndef _DISK_PART_EFI_H +#define _DISK_PART_EFI_H + +#define MSDOS_MBR_SIGNATURE 0xAA55 +#define EFI_PMBR_OSTYPE_EFI 0xEF +#define EFI_PMBR_OSTYPE_EFI_GPT 0xEE + +#define GPT_BLOCK_SIZE 512 +#define GPT_HEADER_SIGNATURE 0x5452415020494645ULL +#define GPT_HEADER_REVISION_V1 0x00010000 +#define GPT_PRIMARY_PARTITION_TABLE_LBA 1ULL +#define GPT_ENTRY_NAME "gpt" + +#define EFI_GUID(a,b,c,d0,d1,d2,d3,d4,d5,d6,d7) \ + ((efi_guid_t) \ + {{ (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, \ + (b) & 0xff, ((b) >> 8) & 0xff, \ + (c) & 0xff, ((c) >> 8) & 0xff, \ + (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) }}) + +#define PARTITION_SYSTEM_GUID \ + EFI_GUID( 0xC12A7328, 0xF81F, 0x11d2, \ + 0xBA, 0x4B, 0x00, 0xA0, 0xC9, 0x3E, 0xC9, 0x3B) +#define LEGACY_MBR_PARTITION_GUID \ + EFI_GUID( 0x024DEE41, 0x33E7, 0x11d3, \ + 0x9D, 0x69, 0x00, 0x08, 0xC7, 0x81, 0xF3, 0x9F) +#define PARTITION_MSFT_RESERVED_GUID \ + EFI_GUID( 0xE3C9E316, 0x0B5C, 0x4DB8, \ + 0x81, 0x7D, 0xF9, 0x2D, 0xF0, 0x02, 0x15, 0xAE) +#define PARTITION_BASIC_DATA_GUID \ + EFI_GUID( 0xEBD0A0A2, 0xB9E5, 0x4433, \ + 0x87, 0xC0, 0x68, 0xB6, 0xB7, 0x26, 0x99, 0xC7) +#define PARTITION_LINUX_RAID_GUID \ + EFI_GUID( 0xa19d880f, 0x05fc, 0x4d3b, \ + 0xa0, 0x06, 0x74, 0x3f, 0x0f, 0x84, 0x91, 0x1e) +#define PARTITION_LINUX_SWAP_GUID \ + EFI_GUID( 0x0657fd6d, 0xa4ab, 0x43c4, \ + 0x84, 0xe5, 0x09, 0x33, 0xc8, 0x4b, 0x4f, 0x4f) +#define PARTITION_LINUX_LVM_GUID \ + EFI_GUID( 0xe6d6d379, 0xf507, 0x44c2, \ + 0xa2, 0x3c, 0x23, 0x8f, 0x2a, 0x3d, 0xf9, 0x28) + +/* linux/include/efi.h */ +typedef unsigned short efi_char16_t; + +typedef struct { + unsigned char b[16]; +} efi_guid_t; + +/* based on linux/include/genhd.h */ +struct partition { + unsigned char boot_ind; /* 0x80 - active */ + unsigned char head; /* starting head */ + unsigned char sector; /* starting sector */ + unsigned char cyl; /* starting cylinder */ + unsigned char sys_ind; /* What partition type */ + unsigned char end_head; /* end head */ + unsigned char end_sector; /* end sector */ + unsigned char end_cyl; /* end cylinder */ + unsigned char start_sect[4]; /* starting sector counting from 0 */ + unsigned char nr_sects[4]; /* nr of sectors in partition */ +} __attribute__ ((packed)); + +/* based on linux/fs/partitions/efi.h */ +typedef struct _gpt_header { + unsigned char signature[8]; + unsigned char revision[4]; + unsigned char header_size[4]; + unsigned char header_crc32[4]; + unsigned char reserved1[4]; + unsigned char my_lba[8]; + unsigned char alternate_lba[8]; + unsigned char first_usable_lba[8]; + unsigned char last_usable_lba[8]; + efi_guid_t disk_guid; + unsigned char partition_entry_lba[8]; + unsigned char num_partition_entries[4]; + unsigned char sizeof_partition_entry[4]; + unsigned char partition_entry_array_crc32[4]; + unsigned char reserved2[GPT_BLOCK_SIZE - 92]; +} __attribute__ ((packed)) gpt_header; + +typedef struct _gpt_entry_attributes { + unsigned long long required_to_function:1; + unsigned long long reserved:47; + unsigned long long type_guid_specific:16; +} __attribute__ ((packed)) gpt_entry_attributes; + +#define PARTNAME_SZ (72 / sizeof(efi_char16_t)) +typedef struct _gpt_entry { + efi_guid_t partition_type_guid; + efi_guid_t unique_partition_guid; + unsigned char starting_lba[8]; + unsigned char ending_lba[8]; + gpt_entry_attributes attributes; + efi_char16_t partition_name[PARTNAME_SZ]; +} +__attribute__ ((packed)) gpt_entry; + +typedef struct _legacy_mbr { + unsigned char boot_code[440]; + unsigned char unique_mbr_signature[4]; + unsigned char unknown[2]; + struct partition partition_record[4]; + unsigned char signature[2]; +} __attribute__ ((packed)) legacy_mbr; + +#endif /* _DISK_PART_EFI_H */ diff --git a/include/pdl.h b/include/pdl.h new file mode 100644 index 0000000000..679460a45a --- /dev/null +++ b/include/pdl.h @@ -0,0 +1,13 @@ +#ifndef __PDL_H_ +#define __PDL_H_ + +extern int pdl_dbg_pdl; +extern int pdl_vdbg_pdl; +extern int pdl_dbg_usb_ep0; +extern int pdl_dbg_usb_serial; +extern int pdl_dbg_rw_check; +extern int pdl_dbg_factory_part; + +int pdl_main(void); +int pdl_mode_get(void); +#endif diff --git a/include/pmic.h b/include/pmic.h index 52a1526d95..6a05b40aef 100644 --- a/include/pmic.h +++ b/include/pmic.h @@ -55,6 +55,7 @@ struct pmic { }; int pmic_init(void); +int pmic_dialog_init(void); int check_reg(u32 reg); struct pmic *get_pmic(void); int pmic_probe(struct pmic *p); diff --git a/include/rda/ddr_timing/8810p_16x2_156m_ddr2.h b/include/rda/ddr_timing/8810p_16x2_156m_ddr2.h new file mode 100644 index 0000000000..becc4cf0ec --- /dev/null +++ b/include/rda/ddr_timing/8810p_16x2_156m_ddr2.h @@ -0,0 +1,84 @@ +#define DDR_TIMIMG_NAME "8810p_16x2_156m_ddr2" + +#define PMU_VBUCK1_VAL 9 +#define PMU_VBUCK3_VAL 10 + +#define DDR_VTT_VAL 1 + +#define DDR_CHAN_1_VALID_VAL 1 +#define DDR_CHAN_2_VALID_VAL 1 +#define DDR_CHAN_3_VALID_VAL 1 +#define DDR_CHAN_4_VALID_VAL 1 + +#define DDR_TIMING_100H_VAL 0x0000 +#define DDR_TIMING_101H_VAL 0x0000 +#define DDR_TIMING_102H_VAL 0x0000 +#define DDR_TIMING_103H_VAL 0x64b0 +#define DDR_TIMING_104H_VAL 0x3333 + +#define DDR_TIMING_105H_VAL 0x3333 +#define DDR_TIMING_106H_VAL 0x0463 +#define DDR_TIMING_107H_VAL 0x1144 +#define DDR_TIMING_108H_VAL 0x0000 + +#define DDR_TIMING_109H_VAL 0x1101 +#define DDR_TIMING_10AH_VAL 0x0001 +#define DDR_TIMING_10BH_VAL 0x0003 + +#define DDR_TIMING_120H_VAL 0x0000 +#define DDR_TIMING_121H_VAL 0x0000 +#define DDR_TIMING_122H_VAL 0x0000 +#define DDR_TIMING_123H_VAL 0x64b0 +#define DDR_TIMING_124H_VAL 0x3333 + +#define DDR_TIMING_125H_VAL 0x3333 +#define DDR_TIMING_126H_VAL 0x0463 +#define DDR_TIMING_127H_VAL 0x1144 +#define DDR_TIMING_128H_VAL 0x0000 +#define DDR_TIMING_129H_VAL 0x1101 +#define DDR_TIMING_12AH_VAL 0x0001 +#define DDR_TIMING_12BH_VAL 0x0003 + +#define DDR_TIMING_140H_VAL 0x0000 +#define DDR_TIMING_141H_VAL 0x0000 +#define DDR_TIMING_142H_VAL 0x0000 +#define DDR_TIMING_143H_VAL 0x64b0 +#define DDR_TIMING_144H_VAL 0x3333 +#define DDR_TIMING_145H_VAL 0x3333 +#define DDR_TIMING_146H_VAL 0x0463 +#define DDR_TIMING_147H_VAL 0x1144 +#define DDR_TIMING_148H_VAL 0x0000 +#define DDR_TIMING_149H_VAL 0x1101 +#define DDR_TIMING_14AH_VAL 0x0001 +#define DDR_TIMING_14BH_VAL 0x0003 + + +#define DDR_TIMING_161H_VAL 0x0000 +#define DDR_TIMING_162H_VAL 0x0000 +#define DDR_TIMING_163H_VAL 0x64b0 +#define DDR_TIMING_164H_VAL 0x3333 +#define DDR_TIMING_165H_VAL 0x3333 +#define DDR_TIMING_166H_VAL 0x0463 +#define DDR_TIMING_167H_VAL 0x1144 +#define DDR_TIMING_168H_VAL 0x0000 +#define DDR_TIMING_169H_VAL 0x1101 +#define DDR_TIMING_16AH_VAL 0x0001 +#define DDR_TIMING_16BH_VAL 0x0003 + +#define DDR_TIMING_180H_VAL 0x3336 +#define DDR_TIMING_181H_VAL 0x3333 +#define DDR_TIMING_182H_VAL 0x3333 +#define DDR_TIMING_183H_VAL 0x3333 +#define DDR_TIMING_184H_VAL 0x3333 +#define DDR_TIMING_185H_VAL 0x3333 +#define DDR_TIMING_186H_VAL 0x3333 +#define DDR_TIMING_187H_VAL 0x3333 +#define DDR_TIMING_188H_VAL 0x0001 +#define DDR_TIMING_189H_VAL 0x0000 +#define DDR_TIMING_18AH_VAL 0x1144 +#define DDR_TIMING_18BH_VAL 0x0013 +#define DDR_TIMING_18CH_VAL 0x0000 + +#define DDR_TIMING_160H_VAL 0x0000 +#define DDR_TIMING_69H_VAL 0x0009 + diff --git a/include/rda/ddr_timing/8810p_16x2_200m_ddr2.h b/include/rda/ddr_timing/8810p_16x2_200m_ddr2.h new file mode 100644 index 0000000000..86b8b26142 --- /dev/null +++ b/include/rda/ddr_timing/8810p_16x2_200m_ddr2.h @@ -0,0 +1,84 @@ +#define DDR_TIMIMG_NAME "8810p_16x2_200m_ddr2" + +#define PMU_VBUCK1_VAL 9 +#define PMU_VBUCK3_VAL 10 + +#define DDR_VTT_VAL 1 + +#define DDR_CHAN_1_VALID_VAL 1 +#define DDR_CHAN_2_VALID_VAL 1 +#define DDR_CHAN_3_VALID_VAL 1 +#define DDR_CHAN_4_VALID_VAL 1 + +#define DDR_TIMING_100H_VAL 0x0000 +#define DDR_TIMING_101H_VAL 0x0000 +#define DDR_TIMING_102H_VAL 0x0000 +#define DDR_TIMING_103H_VAL 0x24b0 +#define DDR_TIMING_104H_VAL 0x3333 + +#define DDR_TIMING_105H_VAL 0x3333 +#define DDR_TIMING_106H_VAL 0x0763 +#define DDR_TIMING_107H_VAL 0x1144 +#define DDR_TIMING_108H_VAL 0x0000 + +#define DDR_TIMING_109H_VAL 0x1101 +#define DDR_TIMING_10AH_VAL 0x0001 +#define DDR_TIMING_10BH_VAL 0x0003 + +#define DDR_TIMING_120H_VAL 0x0000 +#define DDR_TIMING_121H_VAL 0x0000 +#define DDR_TIMING_122H_VAL 0x0000 +#define DDR_TIMING_123H_VAL 0x24b0 +#define DDR_TIMING_124H_VAL 0x3333 + +#define DDR_TIMING_125H_VAL 0x3333 +#define DDR_TIMING_126H_VAL 0x0763 +#define DDR_TIMING_127H_VAL 0x1144 +#define DDR_TIMING_128H_VAL 0x0000 +#define DDR_TIMING_129H_VAL 0x1101 +#define DDR_TIMING_12AH_VAL 0x0001 +#define DDR_TIMING_12BH_VAL 0x0003 + +#define DDR_TIMING_140H_VAL 0x0000 +#define DDR_TIMING_141H_VAL 0x0000 +#define DDR_TIMING_142H_VAL 0x0000 +#define DDR_TIMING_143H_VAL 0x24b0 +#define DDR_TIMING_144H_VAL 0x3333 +#define DDR_TIMING_145H_VAL 0x3333 +#define DDR_TIMING_146H_VAL 0x0763 +#define DDR_TIMING_147H_VAL 0x1144 +#define DDR_TIMING_148H_VAL 0x0000 +#define DDR_TIMING_149H_VAL 0x1101 +#define DDR_TIMING_14AH_VAL 0x0001 +#define DDR_TIMING_14BH_VAL 0x0003 + + +#define DDR_TIMING_161H_VAL 0x0000 +#define DDR_TIMING_162H_VAL 0x0000 +#define DDR_TIMING_163H_VAL 0x24b0 +#define DDR_TIMING_164H_VAL 0x3333 +#define DDR_TIMING_165H_VAL 0x3333 +#define DDR_TIMING_166H_VAL 0x0763 +#define DDR_TIMING_167H_VAL 0x1144 +#define DDR_TIMING_168H_VAL 0x0000 +#define DDR_TIMING_169H_VAL 0x1101 +#define DDR_TIMING_16AH_VAL 0x0001 +#define DDR_TIMING_16BH_VAL 0x0003 + +#define DDR_TIMING_180H_VAL 0x3336 +#define DDR_TIMING_181H_VAL 0x3333 +#define DDR_TIMING_182H_VAL 0x3333 +#define DDR_TIMING_183H_VAL 0x3333 +#define DDR_TIMING_184H_VAL 0x3333 +#define DDR_TIMING_185H_VAL 0x3333 +#define DDR_TIMING_186H_VAL 0x3333 +#define DDR_TIMING_187H_VAL 0x3333 +#define DDR_TIMING_188H_VAL 0x0001 +#define DDR_TIMING_189H_VAL 0x0000 +#define DDR_TIMING_18AH_VAL 0x1144 +#define DDR_TIMING_18BH_VAL 0x0015 +#define DDR_TIMING_18CH_VAL 0x0000 + +#define DDR_TIMING_160H_VAL 0x0000 +#define DDR_TIMING_69H_VAL 0x0009 + diff --git a/include/rda/ddr_timing/8810p_16x2_260m_ddr2_u08.h b/include/rda/ddr_timing/8810p_16x2_260m_ddr2_u08.h new file mode 100644 index 0000000000..59c2c897c3 --- /dev/null +++ b/include/rda/ddr_timing/8810p_16x2_260m_ddr2_u08.h @@ -0,0 +1,84 @@ +#define DDR_TIMIMG_NAME "8810p_16x2_260m_ddr2_u08" + +#define PMU_VBUCK1_VAL 9 +#define PMU_VBUCK3_VAL 10 + +#define DDR_VTT_VAL 1 + +#define DDR_CHAN_1_VALID_VAL 1 +#define DDR_CHAN_2_VALID_VAL 1 +#define DDR_CHAN_3_VALID_VAL 1 +#define DDR_CHAN_4_VALID_VAL 1 + +#define DDR_TIMING_100H_VAL 0x0000 +#define DDR_TIMING_101H_VAL 0x0000 +#define DDR_TIMING_102H_VAL 0x0000 +#define DDR_TIMING_103H_VAL 0x24b0 +#define DDR_TIMING_104H_VAL 0x3333 + +#define DDR_TIMING_105H_VAL 0x3333 +#define DDR_TIMING_106H_VAL 0x0263 +#define DDR_TIMING_107H_VAL 0x1144 +#define DDR_TIMING_108H_VAL 0x0000 + +#define DDR_TIMING_109H_VAL 0x1101 +#define DDR_TIMING_10AH_VAL 0x0001 +#define DDR_TIMING_10BH_VAL 0x0003 + +#define DDR_TIMING_120H_VAL 0x0000 +#define DDR_TIMING_121H_VAL 0x0000 +#define DDR_TIMING_122H_VAL 0x0000 +#define DDR_TIMING_123H_VAL 0x24b0 +#define DDR_TIMING_124H_VAL 0x3333 + +#define DDR_TIMING_125H_VAL 0x3333 +#define DDR_TIMING_126H_VAL 0x0263 +#define DDR_TIMING_127H_VAL 0x1144 +#define DDR_TIMING_128H_VAL 0x0000 +#define DDR_TIMING_129H_VAL 0x1101 +#define DDR_TIMING_12AH_VAL 0x0001 +#define DDR_TIMING_12BH_VAL 0x0003 + +#define DDR_TIMING_140H_VAL 0x0000 +#define DDR_TIMING_141H_VAL 0x0000 +#define DDR_TIMING_142H_VAL 0x0000 +#define DDR_TIMING_143H_VAL 0x24b0 +#define DDR_TIMING_144H_VAL 0x3333 +#define DDR_TIMING_145H_VAL 0x3333 +#define DDR_TIMING_146H_VAL 0x0263 +#define DDR_TIMING_147H_VAL 0x1144 +#define DDR_TIMING_148H_VAL 0x0000 +#define DDR_TIMING_149H_VAL 0x1101 +#define DDR_TIMING_14AH_VAL 0x0001 +#define DDR_TIMING_14BH_VAL 0x0003 + + +#define DDR_TIMING_161H_VAL 0x0000 +#define DDR_TIMING_162H_VAL 0x0000 +#define DDR_TIMING_163H_VAL 0x24b0 +#define DDR_TIMING_164H_VAL 0x3333 +#define DDR_TIMING_165H_VAL 0x3333 +#define DDR_TIMING_166H_VAL 0x0263 +#define DDR_TIMING_167H_VAL 0x1144 +#define DDR_TIMING_168H_VAL 0x0000 +#define DDR_TIMING_169H_VAL 0x1101 +#define DDR_TIMING_16AH_VAL 0x0001 +#define DDR_TIMING_16BH_VAL 0x0003 + +#define DDR_TIMING_180H_VAL 0x6666 +#define DDR_TIMING_181H_VAL 0x3333 +#define DDR_TIMING_182H_VAL 0x3333 +#define DDR_TIMING_183H_VAL 0x3333 +#define DDR_TIMING_184H_VAL 0x3333 +#define DDR_TIMING_185H_VAL 0x3333 +#define DDR_TIMING_186H_VAL 0x3333 +#define DDR_TIMING_187H_VAL 0x3333 +#define DDR_TIMING_188H_VAL 0x0001 +#define DDR_TIMING_189H_VAL 0x0000 +#define DDR_TIMING_18AH_VAL 0x1144 +#define DDR_TIMING_18BH_VAL 0x0010 +#define DDR_TIMING_18CH_VAL 0x0000 + +#define DDR_TIMING_160H_VAL 0x0000 +#define DDR_TIMING_69H_VAL 0x0009 + diff --git a/include/rda/rda_panel_comm.h b/include/rda/rda_panel_comm.h new file mode 100644 index 0000000000..ab9e211d2b --- /dev/null +++ b/include/rda/rda_panel_comm.h @@ -0,0 +1,204 @@ +#ifndef __RDA_PANEL_COMM_H +#define __RDA_PANEL_COMM_H + +/* +**************************************************************** + please do not change the format + panle name should follow rule : mode_name + mode can be: rgb/mcu/dsi + name is the actual panel name +**************************************************************** +*/ +#define VGA_LCDD_DISP_X 480 +#define VGA_LCDD_DISP_Y 640 + +#define QVGA_LCDD_DISP_X 240 +#define QVGA_LCDD_DISP_Y 320 + +#define HVGA_LCDD_DISP_X 320 +#define HVGA_LCDD_DISP_Y 480 + +#define SVGA_LCDD_DISP_X 600 +#define SVGA_LCDD_DSIP_Y 800 + +#define WVGA_LCDD_DISP_X 480 +#define WVGA_LCDD_DISP_Y 800 + +#define WQVGA_LCDD_DISP_X 240 +#define WQVGA_LCDD_DISP_Y 400 + +#define FWVGA_LCDD_DISP_X 480 +#define FWVGA_LCDD_DISP_Y 854 + +#define FWQVGA_LCDD_DSIP_X 240 +#define FWQVGA_LCDD_DSIP_Y 432 + +#define SWVGA_LCDD_DISP_X 600 +#define SWVGA_LCDD_DISP_Y 1024 + +#define HD_LCDD_DISP_X 720 +#define HD_LCDD_DISP_Y 1280 + +#define qHD_LCDD_DISP_X 540 +#define qHD_LCDD_DISP_Y 960 + +#define QHD_LCDD_DISP_X 1440 +#define QHD_LCDD_DISP_Y 2560 + +#define AUTO_LCDD_WVGA_DISP_X 480 +#define AUTO_LCDD_WVGA_DISP_Y 800 + +/* definition for panel ili9486l */ +#define ILI9486L_PANEL_NAME "rgb_ili9486l" + +/* definition for panel ili9488l */ +#define ILI9488L_PANEL_NAME "rgb_ili9488l" + +/* definition for panel ili9488l */ +#define ILI9488L_MCU_PANEL_NAME "mcu_ili9488l" + +/* definition for panel ili9488l */ +#define ILI9488_MCU_PANEL_NAME "mcu_ili9488" + +/* definition for panel r61581b */ +#define R61581B_MCU_PANEL_NAME "mcu_r61581b" + +/* definition for panel rm68140 */ +#define RM68140_MCU_PANEL_NAME "mcu_rm68140" + +/* definition for panel ili9806c */ +#define ILI9806C_PANEL_NAME "rgb_ili9806c" + +/* definition for panel ili9806h mcu */ +#define ILI9806H_MCU_PANEL_NAME "mcu_ili9806h" + +#define ILI9806G_MCU_PANEL_NAME "mcu_ili9806g" + +/* definition for panel hx8664 */ +#define HX8664_PANEL_NAME "rgb_hx8664" + +/* definition for panel hx8363*/ +#define HX8363_MCU_PANEL_NAME "mcu_hx8363" + +/* definition for panel truly1p6365 */ +#define TRYLYLP6365_PANEL_NAME "rgb_truly1p6365" + +/* definition for panel nt35510 */ +#define NT35510_PANEL_NAME "rgb_nt35510" +#define NT35510_MCU_PANEL_NAME "mcu_nt35510" + +/* definition for panel nt35510s */ +#define NT35510S_MCU_PANEL_NAME "mcu_nt35510s" + +/* definition for panel nt35510 */ +#define NT35310_PANEL_NAME "rgb_nt35310" +#define NT35310_MCU_PANEL_NAME "mcu_nt35310" + +/* definition for panel hx8357 */ +#define HX8357_MCU_PANEL_NAME "mcu_hx8357" + +/* definition for panel ili9327 */ +#define ILI9327_PANEL_NAME "mcu_ili9327" + +/* definition for panel kd070d10 */ +#define JB070SZ03A_PANEL_NAME "rgb_jb070sz03a" + +/* definition for panel kd070d10 */ +#define KD070D10_PANEL_NAME "rgb_kd070d10" + +/* definition for panel t50bmpl10 */ +#define T50BMPL10_PANEL_NAME "rgb_t50bmpl10" + +/* definition for panel wy070ml521cp18b */ +#define WY070ML521CP18B_PANEL_NAME "rgb_wy070ml521cp18b" + +/* definition for panel wy070ml521cp21a */ +#define WY070ML521CP21A_PANEL_NAME "rgb_wy070ml521cp21a" + +/* definition for panel r70 */ +#define R70_PANEL_NAME "rgb_r70" + +/* definition for panel otm8019a use mcu interface */ +#define OTM8019A_PANEL_NAME "rgb_otm8019a" + +/* definition for panel otm8019a use mipi interface */ +#define OTM8019A_MIPI_PANEL_NAME "mipi_otm8019a" +#define OTM8019A_BOE397_MIPI_PANEL_NAME "mipi_otm8019a_boe397" +#define OTM8019A_CPT45_MIPI_PANEL_NAME "mipi_otm8019a_cpt45" + +/* definition for panel jd9161ba */ +#define JD9161BA_PANEL_NAME "rgb_jd9161ba" + +/* definition for panel himax8379c */ +#define HIMAX_8379C_MIPI_PANEL_NAME "mipi_himax_8379c" +#define HX8379C_BOE397_MIPI_PANEL_NAME "mipi_hx8379c_boe397" +#define HX8379C_CPT45_MIPI_PANEL_NAME "mipi_hx8379c_cpt45" + +/* definition for panel rm68180 */ +#define RM68180_MCU_PANEL_NAME "mcu_rm68180" + +/* definition for panel st7796 */ +#define ST7796_MCU_PANEL_NAME "mcu_st7796" + +/* definition for panel rm68172 */ +#define RM68172_MIPI_PANEL_NAME "mipi_rm68172" + +/* definitoin for panel st7796s */ +#define ST7796S_BOE35_MIPI_PANEL_NAME "mipi_st7796s_boe35" + +/* definitoin for panel jd9161ba mipi */ +#define JD9161BA_MIPI_PANEL_NAME "mipi_jd9161ba" + +/* definition for panel sgt mipi */ +#define ILI9806E_MIPI_PANEL_NAME "mipi_ili9806e" + +/*define auto detect lcd panel*/ +#define AUTO_DET_LCD_PANEL_NAME "auto" + + +#define DEFAULT_PANEL_LIST " " +#define AUTO_DETECT_SUPPORTED_PANEL_NUM -1 +#define AUTO_DETECT_SUPPORTED_PANEL_LIST DEFAULT_PANEL_LIST + + +#define RDA_PANEL_SUPPORT_LIST \ + ILI9486L_PANEL_NAME \ + ILI9488L_PANEL_NAME \ + ILI9806C_PANEL_NAME \ + ILI9488_MCU_PANEL_NAME \ + RM68140_MCU_PANEL_NAME \ + R61581B_MCU_PANEL_NAME \ + HX8664_PANEL_NAME \ + HX8363_MCU_PANEL_NAME \ + HX8357_MCU_PANEL_NAME \ + TRYLYLP6365_PANEL_NAME \ + NT35510_PANEL_NAME \ + NT35510_MCU_PANEL_NAME \ + NT35310_MCU_PANEL_NAME \ + NT35510S_MCU_PANEL_NAME \ + ILI9327_PANEL_NAME \ + JB070SZ03A_PANEL_NAME \ + KD070D10_PANEL_NAME \ + T50BMPL10_PANEL_NAME \ + WY070ML521CP18B_PANEL_NAME \ + WY070ML521CP21A_PANEL_NAME \ + ILI9806H_MCU_PANEL_NAME \ + ILI9806G_MCU_PANEL_NAME \ + R70_PANEL_NAME \ + OTM8019A_PANEL_NAME \ + JD9161BA_PANEL_NAME \ + OTM8019A_MIPI_PANEL_NAME \ + RM68180_MCU_PANEL_NAME \ + ST7796_MCU_PANEL_NAME \ + RM68172_MIPI_PANEL_NAME \ + HX8379C_BOE397_MIPI_PANEL_NAME \ + OTM8019A_BOE397_MIPI_PANEL_NAME \ + ST7796S_BOE35_MIPI_PANEL_NAME \ + HX8379C_CPT45_MIPI_PANEL_NAME \ + OTM8019A_CPT45_MIPI_PANEL_NAME \ + JD9161BA_MIPI_PANEL_NAME \ + ILI9806E_MIPI_PANEL_NAME \ + AUTO_DET_LCD_PANEL_NAME + +#define ASPACE(S) S" " +#endif /* __TGT_AP_PANEL_SETTING_H */ diff --git a/include/rda/tgt_ap_board_config.h b/include/rda/tgt_ap_board_config.h new file mode 100644 index 0000000000..88c4e02a8f --- /dev/null +++ b/include/rda/tgt_ap_board_config.h @@ -0,0 +1,108 @@ +#ifndef _TGT_AP_BOARD_CFG_H_ +#define _TGT_AP_BOARD_CFG_H_ + +#define EXTRA_BOOTCOMMAND "selinux=1 androidboot.selinux=permissive" + +/* MEM Size, in MBytes */ +#define _TGT_AP_MEM_SIZE 256 +#define _TGT_AP_VPU_MEM_SIZE 16 +#define _TGT_AP_CAM_MEM_SIZE 4 +#define _TGT_AP_GFX_MEM_SIZE 0 +#define _TGT_AP_OS_MEM_SIZE 236 + +#define _TGT_AP_GFX_MEM_BASE (_TGT_AP_OS_MEM_SIZE) +#define _TGT_AP_CAM_MEM_BASE (_TGT_AP_GFX_MEM_BASE + _TGT_AP_GFX_MEM_SIZE) +#define _TGT_AP_VPU_MEM_BASE (_TGT_AP_CAM_MEM_BASE + _TGT_AP_CAM_MEM_SIZE) + +#if ((_TGT_AP_VPU_MEM_BASE + _TGT_AP_VPU_MEM_SIZE) != _TGT_AP_MEM_SIZE) +#error "Invalid memory size configuration" +#endif + +/* usb otg function */ +#define _TGT_AP_USB_OTG_ENABLE + +/* NAND clock in MHz */ +#define _TGT_AP_NAND_CLOCK (30000000) + +/* SPI NAND clock in MHz: 64000000/80000000/100000000*/ +#define _TGT_AP_SPI_NAND_CLOCK (80000000) +/* SPI NAND read delay from flash to controller */ +/* need change according different HW board */ +#define _TGT_AP_SPI_NAND_READDELAY (4) + +/* ADMMC clock */ +#define _TGT_AP_SDMMC1_MAX_FREQ (30000000)/*3*/ +#define _TGT_AP_SDMMC1_MCLK_INV (1) +#define _TGT_AP_SDMMC1_MCLK_ADJ (1) +#define _TGT_AP_SDMMC2_MAX_FREQ (20000000)/*2*/ +#define _TGT_AP_SDMMC2_MCLK_INV (1) +#define _TGT_AP_SDMMC2_MCLK_ADJ (3) +#define _TGT_AP_SDMMC3_MAX_FREQ (30000000)/*3*/ +#define _TGT_AP_SDMMC3_MCLK_ADJ (0) + +/* I2C clocks */ +#define _TGT_AP_I2C0_CLOCK (100000) +#define _TGT_AP_I2C1_CLOCK (400000) +#define _TGT_AP_I2C2_CLOCK (200000) + +/* + * I2C addresses (Only keep non-RDA peripherals ) + */ +#define _TGT_AP_I2C_BUS_ID_TS (2) +# define _DEF_I2C_ADDR_TS_GSL168X (0x40) +# define _DEF_I2C_ADDR_TS_MSG2133 (0x26) + +# define _DEF_I2C_ADDR_TS_FT6x06 (0x38) +# define _DEF_I2C_ADDR_TS_IT7252 (0x46) +# define _DEF_I2C_ADDR_TS_GTP868 (0x5d) +# define _DEF_I2C_ADDR_TS_ICN831X (0x40) +/* NO need to define ADDR, this is determined by customer driver */ +/* #define _TGT_AP_I2C_ADDR_TS */ + +#define _TGT_AP_I2C_BUS_ID_GSENSOR (2) +# define _DEF_I2C_ADDR_GSENSOR_MMA7760 (0x4c) +# define _DEF_I2C_ADDR_GSENSOR_STK8312 (0x3d) +# define _DEF_I2C_ADDR_GSENSOR_MMA865X (0x1D) +/* Notice : when SA0=1, the MMA8452 slave address is 0x1D, and when SA0 = 0, + the address is 0x1C */ +# define _DEF_I2C_ADDR_GSENSOR_MMA845X (0x1D) +# define _DEF_I2C_ADDR_GSENSOR_MXC622X (0x15) + +/* gsensor position to lcd */ +#define _TGT_AP_GSENSOR_POSITION 1 + +/* NO need to define ADDR, this is determined by customer driver */ +/* #define _TGT_AP_I2C_ADDR_GSENSOR */ + +#define _TGT_AP_I2C_BUS_ID_LSENSOR (2) +# define _DEF_I2C_ADDR_LSENSOR_STK3x1x (0x48) +/* NO need to define ADDR, this is determined by customer driver */ +/* #define _TGT_AP_I2C_ADDR_LSENSOR */ + +#define _TGT_AP_I2C_BUS_ID_WIFI (0) +/* No Address defination, as rda5990 address is not changable */ + +#define _TGT_AP_I2C_BUS_ID_ATV (0) +/* No Address defination, as rda5888 address is not changable */ + +#define _TGT_AP_I2C_BUS_ID_CAM (0) + +/* LED defination */ +#define _TGT_AP_LED_RED (1) +/* # define _TGT_AP_LED_RED_KB (1) */ +# define _TGT_AP_LED_RED_FLASH (1) +/* #define _TGT_AP_LED_GREEN (1)*/ +/* # define _TGT_AP_LED_GREEN_KB (1) */ +/* # define _TGT_AP_LED_GREEN_FLASH (1) */ +#define _TGT_AP_LED_BLUE (1) +# define _TGT_AP_LED_BLUE_KB (1) +/*# define _TGT_AP_LED_BLUE_FLASH (1) */ + +/*#define _TGT_AP_BOARD_HAS_ATV*/ + +#define CONFIG_SDMMC_BOOT 1 +#define _TGT_AP_VIBRATOR_POWER_ON (1) +# define _TGT_AP_VIBRATOR_TIME (300) + +#endif /*_TGT_AP_BOARD_CFG_H_*/ + diff --git a/include/rda/tgt_ap_clock_config.h b/include/rda/tgt_ap_clock_config.h new file mode 100644 index 0000000000..00afaa4fd9 --- /dev/null +++ b/include/rda/tgt_ap_clock_config.h @@ -0,0 +1,80 @@ +#ifndef _TGT_AP_CLOCK_CFG_H_ +#define _TGT_AP_CLOCK_CFG_H_ + +/* + * PLL Freqs + */ +#define _TGT_AP_PLL_CPU_FREQ (988) +#define _TGT_AP_PLL_BUS_FREQ (800) +#define _TGT_AP_PLL_MEM_FREQ (260) +#define _TGT_AP_PLL_USB_FREQ (480) + +/* + * DDR settings + */ +/* DDR clock rate (data rate double this number) */ +#define _TGT_AP_DDR_TYPE 2 +#if (_TGT_AP_PLL_MEM_FREQ == 400) \ + || (_TGT_AP_PLL_MEM_FREQ == 351) \ + || (_TGT_AP_PLL_MEM_FREQ == 312) \ + || (_TGT_AP_PLL_MEM_FREQ == 260) \ + || (_TGT_AP_PLL_MEM_FREQ == 290) \ + || (_TGT_AP_PLL_MEM_FREQ == 200) \ + || (_TGT_AP_PLL_MEM_FREQ == 156) \ + || (_TGT_AP_PLL_MEM_FREQ == 100) +#define _TGT_AP_DDR_CLOCK _TGT_AP_PLL_MEM_FREQ +#else +#error "Invalid DDR_CLOCK" +#endif +//#define _TGT_AP_DDR_LOWPWR +#define _TGT_AP_DDR_ODT (2) +#define _TGT_AP_DDR_RON (0) +#define _TGT_AP_DDR_CHIP_BITS (0) +/* DDR bus width, valid value are 8, 16 or 32 */ +#define _TGT_AP_DDR_WIDTH (32) +#if (_TGT_AP_DDR_WIDTH == 8) +#define _TGT_AP_DDR_MEM_BITS (0) +#elif (_TGT_AP_DDR_WIDTH == 16) +#define _TGT_AP_DDR_MEM_BITS (1) +#elif (_TGT_AP_DDR_WIDTH == 32) +#define _TGT_AP_DDR_MEM_BITS (2) +#else +#error "Invalid DDR WIDTH" +#endif +#define _TGT_AP_DDR_BANK_BITS (3) +#define _TGT_AP_DDR_ROW_BITS (3) +#define _TGT_AP_DDR_COL_BITS (1) + +/*DDR auto calibration function control */ +#define _TGT_AP_DDR_AUTO_CALI_ENABLE 1 + +/* DDR timing */ +//#include "ddr_timing/micron_16x1_260m_U04_R7629_zhangxian.h" +//#include "ddr_timing/8810m_16x2_260m_ddr2.h" +//#include "ddr_timing/8810m_16x2_290m_ddr2.h" +#if (_TGT_AP_PLL_MEM_FREQ == 260) +#include "ddr_timing/8810p_16x2_260m_ddr2_u08.h" +#elif (_TGT_AP_PLL_MEM_FREQ == 200) +#include "ddr_timing/8810p_16x2_200m_ddr2.h" +#elif (_TGT_AP_PLL_MEM_FREQ == 156) +#include "ddr_timing/8810p_16x2_156m_ddr2.h" +#else +#error "Invalid DDR_CLOCK" +#endif +/* + * CLK settings + */ +#define _TGT_AP_CLK_CPU (0x001F) +#define _TGT_AP_CLK_AXI (0x001E) +#define _TGT_AP_CLK_GCG (0x001E) +#define _TGT_AP_CLK_AHB1 (0x001A) +#define _TGT_AP_CLK_APB1 (0x001A) +#define _TGT_AP_CLK_APB2 (0x001A) +#define _TGT_AP_CLK_MEM (0x0000) +#define _TGT_AP_CLK_GPU (0x001A) +#define _TGT_AP_CLK_VPU (0x001C) +#define _TGT_AP_CLK_VOC (0x001A) +#define _TGT_AP_CLK_SFLSH (0x001D) + +#endif //_TGT_AP_CLOCK_CFG_H_ + diff --git a/include/rda/tgt_ap_flash_parts.h b/include/rda/tgt_ap_flash_parts.h new file mode 100644 index 0000000000..b69636b281 --- /dev/null +++ b/include/rda/tgt_ap_flash_parts.h @@ -0,0 +1,26 @@ +#ifndef __TGT_AP_FLASH_PARTS_H__ +#define __TGT_AP_FLASH_PARTS_H__ + +#define MTDPARTS_DEF \ + "2M@128K(bootloader)," \ + "2M(factorydata)," \ + "2M(misc)," \ + "4M(modem)," \ + "8M(boot)," \ + "10M(recovery)," \ + MTDPARTS_ANDROID_DEF + +#define MTDPARTS_ANDROID_DEF \ + "300M(system)," \ + "300M(vendor)," \ + "-(userdata)" + +/* +kernel need handle mtd from 0, so define a dummy partions whose +size is bootloader+factorydata+modem+boot+recovery +*/ +#define MTDPARTS_KERNEL_DEF \ + "28M@0(dummy)," \ + MTDPARTS_ANDROID_DEF +#endif + diff --git a/include/rda/tgt_ap_gpio_setting.h b/include/rda/tgt_ap_gpio_setting.h new file mode 100644 index 0000000000..97da0a16be --- /dev/null +++ b/include/rda/tgt_ap_gpio_setting.h @@ -0,0 +1,41 @@ +#ifndef _TGT_AP_GPIO_SETTING_H_ +#define _TGT_AP_GPIO_SETTING_H_ + +#define _TGT_AP_GPIO_TOUCH_RESET GPO_2 +#define _TGT_AP_GPIO_TOUCH_IRQ GPIO_B3 + +//#define _TGT_AP_GPIO_CAM_RESET +//#define _TGT_AP_GPIO_CAM_PWDN0 +//#define _TGT_AP_GPIO_CAM_PWDN1 GPIO_B3 //C23 in fact +//#define _TGT_AP_GPIO_CAM_FLASH +//#define _TGT_AP_GPIO_CAM_EN + +#define _TGT_AP_GPIO_MMC_HOTPLUG GPIO_B4 + +#define _TGT_AP_GPIO_LCD_RESET GPO_3 + +#define _TGT_AP_GPIO_HEADSET_DETECT GPIO_A7 + +//#define _TGT_AP_GPIO_USB_DETECT GPIO_B7 + +#define _TGT_AP_GPIO_VOLUME_UP GPIO_D6 +#define _TGT_AP_GPIO_VOLUME_DOWN GPIO_D5 + +#define _TGT_AP_GPIO_WIFI GPIO_B2 +#define _TGT_AP_GPIO_BT_HOST_WAKE GPIO_B1 + +#define _TGT_AP_GPIO_USBID_CTRL GPO_1 +#define _TGT_AP_GPIO_PLUGIN_CTRL GPIO_B5 + +/*#define _TGT_AP_GPIO_USB_ID GPIO_D7*/ +#define _TGT_AP_GPIO_OTG_DETECT GPIO_D7 +#define _TGT_AP_GPIO_USB_VBUS_SWITCH GPIO_A17 +/*#define _TGT_AP_GPIO_GSENSOR_WAKE GPIO_A2*/ +/* + + +#define _TGT_AP_GPIO_EXT_AUD_CLASSK_ENABLE GPIO_A3 +# define _TGT_AP_EXT_AUD_CLASSK_MODE 4 +*/ +#endif // _TGT_AP_GPIO_SETTING_H_ + diff --git a/include/rda/tgt_ap_headset_setting.h b/include/rda/tgt_ap_headset_setting.h new file mode 100644 index 0000000000..4a62cbdf99 --- /dev/null +++ b/include/rda/tgt_ap_headset_setting.h @@ -0,0 +1,67 @@ +#ifndef __TGT_AP_HEADSET_SETTING_H +#define __TGT_AP_HEADSET_SETTING_H + +/* notice + * 1. when ap do vmic gpadc detect, headset ( or headphone ) will be detected according to first gpadc value + * 2. when ap donot do vmic gpadc detect, headset ( or headphone ) will be treated as headset only ( for now ) + * 3. when ap donot do vmic gpadc detect, only on key will be processed. +*/ + +// used always +// open this if ap do gpadc detect, or modem will report key to ap ( only KEY_MEDIA now ) +#define AP_DETECT_VMIC_GPADC 1 + +// used when ap donot do gpadc detect +// key code ( input.h ) that report when key down or up +#define HEADSET_KEY_REPORT KEY_MEDIA + +// used always +// 0 means gpio low when no headset, or high +#define HEADSET_OUT_GPIO_STATE 1 + +// used when ap do gpadc detect +// VMIC gpadc channel +#define AP_VMIC_GPADC_CHANNEL 0 + +// used when ap do gpadc detect +// debounce value +#define HEADSET_GPADC_DEBOUNCE_VALUE 200 + +// used when ap do gpadc detect +// FIXME, should sync with modem PMD_POWER_ID_T +#define BP_PMD_POWER_EARPIECE 9 + +// used when ap do gpadc detect +// under this value ,we think this is a headphone +#define DETECT_HEADPHON_MAX_VALUE 0xFF + +// used when ap do gpadc detect +// when MODEM_REPORT_KEY_ADC define, we need give right min adc value and max adc value +// keycode in input.h (kernel) : min adc value : max adc value +#define HEADSET_KEY_CAPS \ + {KEY_MEDIA, 0x0, 0x70}, \ + {KEY_VOLUMEUP, 0x80, 0xC0}, \ + {KEY_VOLUMEDOWN, 0x130, 0x170}, + +// used when ap do gpadc detect +#define GPADC_DETECT_DELAY_MSECS 80 +// used when ap do gpadc detect +#define GPADC_DETECT_DEBOUNCE_DELAY_MSECS 60 + +// used always +// for irq debounce +#define GPIO_IRQ_DETECT_DEBOUNCE_DELAY_MSECS 200 + +// used always +// for out debounce +#define GPIO_OUT_DETECT_DEBOUNCE_DELAY_MSECS 200 + +//////////////////////////// need not change //////////////////////////////// +#define RDA_HEADSET_KEYPAD_NAME "rda-headset-keypad" +#define RDA_HEADSET_DETECT_NAME "h2w" + +#define RDA_HEADSET_DETECT_STATE_OUT "0" +#define RDA_HEADSET_DETECT_STATE_HEADSET "1" +#define RDA_HEADSET_DETECT_STATE_HEADPHONE "2" + +#endif diff --git a/include/rda/tgt_ap_panel_setting.h b/include/rda/tgt_ap_panel_setting.h new file mode 100644 index 0000000000..a414aedfe0 --- /dev/null +++ b/include/rda/tgt_ap_panel_setting.h @@ -0,0 +1,26 @@ +#ifndef __TGT_AP_PANEL_SETTING_H +#define __TGT_AP_PANEL_SETTING_H + +#include <rda/rda_panel_comm.h> + +/* *************************************************************** + * The above list all the panel rda support, the following line to + * select panel + *************************************************************** +*/ + +#define PANEL_NAME AUTO_DET_LCD_PANEL_NAME +#define PANEL_XSIZE WVGA_LCDD_DISP_X +#define PANEL_YSIZE WVGA_LCDD_DISP_Y + +/* for multiple panel support, user can set AUTO_DETECR_SUPPORTED_PANEL_NUM to -1 and let kernel lookup all panel */ +#undef AUTO_DETECT_SUPPORTED_PANEL_NUM +#undef AUTO_DETECT_SUPPORTED_PANEL_LIST + +#define AUTO_DETECT_SUPPORTED_PANEL_NUM 1 + +#define AUTO_DETECT_SUPPORTED_PANEL_LIST \ + ILI9806G_MCU_PANEL_NAME + +#define TARGET_AP_PANEL_ILI9806G_MCU 1 +#endif /* __TGT_AP_PANEL_SETTING_H */ diff --git a/include/rda/tgt_ap_ts_setting.h b/include/rda/tgt_ap_ts_setting.h new file mode 100644 index 0000000000..1f0cc48956 --- /dev/null +++ b/include/rda/tgt_ap_ts_setting.h @@ -0,0 +1,8 @@ +#ifndef __TGT_AP_TS_SETTING_H +#define __TGT_AP_TS_SETTING_H + +#include "rda_ts_comm.h" + +/* #define TGT_AP_TS_FW_RELOAD (1) */ + +#endif diff --git a/include/rda/tgt_app_cfg.h b/include/rda/tgt_app_cfg.h new file mode 100644 index 0000000000..26cfbee78d --- /dev/null +++ b/include/rda/tgt_app_cfg.h @@ -0,0 +1,91 @@ +//////////////////////////////////////////////////////////////////////////////// +// // +// Copyright (C) 2003-2009, Coolsand Technologies, Inc. // +// All Rights Reserved // +// // +// This source code is the property of Coolsand Technologies and is // +// confidential. Any modification, distribution, reproduction or // +// exploitation of any content of this file is totally forbidden, // +// except with the written permission of Coolsand Technologies. // +// // +//////////////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////////////// +// // +/// @file tgt_app_cfg.h // +/// That file describes the configuration of the application for this target // +// // +//////////////////////////////////////////////////////////////////////////////// + +#ifndef _TGT_APP_CFG_H_ +#define _TGT_APP_CFG_H_ +// Partition count. +#define DSM_PART_COUNT 2 +// ============================================================================= +// TGT_DSM_PART_CONFIG +// ----------------------------------------------------------------------------- +// This structure describes the DSM(Data Storage Mangage) configuration. +/// Field description: +/// szPartName: Partition name string,the max size is 15 bytes. +/// eDevType: can be either DSM_MEM_DEV_FLASH for onboard flash combo or DSM_MEM_DEV_TFLASH +/// eCheckLevel: VDS Module cheking level. +// DSM_CHECK_LEVEL1: Check the PBD writing and PB Writing. +// DSM_CHECK_LEVEL2: Check the PDB writing only. +// DSM_CHECK_LEVEL3: Not check. +/// uSecCnt: Number of sector used by this partition (when relevant) +/// uRsvBlkCnt: Number of reseved block. When want the write speed speedy, increase this field value. +/// eModuleId: Module identification. +// DSM_MODULE_FS_ROOT: FS Moudle for root directory. +// DSM_MODULE_FS: FS Moudle for mounting device. +// DSM_MODULE_SMS: SMS_DM Module. +// DSM_MODULE_REG: REG Module +// ============================================================================= + +#define TGT_DSM_PART_CONFIG \ +{ \ + { \ + .szPartName = "VDS0", \ + .eDevType = DSM_MEM_DEV_FLASH, \ + .eCheckLevel = DSM_CHECK_LEVEL_1, \ + .uSecCnt = 3, \ + .uRsvBlkCnt = 1, \ + .eModuleId = DSM_MODULE_FS_ROOT \ + }, \ + { \ + .szPartName = "CSW", \ + .eDevType = DSM_MEM_DEV_FLASH, \ + .eCheckLevel = DSM_CHECK_LEVEL_1, \ + .uSecCnt = 27, \ + .uRsvBlkCnt = 1, \ + .eModuleId = DSM_MODULE_CSW \ + }, \ +} + +#define TGT_DSM_CONFIG \ +{ \ + .dsmPartitionInfo = TGT_DSM_PART_CONFIG , \ + .dsmPartitionNumber = DSM_PART_COUNT \ +} + + +// ============================================================================= +// TGT_CSW_MEM_CONFIG +// ----------------------------------------------------------------------------- +/// This structure describes the user heap size +/// cswHeapSize: Size of the heap available for csw +/// cosHeapSize: Size of the heap available for mmi +// ============================================================================= +#define TGT_CSW_CONFIG \ +{ \ + .cswHeapSize = 400*1024, \ + .cosHeapSize = 650*1024 \ +} + +// ============================================================================= +// TGT_UCTLS_CONFIG +// ----------------------------------------------------------------------------- +/// Default List of services +// ============================================================================= +#include "uctls_tgt_params.h" + + +#endif //_TGT_APP_CFG_H_ diff --git a/include/rda/tgt_board_cfg.h b/include/rda/tgt_board_cfg.h new file mode 100644 index 0000000000..09e82a55f2 --- /dev/null +++ b/include/rda/tgt_board_cfg.h @@ -0,0 +1,726 @@ +//////////////////////////////////////////////////////////////////////////////// +// // +// Copyright (C) 2003-2007, Coolsand Technologies, Inc. // +// All Rights Reserved // +// // +// This source code is the property of Coolsand Technologies and is // +// confidential. Any modification, distribution, reproduction or // +// exploitation of any content of this file is totally forbidden, // +// except with the written permission of Coolsand Technologies. // +// // +//////////////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////////////// +// // +/// @file tgt_board_config.h +/// That file describes the configuration of the board drivers for the specific +/// gallite g33 target. +// // +//////////////////////////////////////////////////////////////////////////////// + +#ifndef _TGT_BOARD_CFG_H_ +#define _TGT_BOARD_CFG_H_ + + + +// ############################################################################# +// # # +// # CHIP AND MANDATORY DRIVERS # +// # # +// ############################################################################# + + + + +// ============================================================================= +// TGT_HAL_CONFIG +// ============================================================================= +#include "tgt_gpio_setting.h" + +// ============================================================================= +// Chip version +// ============================================================================= +#define TGT_HAL_CHIP_VERSION 1 + +// ============================================================================= +// RF CLK FREQUENCY +// ============================================================================= +#define TGT_HAL_RF_CLK_FREQ HAL_SYS_FREQ_26M + +// ============================================================================= +// TGT_HAL_CAM_CFG +// ----------------------------------------------------------------------------- +// This fills the structure HAL_CFG_CAM_T +// ============================================================================= +#ifndef TGT_HAL_CAM_CFG +#define TGT_HAL_CAM_CFG \ +{ \ + .camUsed = TRUE, \ + .camRstActiveH = FALSE, \ + .camPdnActiveH = TRUE, \ + .camPdnRemap = GPIO_NONE, \ + .camRstRemap = GPIO_NONE, \ + .camCsiId = HAL_CAM_CSI_NONE, \ + .cam1Used = FALSE, \ + .cam1RstActiveH = FALSE, \ + .cam1PdnActiveH = TRUE, \ + .cam1PdnRemap = GPIO_NONE, \ + .cam1RstRemap = GPIO_NONE, \ + .cam1CsiId = HAL_CAM_CSI_NONE, \ + .camMode = HAL_CAM_MODE_PARALLEL, \ +} +#endif + +// ============================================================================= +// TGT_HAL_PWM_CFG +// ----------------------------------------------------------------------------- +/// This structure describes the PWM configuration for a given target. +/// The first field identify which PWL is used for GLOW (if any). +/// The lasts fields tell wether the pin corresponding to PWM output +/// is actually used as PWM output and not as something else (for +/// instance as a GPIO). +// ============================================================================= +#ifndef TGT_HAL_PWM_CFG +#define TGT_HAL_PWM_CFG \ +{ \ + .pwl0Used = TRUE, \ + .pwl1Used = FALSE, \ + .pwtUsed = FALSE, \ + .lpgUsed = FALSE \ +} +#endif + +// ============================================================================= +// HAL_CFG_I2C_T +// ----------------------------------------------------------------------------- +/// This structure describes the I2C configuration for a given target. The +/// fields tell wether the corresponding I2C pins are actually used +/// for I2C and not as something else (for instance as a GPIO). +// ============================================================================= +#ifndef TGT_HAL_I2C_CFG +#define TGT_HAL_I2C_CFG \ +{ \ + .i2cUsed = TRUE, \ + .i2c2Used = TRUE, \ + .i2c2PinsCam = FALSE, \ + .i2c3Used = TRUE, \ +} +#endif + +// ============================================================================= +// TGT_HAL_I2S_CFG +// ----------------------------------------------------------------------------- +/// This structure describes the I2S configuration for a given target. The +/// fields tell wether the corresponding I2S pin is actually used +/// for I2S and not as something else (for instance as a GPIO). +// ============================================================================= +#ifndef TGT_HAL_I2S_CFG +#define TGT_HAL_I2S_CFG \ +{ \ + .doUsed = TRUE, \ + .di0Used = TRUE, \ + .di1Used = FALSE, \ + .di2Used = FALSE, \ +} +#endif + +// ============================================================================= +// TGT_HAL_UART_CFG +// ----------------------------------------------------------------------------- +/// Used to describes a configuration for used pin by an UART for a given target. +// ============================================================================= +#ifndef TGT_HAL_UART_CFG +#define TGT_HAL_UART_CFG \ +{ \ + HAL_UART_CONFIG_FLOWCONTROL, \ + HAL_UART_CONFIG_DATA, \ + HAL_UART_CONFIG_FLOWCONTROL, \ +} +#endif + +// ============================================================================= +// TGT_HAL_MODEM_SPI_CFG +// ----------------------------------------------------------------------------- +/// This structure describes the SPI configuration for a given target. The first +/// fields tell wether the pin corresponding to chip select is actually used +/// as a chip select and not as something else (for instance as a GPIO). +/// Then, the polarity of the Chip Select is given. It is only relevant +/// if the corresponding Chip Select is used as a Chip Select. +/// Finally which pin is used as input, Can be none, one or the other. +/// On most chip configuration the input 0 (di0) is on the output pin: SPI_DIO +// ============================================================================= +#ifndef TGT_HAL_MODEM_SPI_CFG +#define TGT_HAL_MODEM_SPI_CFG \ +{ \ + { \ + .cs0Used = FALSE, \ + .cs1Used = FALSE, \ + .cs2Used = FALSE, \ + .cs3Used = FALSE, \ + .cs0ActiveLow = TRUE, \ + .cs1ActiveLow = TRUE, \ + .cs2ActiveLow = TRUE, \ + .cs3ActiveLow = TRUE, \ + .di0Used = TRUE, \ + .di1Used = FALSE, \ + }, \ +} +#endif + +// ============================================================================= +// TGT_HAL_SPI_CFG +// ----------------------------------------------------------------------------- +/// This structure describes the SPI configuration for a given target. The first +/// fields tell wether the pin corresponding to chip select is actually used +/// as a chip select and not as something else (for instance as a GPIO). +/// Then, the polarity of the Chip Select is given. It is only relevant +/// if the corresponding Chip Select is used as a Chip Select. +/// Finally which pin is used as input, Can be none, one or the other. +/// On most chip configuration the input 0 (di0) is on the output pin: SPI_DIO +// ============================================================================= +#ifndef TGT_HAL_SPI_CFG +#define TGT_HAL_SPI_CFG \ +{ \ + { \ + .cs0Used = FALSE, \ + .cs1Used = FALSE, \ + .cs2Used = FALSE, \ + .cs3Used = FALSE, \ + .cs0ActiveLow = TRUE, \ + .cs1ActiveLow = TRUE, \ + .cs2ActiveLow = TRUE, \ + .cs3ActiveLow = TRUE, \ + .di0Used = TRUE, \ + .di1Used = FALSE, \ + }, \ + { \ + .cs0Used = FALSE, \ + .cs1Used = FALSE, \ + .cs2Used = FALSE, \ + .cs3Used = FALSE, \ + .cs0ActiveLow = TRUE, \ + .cs1ActiveLow = TRUE, \ + .cs2ActiveLow = TRUE, \ + .cs3ActiveLow = TRUE, \ + .di0Used = TRUE, \ + .di1Used = FALSE, \ + }, \ +} +#endif + +// ============================================================================= +// TGT_HAL_SDMMC_CFG +// ----------------------------------------------------------------------------- +/// This structure describes the SDMMC configuration for a given target. The +/// fields tell wether the corresponding I2S pin is actually used +/// for I2S and not as something else (for instance as a GPIO). +// ============================================================================= +#ifndef TGT_HAL_SDMMC_CFG +#define TGT_HAL_SDMMC_CFG \ +{ \ + .sdmmcUsed = TRUE, \ + .sdmmc2Used = TRUE, \ + .sdmmc3Used = TRUE, \ +} +#endif + +// ============================================================================= +// TGT_HAL_GOUDA_CFG +// ----------------------------------------------------------------------------- +/// This structure describes the GOUDA configuration for a given target. +/// The first fields tell wether the pin corresponding to chip select is +/// actually used as a chip select and not as something else (for instance +/// as a GPIO). If none are used, the GOUDA is considered unused. +// ============================================================================= +#ifndef TGT_HAL_GOUDA_CFG +#define TGT_HAL_GOUDA_CFG \ +{ \ + .cs0Used = TRUE, \ + .cs1Used = FALSE, \ + .lcd16_23Cam = FALSE, \ + .lcdMode = HAL_LCD_MODE_PARALLEL_16BIT, \ +} +#endif + +// ============================================================================= +// TGT_HAL_IO_DRIVE +// ----------------------------------------------------------------------------- +/// This structure describes the IO Drive configuration for a given target. +// ============================================================================= +#ifndef TGT_HAL_IO_DRIVE +#define TGT_HAL_IO_DRIVE \ +{ \ + { \ + .vDdrDomain = 4, \ + .vPsram1Domain = 4, \ + .vPsram2Domain = 4, \ + .vNFlashDomain = 2, \ + .vLcd1Domain = 4, \ + .vLcd2Domain = 4, \ + .vSDat1Domain = 3, \ + .vSDat2Domain = 3, \ + .vCamDomain = 0, \ + .vSim1Domain = 0, \ + .vSim2Domain = 0, \ + .vSim3Domain = 0, \ + .vGpioDomain = 0, \ + } \ +} +#endif + +// ============================================================================= +// TGT_HAL_CONFIG +// ============================================================================= +#ifndef TGT_HAL_CONFIG +#define TGT_HAL_CONFIG \ +{ \ + .chipVersion = TGT_HAL_CHIP_VERSION, \ + .rfClkFreq = TGT_HAL_RF_CLK_FREQ, \ + .useLpsCo1 = FALSE, \ + .keyInMask = 0x00, \ + .keyOutMask = 0x00, \ + .pwmCfg = TGT_HAL_PWM_CFG, \ + .i2cCfg = TGT_HAL_I2C_CFG, \ + .i2sCfg = TGT_HAL_I2S_CFG, \ + .uartCfg = TGT_HAL_UART_CFG, \ + .modemSpiCfg = TGT_HAL_MODEM_SPI_CFG, \ + .spiCfg = TGT_HAL_SPI_CFG, \ + .sdmmcCfg = TGT_HAL_SDMMC_CFG, \ + .camCfg = TGT_HAL_CAM_CFG, \ + .goudaCfg = TGT_HAL_GOUDA_CFG, \ + .parallelNandUsed = -1, \ + .hostUartUsed = FALSE, \ + .hostClkUsed = FALSE, \ + .clkOutUsed = TRUE, \ + .useClk32k = FALSE, \ + .noConnectGpio_C = TGT_HAL_NO_CONNECT_GPIO_C, \ + .usedGpio_C = TGT_HAL_USED_GPIO_C, \ + .usedTco = TGT_HAL_USED_TCO, \ + .noConnectGpio_A = TGT_AP_HAL_NO_CONNECT_GPIO_A, \ + .usedGpio_A = TGT_AP_HAL_USED_GPIO_A, \ + .usedGpo_A = TGT_AP_HAL_USED_GPO_A, \ + .noConnectGpio_B = TGT_AP_HAL_NO_CONNECT_GPIO_B, \ + .usedGpio_B = TGT_AP_HAL_USED_GPIO_B, \ + .noConnectGpio_D = TGT_AP_HAL_NO_CONNECT_GPIO_D, \ + .usedGpio_D = TGT_AP_HAL_USED_GPIO_D, \ + .ioDrive = TGT_HAL_IO_DRIVE \ +} +#endif + + +// ============================================================================= +// KEY Mapping +// ============================================================================= +#ifndef KEY_MAP + +#define KEY_ROW_NUM 8 +#define KEY_COL_NUM 8 + +#define TGT_KEY_NB (KEY_ROW_NUM * KEY_COL_NUM) + +#define KEY_MAP \ +{ \ + KP_STAR, KP_7, KP_4, KP_1, KP_UP , KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, \ + KP_0, KP_8, KP_5, KP_2, KP_DW, KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, \ + KP_POUND,KP_9, KP_6, KP_3, KP_RT , KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, \ + KP_DEL, KP_SR, KP_BACK ,KP_OK ,KP_LT , KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, \ + KP_FM, KP_SL, KP_UNMAPPED, KP_UNMAPPED, KP_VD, KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, \ + KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, \ + KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, \ + KP_SND, KP_END, KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, KP_UNMAPPED, \ +} +#endif // KEY_MAP + + +#ifndef KEY_BOOT_DOWNLOAD + +#define KEY_BOOT_DOWNLOAD { KP_0, KP_OK, } + +#endif // KEY_BOOT_DOWNLOAD + + +// ============================================================================= +// RFD config +// ============================================================================= +#ifndef TGT_RFD_CONFIG +#define TGT_RFD_CONFIG + +#include "hal_tcu.h" +#define TGT_XCV_CONFIG {.RST = TCO_UNUSED, .PDN = TCO(11) } +#define TGT_PA_CONFIG {.ENA = TCO_UNUSED, .TXEN = TCO_UNUSED, .BS = TCO_UNUSED } +#define TGT_SW_CONFIG {.SW1 = TCO(2), .SW2 = TCO(3), .SW3 = TCO(4) } + +// Note: Some XCV maybe have different control pin names, so someone who develop +// the target configuration should explain the pin usage as below. +// +// FIXME Fix that with proper knowledge ! +// PA->ENA is VLOGIC pin for SKY77518, MODEN for TQM4002, MOD for RDA6216 +// PA-TXEN is BIAS for RDA6216 ? +// +#endif // TGT_RFD_CONFIG + + +// ============================================================================= +// PMD config +// ----------------------------------------------------------------------------- +/// This fills the structure PMD_CONFIG_T +// ============================================================================= +#ifndef TGT_PMD_CONFIG + +#define TGT_PMD_CONFIG \ + { \ + .power = \ + { \ + { /* PMD_POWER_MIC : Micro bias enable */ \ + .ldo = { .opal = PMD_LDO_MIC}, \ + .polarity = TRUE, \ + .shared = TRUE, /* with PMD_POWER_EARPIECE */ \ + .powerOnState = FALSE, \ + }, \ + { /* PMD_POWER_CAMERA : Camera LDO enable */ \ + .ldo = { .opal = PMD_LDO_CAM|PMD_LDO_RF}, \ + .polarity = TRUE, \ + .shared = FALSE, \ + .powerOnState = FALSE, \ + }, \ + { /* PMD_POWER_AUDIO : Audio LDO enable */ \ + .ldo = { .opal = PMD_LDO_ABB}, \ + .polarity = TRUE, \ + .shared = FALSE, \ + .powerOnState = FALSE, \ + }, \ + { /* PMD_POWER_STEREO_DAC : Stereo DAC LDO enable */ \ + .ldo = { .opal = PMD_LDO_NONE}, \ + .polarity = TRUE, \ + .shared = FALSE, \ + .powerOnState = FALSE, \ + }, \ + { /* PMD_POWER_LOUD_SPEAKER : Loud Speaker enable */ \ + .ldo = { .pin = { .gpioId = HAL_GPIO_NONE/*1*/ } }, \ + .polarity = TRUE, \ + .shared = FALSE, \ + .powerOnState = FALSE, \ + }, \ + { /* PMD_POWER_PA : RF Power Amplifier */ \ + .ldo = { .opal = PMD_LDO_NONE}, \ + .polarity = TRUE, \ + .shared = FALSE, \ + .powerOnState = FALSE, \ + }, \ + { /* PMD_POWER_USB : USB LDOs enable */ \ + .ldo = { .opal = PMD_LDO_USB}, \ + .polarity = TRUE, \ + .shared = FALSE, \ + .powerOnState = FALSE, \ + }, \ + { /* PMD_POWER_SDMMC : SD/MMC LDO enable */ \ + .ldo = { .opal = PMD_LDO_MMC}, \ + .polarity = TRUE, \ + .shared = FALSE, \ + .powerOnState = FALSE, \ + }, \ + { /* PMD_POWER_FM : FM LDO enable */ \ + .ldo = { .opal = PMD_LDO_ABB}, \ + .polarity = TRUE, \ + .shared = FALSE, \ + .powerOnState = FALSE, \ + }, \ + { /* PMD_POWER_EARPIECE : Ear Piece Micro bias enable */\ + .ldo = { .opal = PMD_LDO_MIC}, \ + .polarity = TRUE, \ + .shared = TRUE, /* with PMD_POWER_MIC */ \ + .powerOnState = FALSE, \ + }, \ + { /* PMD_POWER_BT : BlueTooth LDOs enable */ \ + .ldo = { .opal = PMD_LDO_NONE}, \ + .polarity = TRUE, \ + .shared = FALSE, \ + .powerOnState = FALSE, \ + }, \ + { /* PMD_POWER_CAMERA_FLASH : Camera Flash Light enable */ \ + .ldo = { .pin = {.gpoId = HAL_GPO_0}}, \ + .polarity = TRUE, \ + .shared = FALSE, \ + .powerOnState = FALSE, \ + }, \ + { /* PMD_POWER_LCD : (main) LCD LDO enable */ \ + .ldo = { .opal = PMD_LDO_LCD|PMD_LDO_RF}, \ + .polarity = TRUE, \ + .shared = FALSE, \ + .powerOnState = FALSE, \ + }, \ + { /* PMD_POWER_I2C : I2C LDO enable */ \ + /* Inside this chip, if I2C2 is used, and it is */ \ + /* multiplexed on camera pins, PMD_LDO_CAM must */ \ + /* be specified here to supply power to I2C2 I/O. */ \ + /* On this board, if any LDO (except for always-on */ \ + /* LDOs like vPad) supplies power to I2C pull-up */ \ + /* resistor, it must be specified here too. */ \ + .ldo = { .opal = PMD_LDO_NONE}, \ + .polarity = TRUE, \ + .shared = FALSE, \ + .powerOnState = FALSE, \ + }, \ + }, \ + .level = \ + { \ + { /* PMD_LEVEL_SIM : Sim class voltage */ \ + .type = PMD_LEVEL_TYPE_NONE, \ + .ldo = { .opal = PMD_LDO_NONE}, \ + .powerOnState = 0, \ + }, \ + { /* PMD_LEVEL_KEYPAD : KeyPad Back Light level */ \ + .type = PMD_LEVEL_TYPE_OPAL, \ + .ldo = { .pin = { .gpoId = HAL_GPO_NONE}}, \ + .powerOnState = 0, \ + }, \ + { /* PMD_LEVEL_LCD : (main) LCD Back Light level*/ \ + .type = PMD_LEVEL_TYPE_BACKLIGHT, \ + .ldo = { .opal = PMD_LDO_NONE}, \ + .powerOnState = 0, \ + }, \ + { /* PMD_LEVEL_SUB_LCD : Sub LCD Back Light level */ \ + .type = PMD_LEVEL_TYPE_NONE, \ + .ldo = { .opal = PMD_LDO_NONE}, \ + .powerOnState = 0, \ + }, \ + { /* PMD_LEVEL_LED0 : LED0 Light level */ \ + .type = PMD_LEVEL_TYPE_OPAL, \ + .ldo = { .opal = PMD_LDO_NONE}, \ + .powerOnState = 0, \ + }, \ + { /* PMD_LEVEL_LED1 : LED1 Light level */ \ + .type = PMD_LEVEL_TYPE_OPAL, \ + .ldo = { .opal = PMD_LDO_NONE}, \ + .powerOnState = 0, \ + }, \ + { /* PMD_LEVEL_LED2 : LED2 Light level */ \ + .type = PMD_LEVEL_TYPE_OPAL, \ + .ldo = { .opal = PMD_LDO_NONE}, \ + .powerOnState = 0, \ + }, \ + { /* PMD_LEVEL_LED3 : LED3 Light level */ \ + .type = PMD_LEVEL_TYPE_OPAL, \ + .ldo = { .pin = { .gpioId = HAL_GPIO_NONE}}, \ + .powerOnState = 0, \ + }, \ + { /* PMD_LEVEL_VIBRATOR : Vibrator control level */ \ + .type = PMD_LEVEL_TYPE_LDO, \ + .ldo = { .opal = PMD_LDO_VIBR}, \ + .powerOnState = 0, \ + }, \ + { /* PMD_LEVEL_LOUD_SPEAKER : loudspeaker gain */ \ + .type = PMD_LEVEL_TYPE_NONE, \ + .ldo = { .opal = PMD_LDO_NONE}, \ + .powerOnState = 0, \ + }, \ + }, \ + /* If any LDO is configured in ldoEnableNormal, it cannot */ \ + /* be controlled as a POWER or LEVEL LDO any more. */ \ + .ldoEnableNormal = 0, \ + .ldoEnableLowPower = 0, \ + .ldoCamIs2_8 = TRUE, \ + .ldoLcdIs2_8 = TRUE, \ + .ldoMMCIsHigh = TRUE, \ + .ldoIbrIsHigh = FALSE, \ + .ldoRfIs2_8 = TRUE, \ + .ldoPadIs2_8 = TRUE, \ + .lowerVPadLowPower = FALSE, \ + .vBuck1LowPower = 6, \ + .vBuck3LowPower = 12, \ + .vBuck4Usage = PMD_VBUCK4_USAGE_2P8V, \ + .vBuck4LowPower = 13, \ + .vSim3Usage = PMD_VSIM3_USAGE_2P8V_ALWAYS_ON, \ + .batteryGpadcChannel = HAL_ANA_GPADC_CHAN_7, \ + .batteryLevelChargeTermMV = 4200, \ + .batteryLevelRechargeMV = 4160, \ + .batteryLevelFullMV = 4160, \ + .batteryChargeTimeout = 6 HOURS, \ + .batteryOffsetHighActivityMV = 45, \ + .batteryOffsetPowerDownChargeMV = -150, \ + .powerOnVoltageMV = 3400, \ + .powerDownVoltageMV = 3400, \ + .batteryChargeCurrent = PMD_CHARGER_1200MA, \ + .batteryChargeCurrentOnUsb = PMD_CHARGER_1200MA, \ + .batteryTsDetect = FALSE, \ + .chargerGpadcChannel = HAL_ANA_GPADC_CHAN_6, \ + .chargerLevelUpperLimit = 6500, \ + .chargerOffsetBackToNormal = -200, \ + .temperatureGpadcChannel = HAL_ANA_GPADC_CHAN_1, \ + .temperatureUpperLimit = 0, \ + .temperatureOffsetBackToNormal = -7, \ + .batteryMVScreenAntiFlicker = 3600, \ + .batteryOffsetScreenNormal = 100, \ + .earpieceDetectGpio = HAL_GPIO_NONE, \ + .earpieceGpadcChannel = HAL_ANA_GPADC_CHAN_0, \ + } + +#define TGT_PMD_BATT_CAP_CURVE_STEP_MV 20 + +#define TGT_PMD_BATT_CAP_CURVE_ARRAY \ + { 0, 0, 0, 0, 0, 0, 1, 3, 6, 8, \ + 9, 10, 11, 12, 14, 18, 24, 30, 36, 42, \ + 48, 53, 58, 63, 66, 71, 75, 78, 80, 83, \ + 85, 87, 89, 91, 93, 95, 97, 99, 100 } + +#define TGT_PMD_TEMPERATURE_CURVE_ARRAY \ + { { 50, 33220 }, { 57, 25060 } } + +#endif // TGT_PMD_CONFIG + + +// ============================================================================= +// TGT_AUD_CONFIG +// ----------------------------------------------------------------------------- +/// Audio interface configuration +// ============================================================================= +#ifndef TGT_AUD_CONFIG +#define TGT_AUD_CONFIG + +#define TGT_AUD_CONFIG_RECEIVER_DRIVER CodecGallite // Ti +#define TGT_AUD_CONFIG_RECEIVER_PARAM 0 +#define TGT_AUD_CONFIG_RECEIVER_OUTPUT_PATH AUD_SPK_RECEIVER +#define TGT_AUD_CONFIG_RECEIVER_OUTPUT_TYPE AUD_SPEAKER_STEREO +#define TGT_AUD_CONFIG_RECEIVER_INPUT_PATH AUD_MIC_RECEIVER + +#define TGT_AUD_CONFIG_EAR_PIECE_DRIVER CodecGallite // Ti +#define TGT_AUD_CONFIG_EAR_PIECE_PARAM 0 +#define TGT_AUD_CONFIG_EAR_PIECE_OUTPUT_PATH AUD_SPK_EAR_PIECE +#define TGT_AUD_CONFIG_EAR_PIECE_OUTPUT_TYPE AUD_SPEAKER_STEREO +#define TGT_AUD_CONFIG_EAR_PIECE_INPUT_PATH AUD_MIC_EAR_PIECE + +#define TGT_AUD_CONFIG_LOUD_SPEAKER_DRIVER CodecGallite // Ti +#define TGT_AUD_CONFIG_LOUD_SPEAKER_PARAM 0 +#define TGT_AUD_CONFIG_LOUD_SPEAKER_OUTPUT_PATH AUD_SPK_LOUD_SPEAKER //AUD_SPK_EAR_PIECE +#define TGT_AUD_CONFIG_LOUD_SPEAKER_OUTPUT_TYPE AUD_SPEAKER_STEREO +#define TGT_AUD_CONFIG_LOUD_SPEAKER_INPUT_PATH AUD_MIC_LOUD_SPEAKER + +#define TGT_AUD_CONFIG_BT_DRIVER Bt +#define TGT_AUD_CONFIG_BT_PARAM 0 +#define TGT_AUD_CONFIG_BT_OUTPUT_PATH AUD_SPK_EAR_PIECE +#define TGT_AUD_CONFIG_BT_OUTPUT_TYPE AUD_SPEAKER_STEREO +#define TGT_AUD_CONFIG_BT_INPUT_PATH AUD_MIC_RECEIVER + +#define TGT_AUD_CONFIG_FM_DRIVER Fm +#define TGT_AUD_CONFIG_FM_PARAM 0 +#define TGT_AUD_CONFIG_FM_OUTPUT_PATH AUD_SPK_EAR_PIECE +#define TGT_AUD_CONFIG_FM_OUTPUT_TYPE AUD_SPEAKER_STEREO +#define TGT_AUD_CONFIG_FM_INPUT_PATH AUD_MIC_RECEIVER + +//atv aud config +#define TGT_AUD_CONFIG_TV_DRIVER Tv +#define TGT_AUD_CONFIG_TV_PARAM 0 +#define TGT_AUD_CONFIG_TV_OUTPUT_PATH AUD_SPK_EAR_PIECE +#define TGT_AUD_CONFIG_TV_OUTPUT_TYPE AUD_SPEAKER_STEREO +#define TGT_AUD_CONFIG_TV_INPUT_PATH AUD_MIC_RECEIVER + +#endif // TGT_AUD_CONFIG + + +// ############################################################################# +// # # +// # OPTIONNAL DRIVERS # +// # # +// ############################################################################# + +#ifdef TGT_WITH_TS_MODEL_rda1203_gallite +// ============================================================================= +// TSD config +// ----------------------------------------------------------------------------- +/// This fills the TSD_CONFIG_T structure +// ============================================================================= +#ifndef TGT_TSD_CONFIG +#define TGT_TSD_CONFIG \ + { \ + .penGpio = HAL_GPIO_NONE, \ + .debounceTime = 5*HAL_TICK1S/1000, \ + .downPeriod = 3, \ + .upPeriod = 3, \ + .maxError = 0x50 \ + } + +#endif // TGT_TSD_CONFIG +#endif // TGT_WITH_TS_MODEL_rda1203_gallite + +#ifdef TGT_WITH_TS_MODEL_rda8810_ap +#ifndef TGT_TSD_CONFIG +#define TGT_TSD_CONFIG \ + { \ + .penGpio = HAL_GPIO_2, \ + .debounceTime = 1*HAL_TICK1S/1000, \ + .downPeriod = 3, \ + .upPeriod = 3, \ + .maxError = 0x50 \ + } + +#endif // TGT_TSD_CONFIG +#endif // TGT_WITH_TS_MODEL_rda8810_ap + +#ifdef TGT_WITH_TS_MODEL_rda8810_ap_gtp868 +#ifndef TGT_TSD_CONFIG +#define TGT_TSD_CONFIG \ + { \ + .penGpio = HAL_GPIO_2, \ + .debounceTime = 1*HAL_TICK1S/1000, \ + .downPeriod = 3, \ + .upPeriod = 3, \ + .maxError = 0x50 \ + } + +#endif // TGT_TSD_CONFIG +#endif // TGT_WITH_TS_MODEL_rda8810_ap_gtp868 + +#ifdef TGT_WITH_TS_MODEL_ap_msg2133 +#ifndef TGT_TSD_CONFIG +#define TGT_TSD_CONFIG \ + { \ + .ts_Gpio_int = HAL_GPIO_1, \ + .ts_Gpio_rst = HAL_GPIO_24, \ + .rst_pd_level = 1, \ + .int_pd_level = 1, \ + .i2c_id = 0x26, \ + .ts_int_rise = FALSE, \ + } + +#endif // TGT_TSD_CONFIG +#endif // TGT_WITH_TS_MODEL_rda8810_ap_gtp868 + + +#ifdef TGT_WITH_GPIOI2C_MODEL_i2c_gpio +// ============================================================================= +// GPIO I2C config +// ----------------------------------------------------------------------------- +/// This fills the GPIOI2C CONFIG_T structure +// ============================================================================= +#ifndef TGT_GPIOI2C_CONFIG +#define TGT_GPIOI2C_CONFIG \ + { \ + .i2c_gpio_Bps = GPIO_I2C_BPS_80K , \ + .scl_i2c_gpio = HAL_GPIO_4 , \ + .scl_i2c_gpo = HAL_GPO_NONE , \ + .sda_i2c = HAL_GPIO_5 \ + } +#endif // TGT_GPIOI2C_CONFIG +#endif // TGT_WITH_GPIOI2C_MODEL_i2c_gpio + +// ?d config +// ----------------------------------------------------------------------------- +/// @todo add other driver configuration here if needed +// ============================================================================= + + +// ############################################################################# +// # # +// # SERVICES # +// # # +// ############################################################################# + + +// ============================================================================= +// ?s config +// ----------------------------------------------------------------------------- +/// @todo add other service configuration here if needed +// ============================================================================= + + +#endif //_TGT_BOARD_CFG_H_ + diff --git a/include/rda/tgt_gpio_setting.h b/include/rda/tgt_gpio_setting.h new file mode 100644 index 0000000000..829ea56b07 --- /dev/null +++ b/include/rda/tgt_gpio_setting.h @@ -0,0 +1,714 @@ +//////////////////////////////////////////////////////////////////////////////// +// // +// Copyright (C) 2003-2007, Coolsand Technologies, Inc. // +// All Rights Reserved // +// // +// This source code is the property of Coolsand Technologies and is // +// confidential. Any modification, distribution, reproduction or // +// exploitation of any content of this file is totally forbidden, // +// except with the written permission of Coolsand Technologies. // +// // +//////////////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////////////// +// // +/// @file tgt_ap_gpio_setting.h +/// That file describes the configuration of the AP board gpio setting for the specific +/// 8810 base target. +// // +//////////////////////////////////////////////////////////////////////////////// + +#ifndef __TGT_GPIO_SETTING_H__ +#define __TGT_GPIO_SETTING_H__ + +//Compare to BB_GPIO_mapping +#define AS_ALT_FUNC 0 +/// pin used as it's GPIO function +#define AS_GPIO 1 +/// GPIO not connected, set to driving 0 for low power +#define NOT_CONNECTED 2 + +// ----------------------------------------------------------------------------- +// GPIO(0) +#define TGT_HAL_GPIO_C_0_USED AS_GPIO +// GPIO(1) // GPIO_C1 INT:nil:nil:nil +#define TGT_HAL_GPIO_C_1_USED AS_GPIO +// GPIO(2) // GPIO_C2 INT:nil:nil:nil +#define TGT_HAL_GPIO_C_2_USED NOT_CONNECTED +// GPIO(3) // GPIO_C3 INT:nil:nil:nil +#define TGT_HAL_GPIO_C_3_USED NOT_CONNECTED +// GPIO(4) // GPIO_C4 INT:nil:nil:nil +#define TGT_HAL_GPIO_C_4_USED AS_GPIO +// GPIO(5) // GPIO_C5 INT:nil:nil:nil +#define TGT_HAL_GPIO_C_5_USED AS_GPIO +// GPIO(6) // UART1 Receive Data:nil:nil:nil +#define TGT_HAL_GPIO_C_6_USED AS_ALT_FUNC +// GPIO(7) // HST_RXD:GPIO_7:UART2_RXD-UART1_DTR +#define TGT_HAL_GPIO_C_7_USED AS_ALT_FUNC +// GPIO(8) // HST_TXD:GPIO_8:UART2_TXD-UART1 Data Carrier Detect +#define TGT_HAL_GPIO_C_8_USED AS_ALT_FUNC +// GPIO(9) // SD CLK:nil:nil:nil +#define TGT_HAL_GPIO_C_9_USED AS_ALT_FUNC +// GPIO(10) // SD CMD:nil:nil:nil +#define TGT_HAL_GPIO_C_10_USED AS_ALT_FUNC +// GPIO(11) // SD data0:nil:nil:nil +#define TGT_HAL_GPIO_C_11_USED AS_ALT_FUNC +// GPIO(12) // SD data1:nil:nil:nil +#define TGT_HAL_GPIO_C_12_USED AS_ALT_FUNC +// GPIO(13) // SD data2:nil:nil:nil +#define TGT_HAL_GPIO_C_13_USED AS_ALT_FUNC +// GPIO(14) // SD data3:nil:nil:nil +#define TGT_HAL_GPIO_C_14_USED AS_ALT_FUNC +// GPIO(15) // SD CLK:nil:nil:nil +#define TGT_HAL_GPIO_C_15_USED AS_ALT_FUNC +// GPIO(16) // SD CMD:nil:nil:nil +#define TGT_HAL_GPIO_C_16_USED AS_ALT_FUNC +// GPIO(17) // SD data0:nil:nil:nil +#define TGT_HAL_GPIO_C_17_USED AS_ALT_FUNC +// GPIO(18) // SD data1:nil:nil:nil +#define TGT_HAL_GPIO_C_18_USED AS_ALT_FUNC +// GPIO(19) // SD data2:nil:nil:nil +#define TGT_HAL_GPIO_C_19_USED AS_ALT_FUNC +// GPIO(20) // SD data3:nil:nil:nil +#define TGT_HAL_GPIO_C_20_USED AS_ALT_FUNC +// GPIO(21) // SPI1_CLK:SPI_BB_CLK:nil:nil +#define TGT_HAL_GPIO_C_21_USED AS_ALT_FUNC +// GPIO(22) // SPI1_CS_0:SPI_BB_CS_0:nil:nil +#define TGT_HAL_GPIO_C_22_USED AS_ALT_FUNC +// GPIO(23) // SPI1_DIO:SPI_BB_DIO:nil:nil +#define TGT_HAL_GPIO_C_23_USED AS_ALT_FUNC +// GPIO(24) // SPI1_DI:SPI_BB_DI:nil:nil +#define TGT_HAL_GPIO_C_24_USED AS_GPIO +// GPIO(25) // GPIO_C25:SIM2_RST:nil:nil +#define TGT_HAL_GPIO_C_25_USED AS_ALT_FUNC +// GPIO(26) // GPIO_C26:SIM2_CLK:nil:nil +#define TGT_HAL_GPIO_C_26_USED AS_ALT_FUNC +// GPIO(27) // GPIO_C27:SIM2_DIO:nil:nil +//#define TGT_HAL_GPIO_C_27_USED AS_ALT_FUNC +#define TGT_HAL_GPIO_C_27_USED AS_GPIO +// GPIO(28) // GPIO_C28:SIM3_RST:nil:nil +//#define TGT_HAL_GPIO_C_28_USED AS_ALT_FUNC +#define TGT_HAL_GPIO_C_28_USED AS_ALT_FUNC +// GPIO(29) // GPIO_C29:SIM3_CLK:nil:nil +#define TGT_HAL_GPIO_C_29_USED AS_ALT_FUNC +// GPIO(30) // GPIO_C30:SIM3_DIO:nil:nil +//#define TGT_HAL_GPIO_C_30_USED AS_ALT_FUNC +#define TGT_HAL_GPIO_C_30_USED AS_GPIO +// GPIO(31) // LCD DATA +#define TGT_HAL_GPIO_C_31_USED AS_ALT_FUNC + +// ----------------------------------------------------------------------------- +// Each TCO can be assigned one of the following values: +// 0 : unused +// 1 : used +// ----------------------------------------------------------------------------- +// TCO(0) // GPIO_B3 INT--KEYOUT_0--TCO_0 +#define TGT_HAL_TCO_0_USED 0 +// TCO(1) // GPIO_B4 INT--KEYOUT_1--TCO_1 +#define TGT_HAL_TCO_1_USED 0 +// TCO(2) // GPIO_B5 INT--KEYOUT_2--TCO_2 +#define TGT_HAL_TCO_2_USED 0 +// TCO(3) +#define TGT_HAL_TCO_3_USED 0 +// TCO(4) +#define TGT_HAL_TCO_4_USED 0 +// TCO(5) +#define TGT_HAL_TCO_5_USED 0 +// TCO(6) +#define TGT_HAL_TCO_6_USED 0 +// TCO(7) +#define TGT_HAL_TCO_7_USED 0 +// TCO(8) +#define TGT_HAL_TCO_8_USED 0 +// TCO(9) +#define TGT_HAL_TCO_9_USED 0 +// TCO(10) +#define TGT_HAL_TCO_10_USED 0 +// TCO(11) +#define TGT_HAL_TCO_11_USED 0 + +// ----------------------------------------------------------------------------- +// GPIO(0) // GPIO_A0 INT:I2C2_SCL:nil:Monitor_0 +#define TGT_AP_HAL_GPIO_A_0_USED AS_ALT_FUNC +// GPIO(1) // GPIO_A1 INT:I2C2_SDA:nil:Monitor_1 +#define TGT_AP_HAL_GPIO_A_1_USED AS_ALT_FUNC +// GPIO(2) // GPIO_A2 INT:SPI2_CLK:nil:Monitor_2 +#define TGT_AP_HAL_GPIO_A_2_USED AS_GPIO +// GPIO(3) // GPIO_A3 INT:SPI2_DIO:nil:Monitor_3 +#define TGT_AP_HAL_GPIO_A_3_USED AS_GPIO +// GPIO(4) // GPIO_A4 INT:SPI2_DI:nil:Monitor_4 +#define TGT_AP_HAL_GPIO_A_4_USED AS_GPIO +// GPIO(5) // GPIO_A5 INT:SPI2_CS_0:nil:Monitor_5 +#define TGT_AP_HAL_GPIO_A_5_USED AS_GPIO +// GPIO(6) // GPIO_A6 INT:SPI2_CS_1:KEYIN_3:Monitor_6 +#define TGT_AP_HAL_GPIO_A_6_USED AS_GPIO +// GPIO(7) // GPIO_A7 INT:KEYIN_4:LPSCO_1:Monitor_7 +#define TGT_AP_HAL_GPIO_A_7_USED AS_GPIO +// GPIO(8) // GPIO_A8:Clock Output +#define TGT_AP_HAL_GPIO_A_8_USED AS_ALT_FUNC +// GPIO(9) // Audio BCK:nil:nil:nil +#define TGT_AP_HAL_GPIO_A_9_USED AS_ALT_FUNC +// GPIO(10) // Audio LRCK:DAI_CLK:DAI_SIMPLE_CLK:nil +#define TGT_AP_HAL_GPIO_A_10_USED AS_ALT_FUNC +// GPIO(11) // Audio Serial Data In 0:DAI_DI:DAI_SIMPLE_DI:nil +#define TGT_AP_HAL_GPIO_A_11_USED AS_ALT_FUNC +// GPIO(12) // Audio Serial Data In 1:DAI_RST:DAI_SIMPLE_RST:nil +#define TGT_AP_HAL_GPIO_A_12_USED NOT_CONNECTED +// GPIO(13) // Audio Serial Data Out:DAI_DO:DAI_SIMPLE_DO:nil +#define TGT_AP_HAL_GPIO_A_13_USED AS_ALT_FUNC +// GPIO(14) // UART1 Transmit Data:nil:nil:nil +#define TGT_AP_HAL_GPIO_A_14_USED AS_ALT_FUNC +// GPIO(15) // UART1 Clear To Send:KEYIN_7:nil:nil +#define TGT_AP_HAL_GPIO_A_15_USED AS_ALT_FUNC +// GPIO(16) // UART1 Request To Send:KEYOUT_7:nil:nil +#define TGT_AP_HAL_GPIO_A_16_USED AS_ALT_FUNC +// GPIO(17) // SPI1_CS_1:SPI_BB_CS_1:nil:nil +#define TGT_AP_HAL_GPIO_A_17_USED AS_GPIO +// GPIO(18) // LCD DATA6:DSI_D2_P:nil:nil +#define TGT_AP_HAL_GPIO_A_18_USED AS_GPIO +// GPIO(19) // LCD DATA7:DSI_D2_N:nil:nil +#define TGT_AP_HAL_GPIO_A_19_USED AS_GPIO +// GPIO(20) // LCD_WR:DSI_D3_P:lcd_rgb_de:M_SPI_D3 +#define TGT_AP_HAL_GPIO_A_20_USED AS_GPIO +// GPIO(21) // LCD_RS:DSI_D3_N:lcd_rgb_hsync:M_SPI_D2 +#define TGT_AP_HAL_GPIO_A_21_USED AS_GPIO +// GPIO(22) // LCD_RD:SPI_LCD_SDC:lcd_rgb_vsync:M_SPI_D1 +#define TGT_AP_HAL_GPIO_A_22_USED AS_GPIO +// GPIO(22) // LCD_FMARK:SPI_LCD_CLK:lcd_rgb_clk:M_SPI_CLK +#define TGT_AP_HAL_GPIO_A_23_USED AS_GPIO +// GPIO(24) // LCD_DATA_8:NFD_8:nil:nil +#define TGT_AP_HAL_GPIO_A_24_USED AS_GPIO +// GPIO(25) // LCD_DATA_9:NFD_9:nil:nil +#define TGT_AP_HAL_GPIO_A_25_USED NOT_CONNECTED +// GPIO(26) // LCD_DATA_10:NFD_10:nil:nil +#define TGT_AP_HAL_GPIO_A_26_USED NOT_CONNECTED +// GPIO(27) // LCD_DATA_11:NFD_11:nil:nil +#define TGT_AP_HAL_GPIO_A_27_USED NOT_CONNECTED +// GPIO(28) // LCD_DATA_12:NFD_12:nil:nil +#define TGT_AP_HAL_GPIO_A_28_USED NOT_CONNECTED +// GPIO(29) // LCD_DATA_13:NFD_13:nil:nil +#define TGT_AP_HAL_GPIO_A_29_USED NOT_CONNECTED +// GPIO(30) // LCD_DATA_14:NFD_14:nil:nil +#define TGT_AP_HAL_GPIO_A_30_USED NOT_CONNECTED +// GPIO(31) // LCD_DATA_15:NFD_15:nil:nil +#define TGT_AP_HAL_GPIO_A_31_USED NOT_CONNECTED + +// ::::::::::::::::::::::::::::::::::::::- +// GPIO(0) // GPIO_B0 INT:KEYIN_0:KEYIN_0:Monitor_8 +#define TGT_AP_HAL_GPIO_B_0_USED NOT_CONNECTED +// GPIO(1) // GPIO_B1 INT:KEYIN_1:SPI1_CS_2:Monitor_9 +#define TGT_AP_HAL_GPIO_B_1_USED AS_GPIO +// GPIO(2) // GPIO_B2 INT:KEYIN_2:I2S_DI_2:Monitor_10 +#define TGT_AP_HAL_GPIO_B_2_USED AS_GPIO +// GPIO(3) // GPIO_B3 INT:KEYOUT_0:TCO_0:Monitor_11 +#define TGT_AP_HAL_GPIO_B_3_USED AS_GPIO +// GPIO(4) // GPIO_B4 INT:KEYOUT_1:TCO_1:Monitor_12 +#define TGT_AP_HAL_GPIO_B_4_USED NOT_CONNECTED +// GPIO(5) // GPIO_B5 INT:KEYOUT_2:TCO_2:Monitor_13 +#define TGT_AP_HAL_GPIO_B_5_USED AS_GPIO +// GPIO(6) // GPIO_B6 INT:I2C3_SCL:KEYOUT_3:Monitor_14 +#define TGT_AP_HAL_GPIO_B_6_USED AS_ALT_FUNC +// GPIO(7) // GPIO_B7 INT:I2C3_SDA:KEYOUT_4:Monitor_15 +#define TGT_AP_HAL_GPIO_B_7_USED AS_ALT_FUNC +// GPIO(8) // UART2_CTS:KEYIN_6:UART1 Data Set Ready:nil +#define TGT_AP_HAL_GPIO_B_8_USED NOT_CONNECTED +// GPIO(9) // UART2_RTS:KEYOUT_6:UART1 Ring Indicator:nil +#define TGT_AP_HAL_GPIO_B_9_USED NOT_CONNECTED +// GPIO(10) // CAM_RST:I2C2_SCL:nil:nil +#define TGT_AP_HAL_GPIO_B_10_USED AS_GPIO +// GPIO(11) // CAM_PDN:I2C2_SDA:nil:nil +#define TGT_AP_HAL_GPIO_B_11_USED AS_GPIO +// GPIO(12) // CAM_CLK:nil:nil:nil +#define TGT_AP_HAL_GPIO_B_12_USED AS_ALT_FUNC +// GPIO(13) // CAM_VSYNC:CSI1_CLK_P:M_SPI_CLK:nil +#define TGT_AP_HAL_GPIO_B_13_USED AS_ALT_FUNC +// GPIO(14) // CAM_HREF:CSI2_CLK_P:nil:nil +#define TGT_AP_HAL_GPIO_B_14_USED AS_ALT_FUNC +// GPIO(15) // CAM_PCLK:CSI2_CLK_N:SPI_CAM_SCK:nil +#define TGT_AP_HAL_GPIO_B_15_USED AS_ALT_FUNC +// GPIO(16) // CAM_Data 0:CSI2_D0_P:SPI_CAM_DI/d0:nil +#define TGT_AP_HAL_GPIO_B_16_USED AS_ALT_FUNC +// GPIO(17) // CAM_Data 1:CSI2_D0_N:SPI_CAM_OF/d1:nil +#define TGT_AP_HAL_GPIO_B_17_USED AS_ALT_FUNC +// GPIO(18) // CAM_Data 2:CSI2_D1_P:SPI_CAM_RD/d2:nil +#define TGT_AP_HAL_GPIO_B_18_USED AS_ALT_FUNC +// GPIO(19) // CAM_Data 3:CSI2_D1_N:SPI_CAM_SSN/d3:nil +#define TGT_AP_HAL_GPIO_B_19_USED AS_ALT_FUNC +// GPIO(20) // CAM_Data 4:CSI1_D0_P:M_SPI_D0:nil +#define TGT_AP_HAL_GPIO_B_20_USED AS_ALT_FUNC +// GPIO(21) // CAM_Data 5:CSI1_D0_N:M_SPI_D1:nil +#define TGT_AP_HAL_GPIO_B_21_USED AS_ALT_FUNC +// GPIO(22) // CAM_Data 6:CSI1_D1_P:M_SPI_D2:nil +#define TGT_AP_HAL_GPIO_B_22_USED AS_ALT_FUNC +// GPIO(23) // CAM_Data 7:CSI1_D1_N:M_SPI_D3:nil +#define TGT_AP_HAL_GPIO_B_23_USED AS_ALT_FUNC +// GPIO(24) // SPI Flash CS0:CSI1_CLK_N:nil:nil +//#define TGT_AP_HAL_GPIO_B_24_USED NOT_CONNECTED +#define TGT_AP_HAL_GPIO_B_24_USED AS_GPIO +// GPIO(25) // NFCLE:GPIO_B25 +#define TGT_AP_HAL_GPIO_B_25_USED AS_ALT_FUNC +// GPIO(26) // NFWEN:GPIO_B26 +#define TGT_AP_HAL_GPIO_B_26_USED AS_ALT_FUNC +// GPIO(27) // NFWPN:GPIO_B27 +#define TGT_AP_HAL_GPIO_B_27_USED AS_ALT_FUNC +// GPIO(28) // NFREN:GPIO_B28 +#define TGT_AP_HAL_GPIO_B_28_USED AS_ALT_FUNC +// GPIO(29) // NFRB:GPIO_B29 +#define TGT_AP_HAL_GPIO_B_29_USED AS_ALT_FUNC +// GPIO(30) // I2C1_SCL:nil-nil-nil +#define TGT_AP_HAL_GPIO_B_30_USED AS_ALT_FUNC +// GPIO(31) // I2C1_SDA:nil-nil-nil +#define TGT_AP_HAL_GPIO_B_31_USED AS_ALT_FUNC + +// ::::::::::::::::::::::::::::::::::::::- +// GPIO(0) // UART3_RXD:GPIO_D0 INT:nil:nil +#define TGT_AP_HAL_GPIO_D_0_USED AS_ALT_FUNC +// GPIO(1) // UART3_TXD:GPIO_D1 INT:nil:nil +#define TGT_AP_HAL_GPIO_D_1_USED AS_ALT_FUNC +// GPIO(2) // UART3_CTS:GPIO_D2 INT:nil:nil +#define TGT_AP_HAL_GPIO_D_2_USED AS_ALT_FUNC +// GPIO(3) // UART3_RTS:GPIO_D3 INT:nil:nil +#define TGT_AP_HAL_GPIO_D_3_USED AS_ALT_FUNC +// GPIO(4) // NFDQS:GPIO_D4 INT:nil:nil +#define TGT_AP_HAL_GPIO_D_4_USED AS_ALT_FUNC +// GPIO(5) // Volume down +#define TGT_AP_HAL_GPIO_D_5_USED AS_GPIO +// GPIO(6) // Volume up +#define TGT_AP_HAL_GPIO_D_6_USED AS_GPIO +// GPIO(7) +#define TGT_AP_HAL_GPIO_D_7_USED AS_ALT_FUNC +// GPIO(8) +#define TGT_AP_HAL_GPIO_D_8_USED AS_ALT_FUNC +// GPIO(9) +#define TGT_AP_HAL_GPIO_D_9_USED AS_ALT_FUNC +// GPIO(10) +#define TGT_AP_HAL_GPIO_D_10_USED AS_ALT_FUNC +// GPIO(11) +#define TGT_AP_HAL_GPIO_D_11_USED AS_ALT_FUNC +// GPIO(12) +#define TGT_AP_HAL_GPIO_D_12_USED AS_ALT_FUNC +// GPIO(13) +#define TGT_AP_HAL_GPIO_D_13_USED AS_ALT_FUNC +// GPIO(14) +#define TGT_AP_HAL_GPIO_D_14_USED AS_ALT_FUNC +// GPIO(15) +#define TGT_AP_HAL_GPIO_D_15_USED AS_ALT_FUNC +// GPIO(16) +#define TGT_AP_HAL_GPIO_D_16_USED AS_ALT_FUNC +// GPIO(17) +#define TGT_AP_HAL_GPIO_D_17_USED AS_ALT_FUNC +// GPIO(18) +#define TGT_AP_HAL_GPIO_D_18_USED AS_ALT_FUNC +// GPIO(19) +#define TGT_AP_HAL_GPIO_D_19_USED AS_ALT_FUNC +// GPIO(20) +#define TGT_AP_HAL_GPIO_D_20_USED AS_ALT_FUNC +// GPIO(21) +#define TGT_AP_HAL_GPIO_D_21_USED AS_ALT_FUNC +// GPIO(22) +#define TGT_AP_HAL_GPIO_D_22_USED AS_ALT_FUNC +// GPIO(23) +#define TGT_AP_HAL_GPIO_D_23_USED AS_ALT_FUNC +// GPIO(24) +#define TGT_AP_HAL_GPIO_D_24_USED AS_ALT_FUNC +// GPIO(25) +#define TGT_AP_HAL_GPIO_D_25_USED AS_ALT_FUNC +// GPIO(26) +#define TGT_AP_HAL_GPIO_D_26_USED AS_ALT_FUNC +// GPIO(27) +#define TGT_AP_HAL_GPIO_D_27_USED AS_ALT_FUNC +// GPIO(28) +#define TGT_AP_HAL_GPIO_D_28_USED AS_ALT_FUNC +// GPIO(29) +#define TGT_AP_HAL_GPIO_D_29_USED AS_ALT_FUNC +// GPIO(30) +#define TGT_AP_HAL_GPIO_D_30_USED AS_ALT_FUNC +// GPIO(31) +#define TGT_AP_HAL_GPIO_D_31_USED AS_ALT_FUNC + +// ::::::::::::::::::::::::::::::::::::::- +// Each GPO can be assigned one of the following values: +// 0 : unused +// 1 : used +// ::::::::::::::::::::::::::::::::::::::- +// GPO(0) // GPO 0:PWT:KEYIN_5 +#define TGT_AP_HAL_GPO_A_0_USED 1 +// GPO(1) // GPO 1:LPG:KEYOUT_5 +#define TGT_AP_HAL_GPO_A_1_USED 1 +// GPO(2) // GPO 2:PWL_1:CLK_32K +#define TGT_AP_HAL_GPO_A_2_USED 1 +// GPO(3) // LCD CS_1:SPI_LCD_CS:GPO_3 +#define TGT_AP_HAL_GPO_A_3_USED 1 +// GPO(4) // LCD CS_0:SPI_LCD_DIO:GPO_4 +#define TGT_AP_HAL_GPO_A_4_USED 0 +// GPO(5) +#define TGT_AP_HAL_GPO_A_5_USED 0 +// GPO(6) +#define TGT_AP_HAL_GPO_A_6_USED 0 +// GPO(7) +#define TGT_AP_HAL_GPO_A_7_USED 0 +// GPO(8) +#define TGT_AP_HAL_GPO_A_8_USED 0 +// GPO(9) +#define TGT_AP_HAL_GPO_A_9_USED 0 + +// ============================================================================= +// GPIO pins that can be GPIO_C but are not connected on the board +// any pin described here will be driven low all the time for power optimization +// It's actually computed from the TGT_HAL_GPIO_C_xx_USED macros above. +// DO NOT MODIFY ! +// ============================================================================= +#define TGT_HAL_NO_CONNECT_GPIO_C ( \ + ((TGT_HAL_GPIO_C_0_USED & 2) >> 1) | \ + (TGT_HAL_GPIO_C_1_USED & 2) | \ + ((TGT_HAL_GPIO_C_2_USED & 2) << 1) | \ + ((TGT_HAL_GPIO_C_3_USED & 2) << 2) | \ + ((TGT_HAL_GPIO_C_4_USED & 2) << 3) | \ + ((TGT_HAL_GPIO_C_5_USED & 2) << 4) | \ + ((TGT_HAL_GPIO_C_6_USED & 2) << 5) | \ + ((TGT_HAL_GPIO_C_7_USED & 2) << 6) | \ + ((TGT_HAL_GPIO_C_8_USED & 2) << 7) | \ + ((TGT_HAL_GPIO_C_9_USED & 2) << 8) | \ + ((TGT_HAL_GPIO_C_10_USED & 2) << 9) | \ + ((TGT_HAL_GPIO_C_11_USED & 2) << 10) | \ + ((TGT_HAL_GPIO_C_12_USED & 2) << 11) | \ + ((TGT_HAL_GPIO_C_13_USED & 2) << 12) | \ + ((TGT_HAL_GPIO_C_14_USED & 2) << 13) | \ + ((TGT_HAL_GPIO_C_15_USED & 2) << 14) | \ + ((TGT_HAL_GPIO_C_16_USED & 2) << 15) | \ + ((TGT_HAL_GPIO_C_17_USED & 2) << 16) | \ + ((TGT_HAL_GPIO_C_18_USED & 2) << 17) | \ + ((TGT_HAL_GPIO_C_19_USED & 2) << 18) | \ + ((TGT_HAL_GPIO_C_20_USED & 2) << 19) | \ + ((TGT_HAL_GPIO_C_21_USED & 2) << 20) | \ + ((TGT_HAL_GPIO_C_22_USED & 2) << 21) | \ + ((TGT_HAL_GPIO_C_23_USED & 2) << 22) | \ + ((TGT_HAL_GPIO_C_24_USED & 2) << 23) | \ + ((TGT_HAL_GPIO_C_25_USED & 2) << 24) | \ + ((TGT_HAL_GPIO_C_26_USED & 2) << 25) | \ + ((TGT_HAL_GPIO_C_27_USED & 2) << 26) | \ + ((TGT_HAL_GPIO_C_28_USED & 2) << 27) | \ + ((TGT_HAL_GPIO_C_29_USED & 2) << 28) | \ + ((TGT_HAL_GPIO_C_30_USED & 2) << 29) | \ + ((TGT_HAL_GPIO_C_31_USED & 2) << 30) ) + + +// ============================================================================= +// GPIO pins that are actually used as GPIO_C +// It's actually computed from the TGT_HAL_GPIO_C_xx_USED macros above. +// DO NOT MODIFY ! +// ============================================================================= +#define TGT_HAL_USED_GPIO_C ( \ + (TGT_HAL_GPIO_C_0_USED & 1) | \ + ((TGT_HAL_GPIO_C_1_USED & 1) << 1) | \ + ((TGT_HAL_GPIO_C_2_USED & 1) << 2) | \ + ((TGT_HAL_GPIO_C_3_USED & 1) << 3) | \ + ((TGT_HAL_GPIO_C_4_USED & 1) << 4) | \ + ((TGT_HAL_GPIO_C_5_USED & 1) << 5) | \ + ((TGT_HAL_GPIO_C_6_USED & 1) << 6) | \ + ((TGT_HAL_GPIO_C_7_USED & 1) << 7) | \ + ((TGT_HAL_GPIO_C_8_USED & 1) << 8) | \ + ((TGT_HAL_GPIO_C_9_USED & 1) << 9) | \ + ((TGT_HAL_GPIO_C_10_USED & 1) << 10) | \ + ((TGT_HAL_GPIO_C_11_USED & 1) << 11) | \ + ((TGT_HAL_GPIO_C_12_USED & 1) << 12) | \ + ((TGT_HAL_GPIO_C_13_USED & 1) << 13) | \ + ((TGT_HAL_GPIO_C_14_USED & 1) << 14) | \ + ((TGT_HAL_GPIO_C_15_USED & 1) << 15) | \ + ((TGT_HAL_GPIO_C_16_USED & 1) << 16) | \ + ((TGT_HAL_GPIO_C_17_USED & 1) << 17) | \ + ((TGT_HAL_GPIO_C_18_USED & 1) << 18) | \ + ((TGT_HAL_GPIO_C_19_USED & 1) << 19) | \ + ((TGT_HAL_GPIO_C_20_USED & 1) << 20) | \ + ((TGT_HAL_GPIO_C_21_USED & 1) << 21) | \ + ((TGT_HAL_GPIO_C_22_USED & 1) << 22) | \ + ((TGT_HAL_GPIO_C_23_USED & 1) << 23) | \ + ((TGT_HAL_GPIO_C_24_USED & 1) << 24) | \ + ((TGT_HAL_GPIO_C_25_USED & 1) << 25) | \ + ((TGT_HAL_GPIO_C_26_USED & 1) << 26) | \ + ((TGT_HAL_GPIO_C_27_USED & 1) << 27) | \ + ((TGT_HAL_GPIO_C_28_USED & 1) << 28) | \ + ((TGT_HAL_GPIO_C_29_USED & 1) << 29) | \ + ((TGT_HAL_GPIO_C_30_USED & 1) << 30) | \ + ((TGT_HAL_GPIO_C_31_USED & 1) << 31) ) + +// ============================================================================= +// TCO pins that are actually used as TCO +// It's actually computed from the TGT_HAL_TCO_xx_USED macros above. +// DO NOT MODIFY ! +// ============================================================================= +#define TGT_HAL_USED_TCO ( \ + (TGT_HAL_TCO_0_USED & 1) | \ + ((TGT_HAL_TCO_1_USED & 1) << 1) | \ + ((TGT_HAL_TCO_2_USED & 1) << 2) | \ + ((TGT_HAL_TCO_3_USED & 1) << 3) | \ + ((TGT_HAL_TCO_4_USED & 1) << 4) | \ + ((TGT_HAL_TCO_5_USED & 1) << 5) | \ + ((TGT_HAL_TCO_6_USED & 1) << 6) | \ + ((TGT_HAL_TCO_7_USED & 1) << 7) | \ + ((TGT_HAL_TCO_8_USED & 1) << 8) | \ + ((TGT_HAL_TCO_9_USED & 1) << 9) | \ + ((TGT_HAL_TCO_10_USED & 1) << 10) | \ + ((TGT_HAL_TCO_11_USED & 1) << 11) ) + +// ============================================================================= +// GPIO pins that can be GPIO but are not connected on the board +// any pin described here will be driven low all the time for power optimization +// It's actually computed from the TGT_AP_HAL_GPIO_A_xx_USED macros above. +// DO NOT MODIFY ! +// ============================================================================= +#define TGT_AP_HAL_NO_CONNECT_GPIO_A ( \ + ((TGT_AP_HAL_GPIO_A_0_USED & 2) >> 1) | \ + (TGT_AP_HAL_GPIO_A_1_USED & 2) | \ + ((TGT_AP_HAL_GPIO_A_2_USED & 2) << 1) | \ + ((TGT_AP_HAL_GPIO_A_3_USED & 2) << 2) | \ + ((TGT_AP_HAL_GPIO_A_4_USED & 2) << 3) | \ + ((TGT_AP_HAL_GPIO_A_5_USED & 2) << 4) | \ + ((TGT_AP_HAL_GPIO_A_6_USED & 2) << 5) | \ + ((TGT_AP_HAL_GPIO_A_7_USED & 2) << 6) | \ + ((TGT_AP_HAL_GPIO_A_8_USED & 2) << 7) | \ + ((TGT_AP_HAL_GPIO_A_9_USED & 2) << 8) | \ + ((TGT_AP_HAL_GPIO_A_10_USED & 2) << 9) | \ + ((TGT_AP_HAL_GPIO_A_11_USED & 2) << 10) | \ + ((TGT_AP_HAL_GPIO_A_12_USED & 2) << 11) | \ + ((TGT_AP_HAL_GPIO_A_13_USED & 2) << 12) | \ + ((TGT_AP_HAL_GPIO_A_14_USED & 2) << 13) | \ + ((TGT_AP_HAL_GPIO_A_15_USED & 2) << 14) | \ + ((TGT_AP_HAL_GPIO_A_16_USED & 2) << 15) | \ + ((TGT_AP_HAL_GPIO_A_17_USED & 2) << 16) | \ + ((TGT_AP_HAL_GPIO_A_18_USED & 2) << 17) | \ + ((TGT_AP_HAL_GPIO_A_19_USED & 2) << 18) | \ + ((TGT_AP_HAL_GPIO_A_20_USED & 2) << 19) | \ + ((TGT_AP_HAL_GPIO_A_21_USED & 2) << 20) | \ + ((TGT_AP_HAL_GPIO_A_22_USED & 2) << 21) | \ + ((TGT_AP_HAL_GPIO_A_23_USED & 2) << 22) | \ + ((TGT_AP_HAL_GPIO_A_24_USED & 2) << 23) | \ + ((TGT_AP_HAL_GPIO_A_25_USED & 2) << 24) | \ + ((TGT_AP_HAL_GPIO_A_26_USED & 2) << 25) | \ + ((TGT_AP_HAL_GPIO_A_27_USED & 2) << 26) | \ + ((TGT_AP_HAL_GPIO_A_28_USED & 2) << 27) | \ + ((TGT_AP_HAL_GPIO_A_29_USED & 2) << 28) | \ + ((TGT_AP_HAL_GPIO_A_30_USED & 2) << 29) | \ + ((TGT_AP_HAL_GPIO_A_31_USED & 2) << 30) ) + + +// ============================================================================= +// GPIO pins that are actually used as GPIO +// It's actually computed from the TGT_AP_HAL_GPIO_A_xx_USED macros above. +// DO NOT MODIFY ! +// ============================================================================= +#define TGT_AP_HAL_USED_GPIO_A ( \ + (TGT_AP_HAL_GPIO_A_0_USED & 1) | \ + ((TGT_AP_HAL_GPIO_A_1_USED & 1) << 1) | \ + ((TGT_AP_HAL_GPIO_A_2_USED & 1) << 2) | \ + ((TGT_AP_HAL_GPIO_A_3_USED & 1) << 3) | \ + ((TGT_AP_HAL_GPIO_A_4_USED & 1) << 4) | \ + ((TGT_AP_HAL_GPIO_A_5_USED & 1) << 5) | \ + ((TGT_AP_HAL_GPIO_A_6_USED & 1) << 6) | \ + ((TGT_AP_HAL_GPIO_A_7_USED & 1) << 7) | \ + ((TGT_AP_HAL_GPIO_A_8_USED & 1) << 8) | \ + ((TGT_AP_HAL_GPIO_A_9_USED & 1) << 9) | \ + ((TGT_AP_HAL_GPIO_A_10_USED & 1) << 10) | \ + ((TGT_AP_HAL_GPIO_A_11_USED & 1) << 11) | \ + ((TGT_AP_HAL_GPIO_A_12_USED & 1) << 12) | \ + ((TGT_AP_HAL_GPIO_A_13_USED & 1) << 13) | \ + ((TGT_AP_HAL_GPIO_A_14_USED & 1) << 14) | \ + ((TGT_AP_HAL_GPIO_A_15_USED & 1) << 15) | \ + ((TGT_AP_HAL_GPIO_A_16_USED & 1) << 16) | \ + ((TGT_AP_HAL_GPIO_A_17_USED & 1) << 17) | \ + ((TGT_AP_HAL_GPIO_A_18_USED & 1) << 18) | \ + ((TGT_AP_HAL_GPIO_A_19_USED & 1) << 19) | \ + ((TGT_AP_HAL_GPIO_A_20_USED & 1) << 20) | \ + ((TGT_AP_HAL_GPIO_A_21_USED & 1) << 21) | \ + ((TGT_AP_HAL_GPIO_A_22_USED & 1) << 22) | \ + ((TGT_AP_HAL_GPIO_A_23_USED & 1) << 23) | \ + ((TGT_AP_HAL_GPIO_A_24_USED & 1) << 24) | \ + ((TGT_AP_HAL_GPIO_A_25_USED & 1) << 25) | \ + ((TGT_AP_HAL_GPIO_A_26_USED & 1) << 26) | \ + ((TGT_AP_HAL_GPIO_A_27_USED & 1) << 27) | \ + ((TGT_AP_HAL_GPIO_A_28_USED & 1) << 28) | \ + ((TGT_AP_HAL_GPIO_A_29_USED & 1) << 29) | \ + ((TGT_AP_HAL_GPIO_A_30_USED & 1) << 30) | \ + ((TGT_AP_HAL_GPIO_A_31_USED & 1) << 31) ) + +// ============================================================================= +// GPIO pins that can be GPIO but are not connected on the board +// any pin described here will be driven low all the time for power optimization +// It's actually computed from the TGT_AP_HAL_GPIO_B_xx_USED macros above. +// DO NOT MODIFY ! +// ============================================================================= +#define TGT_AP_HAL_NO_CONNECT_GPIO_B ( \ + ((TGT_AP_HAL_GPIO_B_0_USED & 2) >> 1) | \ + (TGT_AP_HAL_GPIO_B_1_USED & 2) | \ + ((TGT_AP_HAL_GPIO_B_2_USED & 2) << 1) | \ + ((TGT_AP_HAL_GPIO_B_3_USED & 2) << 2) | \ + ((TGT_AP_HAL_GPIO_B_4_USED & 2) << 3) | \ + ((TGT_AP_HAL_GPIO_B_5_USED & 2) << 4) | \ + ((TGT_AP_HAL_GPIO_B_6_USED & 2) << 5) | \ + ((TGT_AP_HAL_GPIO_B_7_USED & 2) << 6) | \ + ((TGT_AP_HAL_GPIO_B_8_USED & 2) << 7) | \ + ((TGT_AP_HAL_GPIO_B_9_USED & 2) << 8) | \ + ((TGT_AP_HAL_GPIO_B_10_USED & 2) << 9) | \ + ((TGT_AP_HAL_GPIO_B_11_USED & 2) << 10) | \ + ((TGT_AP_HAL_GPIO_B_12_USED & 2) << 11) | \ + ((TGT_AP_HAL_GPIO_B_13_USED & 2) << 12) | \ + ((TGT_AP_HAL_GPIO_B_14_USED & 2) << 13) | \ + ((TGT_AP_HAL_GPIO_B_15_USED & 2) << 14) | \ + ((TGT_AP_HAL_GPIO_B_16_USED & 2) << 15) | \ + ((TGT_AP_HAL_GPIO_B_17_USED & 2) << 16) | \ + ((TGT_AP_HAL_GPIO_B_18_USED & 2) << 17) | \ + ((TGT_AP_HAL_GPIO_B_19_USED & 2) << 18) | \ + ((TGT_AP_HAL_GPIO_B_20_USED & 2) << 19) | \ + ((TGT_AP_HAL_GPIO_B_21_USED & 2) << 20) | \ + ((TGT_AP_HAL_GPIO_B_22_USED & 2) << 21) | \ + ((TGT_AP_HAL_GPIO_B_23_USED & 2) << 22) | \ + ((TGT_AP_HAL_GPIO_B_24_USED & 2) << 23) | \ + ((TGT_AP_HAL_GPIO_B_25_USED & 2) << 24) | \ + ((TGT_AP_HAL_GPIO_B_26_USED & 2) << 25) | \ + ((TGT_AP_HAL_GPIO_B_27_USED & 2) << 26) | \ + ((TGT_AP_HAL_GPIO_B_28_USED & 2) << 27) | \ + ((TGT_AP_HAL_GPIO_B_29_USED & 2) << 28) | \ + ((TGT_AP_HAL_GPIO_B_30_USED & 2) << 29) | \ + ((TGT_AP_HAL_GPIO_B_31_USED & 2) << 30) ) + + +// ============================================================================= +// GPIO pins that are actually used as GPIO +// It's actually computed from the TGT_AP_HAL_GPIO_B_xx_USED macros above. +// DO NOT MODIFY ! +// ============================================================================= +#define TGT_AP_HAL_USED_GPIO_B ( \ + (TGT_AP_HAL_GPIO_B_0_USED & 1) | \ + ((TGT_AP_HAL_GPIO_B_1_USED & 1) << 1) | \ + ((TGT_AP_HAL_GPIO_B_2_USED & 1) << 2) | \ + ((TGT_AP_HAL_GPIO_B_3_USED & 1) << 3) | \ + ((TGT_AP_HAL_GPIO_B_4_USED & 1) << 4) | \ + ((TGT_AP_HAL_GPIO_B_5_USED & 1) << 5) | \ + ((TGT_AP_HAL_GPIO_B_6_USED & 1) << 6) | \ + ((TGT_AP_HAL_GPIO_B_7_USED & 1) << 7) | \ + ((TGT_AP_HAL_GPIO_B_8_USED & 1) << 8) | \ + ((TGT_AP_HAL_GPIO_B_9_USED & 1) << 9) | \ + ((TGT_AP_HAL_GPIO_B_10_USED & 1) << 10) | \ + ((TGT_AP_HAL_GPIO_B_11_USED & 1) << 11) | \ + ((TGT_AP_HAL_GPIO_B_12_USED & 1) << 12) | \ + ((TGT_AP_HAL_GPIO_B_13_USED & 1) << 13) | \ + ((TGT_AP_HAL_GPIO_B_14_USED & 1) << 14) | \ + ((TGT_AP_HAL_GPIO_B_15_USED & 1) << 15) | \ + ((TGT_AP_HAL_GPIO_B_16_USED & 1) << 16) | \ + ((TGT_AP_HAL_GPIO_B_17_USED & 1) << 17) | \ + ((TGT_AP_HAL_GPIO_B_18_USED & 1) << 18) | \ + ((TGT_AP_HAL_GPIO_B_19_USED & 1) << 19) | \ + ((TGT_AP_HAL_GPIO_B_20_USED & 1) << 20) | \ + ((TGT_AP_HAL_GPIO_B_21_USED & 1) << 21) | \ + ((TGT_AP_HAL_GPIO_B_22_USED & 1) << 22) | \ + ((TGT_AP_HAL_GPIO_B_23_USED & 1) << 23) | \ + ((TGT_AP_HAL_GPIO_B_24_USED & 1) << 24) | \ + ((TGT_AP_HAL_GPIO_B_25_USED & 1) << 25) | \ + ((TGT_AP_HAL_GPIO_B_26_USED & 1) << 26) | \ + ((TGT_AP_HAL_GPIO_B_27_USED & 1) << 27) | \ + ((TGT_AP_HAL_GPIO_B_28_USED & 1) << 28) | \ + ((TGT_AP_HAL_GPIO_B_29_USED & 1) << 29) | \ + ((TGT_AP_HAL_GPIO_B_30_USED & 1) << 30) | \ + ((TGT_AP_HAL_GPIO_B_31_USED & 1) << 31) ) + + + +// ============================================================================= +// GPIO pins that can be GPIO but are not connected on the board +// any pin described here will be driven low all the time for power optimization +// It's actually computed from the TGT_AP_HAL_GPIO_D_xx_USED macros above. +// DO NOT MODIFY ! +// ============================================================================= +#define TGT_AP_HAL_NO_CONNECT_GPIO_D ( \ + ((TGT_AP_HAL_GPIO_D_0_USED & 2) >> 1) | \ + (TGT_AP_HAL_GPIO_D_1_USED & 2) | \ + ((TGT_AP_HAL_GPIO_D_2_USED & 2) << 1) | \ + ((TGT_AP_HAL_GPIO_D_3_USED & 2) << 2) | \ + ((TGT_AP_HAL_GPIO_D_4_USED & 2) << 3) | \ + ((TGT_AP_HAL_GPIO_D_5_USED & 2) << 4) | \ + ((TGT_AP_HAL_GPIO_D_6_USED & 2) << 5) | \ + ((TGT_AP_HAL_GPIO_D_7_USED & 2) << 6) | \ + ((TGT_AP_HAL_GPIO_D_8_USED & 2) << 7) | \ + ((TGT_AP_HAL_GPIO_D_9_USED & 2) << 8) | \ + ((TGT_AP_HAL_GPIO_D_10_USED & 2) << 9) | \ + ((TGT_AP_HAL_GPIO_D_11_USED & 2) << 10) | \ + ((TGT_AP_HAL_GPIO_D_12_USED & 2) << 11) | \ + ((TGT_AP_HAL_GPIO_D_13_USED & 2) << 12) | \ + ((TGT_AP_HAL_GPIO_D_14_USED & 2) << 13) | \ + ((TGT_AP_HAL_GPIO_D_15_USED & 2) << 14) | \ + ((TGT_AP_HAL_GPIO_D_16_USED & 2) << 15) | \ + ((TGT_AP_HAL_GPIO_D_17_USED & 2) << 16) | \ + ((TGT_AP_HAL_GPIO_D_18_USED & 2) << 17) | \ + ((TGT_AP_HAL_GPIO_D_19_USED & 2) << 18) | \ + ((TGT_AP_HAL_GPIO_D_20_USED & 2) << 19) | \ + ((TGT_AP_HAL_GPIO_D_21_USED & 2) << 20) | \ + ((TGT_AP_HAL_GPIO_D_22_USED & 2) << 21) | \ + ((TGT_AP_HAL_GPIO_D_23_USED & 2) << 22) | \ + ((TGT_AP_HAL_GPIO_D_24_USED & 2) << 23) | \ + ((TGT_AP_HAL_GPIO_D_25_USED & 2) << 24) | \ + ((TGT_AP_HAL_GPIO_D_26_USED & 2) << 25) | \ + ((TGT_AP_HAL_GPIO_D_27_USED & 2) << 26) | \ + ((TGT_AP_HAL_GPIO_D_28_USED & 2) << 27) | \ + ((TGT_AP_HAL_GPIO_D_29_USED & 2) << 28) | \ + ((TGT_AP_HAL_GPIO_D_30_USED & 2) << 29) | \ + ((TGT_AP_HAL_GPIO_D_31_USED & 2) << 30) ) + + +// ============================================================================= +// GPIO pins that are actually used as GPIO +// It's actually computed from the TGT_AP_HAL_GPIO_D_xx_USED macros above. +// DO NOT MODIFY ! +// ============================================================================= +#define TGT_AP_HAL_USED_GPIO_D ( \ + (TGT_AP_HAL_GPIO_D_0_USED & 1) | \ + ((TGT_AP_HAL_GPIO_D_1_USED & 1) << 1) | \ + ((TGT_AP_HAL_GPIO_D_2_USED & 1) << 2) | \ + ((TGT_AP_HAL_GPIO_D_3_USED & 1) << 3) | \ + ((TGT_AP_HAL_GPIO_D_4_USED & 1) << 4) | \ + ((TGT_AP_HAL_GPIO_D_5_USED & 1) << 5) | \ + ((TGT_AP_HAL_GPIO_D_6_USED & 1) << 6) | \ + ((TGT_AP_HAL_GPIO_D_7_USED & 1) << 7) | \ + ((TGT_AP_HAL_GPIO_D_8_USED & 1) << 8) | \ + ((TGT_AP_HAL_GPIO_D_9_USED & 1) << 9) | \ + ((TGT_AP_HAL_GPIO_D_10_USED & 1) << 10) | \ + ((TGT_AP_HAL_GPIO_D_11_USED & 1) << 11) | \ + ((TGT_AP_HAL_GPIO_D_12_USED & 1) << 12) | \ + ((TGT_AP_HAL_GPIO_D_13_USED & 1) << 13) | \ + ((TGT_AP_HAL_GPIO_D_14_USED & 1) << 14) | \ + ((TGT_AP_HAL_GPIO_D_15_USED & 1) << 15) | \ + ((TGT_AP_HAL_GPIO_D_16_USED & 1) << 16) | \ + ((TGT_AP_HAL_GPIO_D_17_USED & 1) << 17) | \ + ((TGT_AP_HAL_GPIO_D_18_USED & 1) << 18) | \ + ((TGT_AP_HAL_GPIO_D_19_USED & 1) << 19) | \ + ((TGT_AP_HAL_GPIO_D_20_USED & 1) << 20) | \ + ((TGT_AP_HAL_GPIO_D_21_USED & 1) << 21) | \ + ((TGT_AP_HAL_GPIO_D_22_USED & 1) << 22) | \ + ((TGT_AP_HAL_GPIO_D_23_USED & 1) << 23) | \ + ((TGT_AP_HAL_GPIO_D_24_USED & 1) << 24) | \ + ((TGT_AP_HAL_GPIO_D_25_USED & 1) << 25) | \ + ((TGT_AP_HAL_GPIO_D_26_USED & 1) << 26) | \ + ((TGT_AP_HAL_GPIO_D_27_USED & 1) << 27) | \ + ((TGT_AP_HAL_GPIO_D_28_USED & 1) << 28) | \ + ((TGT_AP_HAL_GPIO_D_29_USED & 1) << 29) | \ + ((TGT_AP_HAL_GPIO_D_30_USED & 1) << 30) | \ + ((TGT_AP_HAL_GPIO_D_31_USED & 1) << 31) ) + + +// ============================================================================= +// GPO pins that are actually used as GPO_A +// It's actually computed from the TGT_AP_HAL_GPO_A_xx_USED macros above. +// DO NOT MODIFY ! +// ============================================================================= +#define TGT_AP_HAL_USED_GPO_A ( \ + (TGT_AP_HAL_GPO_A_0_USED & 1) | \ + ((TGT_AP_HAL_GPO_A_1_USED & 1) << 1) | \ + ((TGT_AP_HAL_GPO_A_2_USED & 1) << 2) | \ + ((TGT_AP_HAL_GPO_A_3_USED & 1) << 3) | \ + ((TGT_AP_HAL_GPO_A_4_USED & 1) << 4) | \ + ((TGT_AP_HAL_GPO_A_5_USED & 1) << 5) | \ + ((TGT_AP_HAL_GPO_A_6_USED & 1) << 6) | \ + ((TGT_AP_HAL_GPO_A_7_USED & 1) << 7) | \ + ((TGT_AP_HAL_GPO_A_8_USED & 1) << 8) | \ + ((TGT_AP_HAL_GPO_A_9_USED & 1) << 9) ) + + +#endif diff --git a/include/rda/tgt_types.h b/include/rda/tgt_types.h new file mode 100644 index 0000000000..f2e222fd8a --- /dev/null +++ b/include/rda/tgt_types.h @@ -0,0 +1,261 @@ +/* + * Copyright (C) 2013 RDA Microelectronics Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#ifndef _TGT_TYPES_H_ +#define _TGT_TYPES_H_ + +#define KEY_MAP +#define KEY_BOOT_DOWNLOAD +#define TGT_RFD_CONFIG +#define TGT_PMD_CONFIG +#define TGT_AUD_CONFIG + +typedef unsigned char BOOL; + +// ============================================================================= +// HAL_LCD_MODE_T +// ----------------------------------------------------------------------------- +/// The LCD interface modes. +// ============================================================================= +typedef enum +{ + HAL_LCD_MODE_SPI, + HAL_LCD_MODE_PARALLEL_16BIT, + HAL_LCD_MODE_DSI, + HAL_LCD_MODE_RGB_16BIT, + HAL_LCD_MODE_RGB_24BIT, + + HAL_LCD_MODE_QTY, +} HAL_LCD_MODE_T; + +// ============================================================================= +// HAL_CAM_MODE_T +// ----------------------------------------------------------------------------- +/// The camera interface modes. +// ============================================================================= +typedef enum +{ + HAL_CAM_MODE_PARALLEL, + HAL_CAM_MODE_SPI, + HAL_CAM_MODE_CSI, + + HAL_CAM_MODE_QTY, +} HAL_CAM_MODE_T; + +// ============================================================================= +// HAL_CAM_CSI_ID_T +// ----------------------------------------------------------------------------- +/// The camera CSI IDs. +// ============================================================================= +typedef enum +{ + HAL_CAM_CSI_NONE, + HAL_CAM_CSI_1, + HAL_CAM_CSI_2, + + HAL_CAM_CSI_ID_QTY, +} HAL_CAM_CSI_ID_T; + +// ============================================================================= +// HAL_CFG_SDMMC_T +// ----------------------------------------------------------------------------- +/// This structure describes the SDMMC configuration for a given target. +// ============================================================================= +typedef struct +{ + /// The sdmmc is used. + BOOL sdmmcUsed :1; + /// The sdmmc2 is used. + BOOL sdmmc2Used :1; + /// The sdmmc3 is used. + BOOL sdmmc3Used :1; +} HAL_CFG_SDMMC_T; + +// ============================================================================= +// HAL_CFG_CAM_T +// ----------------------------------------------------------------------------- +/// This structure describes the camera configuration for a given target. +/// The first field identify if camera is used. +/// The second and third field is the RemapFlag which identify if camera PDN/RST +/// need to be remapped to other GPIOs instead of default (GPIO_5 and GPIO_4), +/// for the first camera sensor. +/// The fourth and fifth field is the remapped pin when RemapFlag is set, for the +/// first camera sensor. +/// The sixth and seventh fields are used to describe which GPIOs are used for +/// the PDN/RST lines of the optional second camera sensor. This second camera +/// sensor can only be used on with GPIOs to control its PDN and RST lines. +// ============================================================================= +typedef struct +{ + /// \c TRUE if the rear camera is used + BOOL camUsed :1; + /// The polarity of the Power DowN line, for the rear sensor. + BOOL camPdnActiveH :1; + /// The polarity of the Reset line, for the rear sensor. + BOOL camRstActiveH :1; + /// The remapped GPIO controlling PDN (-1 if not remapped), for the rear sensor. + INT32 camPdnRemap; + /// The remapped GPIO controlling RST (-1 if not remapped), for the rear sensor. + INT32 camRstRemap; + /// The CSI ID (valid only if camera mode is CSI) + HAL_CAM_CSI_ID_T camCsiId; + /// \c TRUE if the front camera is used + BOOL cam1Used :1; + /// The polarity of the Power DowN line, for the front sensor. + BOOL cam1PdnActiveH :1; + /// The polarity of the Reset line, for the front sensor. + BOOL cam1RstActiveH :1; + /// The remapped GPIO controlling PDN (-1 if not remapped), for the front sensor. + INT32 cam1PdnRemap; + /// The remapped GPIO controlling RST (-1 if not remapped), for the front sensor. + INT32 cam1RstRemap; + /// The CSI ID (valid only if camera mode is CSI) + HAL_CAM_CSI_ID_T cam1CsiId; + /// The camera interface mode + HAL_CAM_MODE_T camMode; +} HAL_CFG_CAM_T; + +// ============================================================================= +// HAL_CFG_PWM_T +// ----------------------------------------------------------------------------- +/// This structure describes the PWM configuration for a given target. +/// The fields tell wether the pin corresponding to PWM output +/// is actually used as PWM output and not as something else (for +/// instance as a GPIO). +// ============================================================================= +typedef struct +{ + /// \c TRUE if the PWL0 is used + BOOL pwl0Used :1; + /// \c TRUE if the PWL1 is used + BOOL pwl1Used :1; + /// \c TRUE if the PWT is used + BOOL pwtUsed :1; + /// \c TRUE if the LPG is used + BOOL lpgUsed :1; +} HAL_CFG_PWM_T; + +// ============================================================================= +// HAL_CFG_I2C_T +// ----------------------------------------------------------------------------- +/// This structure describes the I2C configuration for a given target. The +/// fields tell wether the corresponding I2C pins are actually used +/// for I2C and not as something else (for instance as a GPIO). +// ============================================================================= +typedef struct +{ + /// \c TRUE if the I2C pins are used + BOOL i2cUsed :1; + /// \c TRUE if the I2C2 pins are used + BOOL i2c2Used :1; + /// \c TRUE if the I2C2 pins are used from cam pins + BOOL i2c2PinsCam :1; + /// \c TRUE if the I2C3 pins are used + BOOL i2c3Used :1; +} HAL_CFG_I2C_T; + +// ============================================================================= +// HAL_CFG_I2S_T +// ----------------------------------------------------------------------------- +/// This structure describes the I2S configuration for a given target. The +/// fields tell wether the corresponding I2S pin is actually used +/// for I2S and not as something else (for instance as a GPIO). +// ============================================================================= +typedef struct +{ + /// \c TRUE if the data out pin is used + BOOL doUsed :1; + BOOL :3; + /// \c TRUE if corresponding input is used + BOOL di0Used :1; + BOOL di1Used :1; + BOOL di2Used :1; +} HAL_CFG_I2S_T; + +// ============================================================================= +// HAL_UART_CONFIG_T +// ----------------------------------------------------------------------------- +/// Used to describes a configuration for used pin by an UART for a given target. +// ============================================================================= +typedef enum +{ + /// invalid + HAL_UART_CONFIG_INVALID = 0, + + /// UART is not used + HAL_UART_CONFIG_NONE, + + /// UART use only data lines (TXD & RXD) + HAL_UART_CONFIG_DATA, + + /// UART use data and flow control lines (TXD, RXD, RTS & CTS) + HAL_UART_CONFIG_FLOWCONTROL, + + /// UART use all lines (TXD, RXD, RTS, CTS, RI, DSR, DCD & DTR) + HAL_UART_CONFIG_MODEM, + + HAL_UART_CONFIG_QTY +} HAL_UART_CONFIG_T; + +// ============================================================================= +// HAL_CFG_SPI_T +// ----------------------------------------------------------------------------- +/// This structure describes the SPI configuration for a given target. The first +/// fields tell wether the pin corresponding to chip select is actually used +/// as a chip select and not as something else (for instance as a GPIO). +/// Then, the polarity of the Chip Select is given. It is only relevant +/// if the corresponding Chip Select is used as a Chip Select. +/// Finally which pin is used as input, Can be none, one or the other. +/// On most chip configuration the input 0 (di0) is on the output pin: SPI_DIO +// ============================================================================= +typedef struct +{ + /// \c TRUE if the corresponding pin is used as a Chip Select. + BOOL cs0Used :1; + BOOL cs1Used :1; + BOOL cs2Used :1; + BOOL cs3Used :1; + /// \c TRUE if the first edge is falling + BOOL cs0ActiveLow :1; + BOOL cs1ActiveLow :1; + BOOL cs2ActiveLow :1; + BOOL cs3ActiveLow :1; + /// \c TRUE if corresponding input is used + BOOL di0Used :1; + BOOL di1Used :1; +} HAL_CFG_SPI_T; + +// ============================================================================= +// HAL_CFG_GOUDA_T +// ----------------------------------------------------------------------------- +/// This structure describes the GOUDA configuration for a given target. +/// The first fields tell wether the pin corresponding to chip select is +/// actually used as a chip select and not as something else (for instance +/// as a GPIO). If none are used, the GOUDA is considered unused. +// ============================================================================= +typedef struct +{ + /// \c TRUE if the corresponding pin is used as a Chip Select. + BOOL cs0Used :1; + BOOL cs1Used :1; + /// \c TRUE if LCD 16-23 bits are from camera, FALSE from NAND + BOOL lcd16_23Cam :1; + /// \c LCD interface mode + HAL_LCD_MODE_T lcdMode; +} HAL_CFG_GOUDA_T; + +#endif // _TGT_TYPES_H_ diff --git a/include/scsi.h b/include/scsi.h index c52759c788..89ae45f8e8 100644 --- a/include/scsi.h +++ b/include/scsi.h @@ -26,7 +26,9 @@ typedef struct SCSI_cmd_block{ unsigned char cmd[16]; /* command */ - unsigned char sense_buf[64]; /* for request sense */ + /* for request sense */ + unsigned char sense_buf[64] + __attribute__((aligned(ARCH_DMA_MINALIGN))); unsigned char status; /* SCSI Status */ unsigned char target; /* Target ID */ unsigned char lun; /* Target LUN */ diff --git a/include/sdhci.h b/include/sdhci.h index 800f9d9c07..9d37183243 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -216,6 +216,9 @@ */ #define SDHCI_QUIRK_32BIT_DMA_ADDR (1 << 0) #define SDHCI_QUIRK_REG32_RW (1 << 1) +#define SDHCI_QUIRK_BROKEN_R1B (1 << 2) +#define SDHCI_QUIRK_NO_HISPD_BIT (1 << 3) +#define SDHCI_QUIRK_BROKEN_VOLTAGE (1 << 4) /* to make gcc happy */ struct sdhci_host; @@ -240,10 +243,14 @@ struct sdhci_host { char *name; void *ioaddr; unsigned int quirks; + unsigned int host_caps; unsigned int version; unsigned int clock; struct mmc *mmc; const struct sdhci_ops *ops; + + void (*set_control_reg)(struct sdhci_host *host); + uint voltages; }; #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS diff --git a/include/tegra-kbc.h b/include/tegra-kbc.h new file mode 100644 index 0000000000..f331c79c9d --- /dev/null +++ b/include/tegra-kbc.h @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __include_tegra_kbc_h__ +#define __include_tegra_kbc_h__ + +#include <common.h> + +#define KEY_IS_MODIFIER(key) ((key) >= KEY_FIRST_MODIFIER) + +struct kbc_tegra { + u32 control; + u32 interrupt; + u32 row_cfg[4]; + u32 col_cfg[3]; + u32 timeout_dly; + u32 init_dly; + u32 rpt_dly; + u32 kp_ent[2]; + u32 row_mask[16]; +}; + +#ifdef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +extern int overwrite_console(void); +#define OVERWRITE_CONSOLE overwrite_console() +#else +#define OVERWRITE_CONSOLE 0 +#endif /* CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE */ + +#endif /* __include_tegra_kbc_h__ */ diff --git a/include/tps6586x.h b/include/tps6586x.h new file mode 100644 index 0000000000..ab880823a3 --- /dev/null +++ b/include/tps6586x.h @@ -0,0 +1,68 @@ +/* + * (C) Copyright 2010,2011 + * NVIDIA Corporation <www.nvidia.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __H_ +#define _TPS6586X_H_ + +enum { + /* SM0-2 PWM/PFM Mode Selection */ + TPS6586X_PWM_SM0 = 1 << 0, + TPS6586X_PWM_SM1 = 1 << 1, + TPS6586X_PWM_SM2 = 1 << 2, +}; + +/** + * Enable PWM mode for selected SM0-2 + * + * @param mask Mask of synchronous converter to enable (TPS6586X_PWM_...) + * @return 0 if ok, -1 on error + */ +int tps6586x_set_pwm_mode(int mask); + +/** + * Adjust SM0 and SM1 voltages to the given targets in incremental steps. + * + * @param sm0_target Target voltage for SM0 in 25mW units, 0=725mV, 31=1.5V + * @param sm1_target Target voltage for SM1 in 25mW units, 0=725mV, 31=1.5V + * @param step Amount to change voltage in each step, in 25mW units + * @param rate Slew ratein mV/us: 0=instantly, 1=0.11, 2=0.22, + * 3=0.44, 4=0.88, 5=1.76, 6=3.52, 7=7.04 + * @param min_sm0_over_sm1 Minimum amount by which sm0 must exceed sm1. + * If this condition is not met, no adjustment will be + * done and an error will be reported. Use -1 to skip + * this check. + * @return 0 if ok, -1 on error + */ +int tps6586x_adjust_sm0_sm1(int sm0_target, int sm1_target, int step, int rate, + int min_sm0_over_sm1); + +/** + * Set up the TPS6586X I2C bus number. This will be used for all operations + * on the device. This function must be called before using other functions. + * + * @param bus I2C bus number containing the TPS6586X chip + * @return 0 (always succeeds) + */ +int tps6586x_init(int bus); + +#endif /* _TPS6586X_H_ */ diff --git a/include/twl6035.h b/include/twl6035.h new file mode 100644 index 0000000000..e21ddbaf22 --- /dev/null +++ b/include/twl6035.h @@ -0,0 +1,42 @@ +/* + * (C) Copyright 2012 + * Texas Instruments, <www.ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <i2c.h> + +/* I2C chip addresses */ +#define TWL6035_CHIP_ADDR 0x48 + +/* 0x1XY translates to page 1, register address 0xXY */ +#define LDO9_CTRL 0x60 +#define LDO9_VOLTAGE 0x61 + +/* Bit field definitions for LDOx_CTRL */ +#define LDO_ON (1 << 4) +#define LDO_MODE_SLEEP (1 << 2) +#define LDO_MODE_ACTIVE (1 << 0) + +int twl6035_i2c_write_u8(u8 chip_no, u8 val, u8 reg); +int twl6035_i2c_read_u8(u8 chip_no, u8 *val, u8 reg); +void twl6035_init_settings(void); +void twl6035_mmc1_poweron_ldo(void); diff --git a/include/u-boot/md5.h b/include/u-boot/md5.h index 08924cce3c..e09c16a6e3 100644 --- a/include/u-boot/md5.h +++ b/include/u-boot/md5.h @@ -11,7 +11,10 @@ struct MD5Context { __u32 buf[4]; __u32 bits[2]; - unsigned char in[64]; + union { + unsigned char in[64]; + __u32 in32[16]; + }; }; /* diff --git a/include/u-boot/zlib.h b/include/u-boot/zlib.h index fb2708186d..fbb08a3287 100644 --- a/include/u-boot/zlib.h +++ b/include/u-boot/zlib.h @@ -691,6 +691,9 @@ ZEXTERN int ZEXPORT inflateInit2_ OF((z_streamp strm, int windowBits, struct internal_state {int dummy;}; /* hack for buggy compilers */ #endif +extern void *gzalloc(void *, unsigned, unsigned); +extern void gzfree(void *, void *, unsigned); + #ifdef __cplusplus } #endif diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h index 69006e250a..5ccd1130ea 100644 --- a/include/ubi_uboot.h +++ b/include/ubi_uboot.h @@ -39,7 +39,7 @@ do { \ /* configurable */ #define CONFIG_MTD_UBI_WL_THRESHOLD 4096 -#define CONFIG_MTD_UBI_BEB_RESERVE 1 +#define CONFIG_MTD_UBI_BEB_RESERVE 6 #define UBI_IO_DEBUG 0 /* debug options (Linux: drivers/mtd/ubi/Kconfig.debug) */ @@ -57,10 +57,6 @@ do { \ #define put_device(...) #define ubi_sysfs_init(...) 0 #define ubi_sysfs_close(...) do { } while (0) -static inline int is_power_of_2(unsigned long n) -{ - return (n != 0 && ((n & (n - 1)) == 0)); -} /* FIXME */ #define MKDEV(...) 0 diff --git a/include/usb.h b/include/usb.h index 48e4bcda54..46db5c29a2 100644 --- a/include/usb.h +++ b/include/usb.h @@ -109,7 +109,9 @@ struct usb_device { int epmaxpacketout[16]; /* OUTput endpoint specific maximums */ int configno; /* selected config number */ - struct usb_device_descriptor descriptor; /* Device Descriptor */ + /* Device Descriptor */ + struct usb_device_descriptor descriptor + __attribute__((aligned(ARCH_DMA_MINALIGN))); struct usb_config config; /* config descriptor */ int have_langid; /* whether string_langid is valid yet */ @@ -139,7 +141,8 @@ struct usb_device { defined(CONFIG_USB_SL811HS) || defined(CONFIG_USB_ISP116X_HCD) || \ defined(CONFIG_USB_R8A66597_HCD) || defined(CONFIG_USB_DAVINCI) || \ defined(CONFIG_USB_OMAP3) || defined(CONFIG_USB_DA8XX) || \ - defined(CONFIG_USB_BLACKFIN) || defined(CONFIG_USB_AM35X) + defined(CONFIG_USB_BLACKFIN) || defined(CONFIG_USB_AM35X) || \ + defined(CONFIG_USB_RDA) int usb_lowlevel_init(void); int usb_lowlevel_stop(void); diff --git a/include/usb/lin_gadget_compat.h b/include/usb/lin_gadget_compat.h index fce3be7e80..5bdcb8d797 100644 --- a/include/usb/lin_gadget_compat.h +++ b/include/usb/lin_gadget_compat.h @@ -23,6 +23,8 @@ #ifndef __LIN_COMPAT_H__ #define __LIN_COMPAT_H__ +#include <linux/compat.h> + /* common */ #define spin_lock_init(...) #define spin_lock(...) @@ -36,26 +38,31 @@ #define mutex_lock(...) #define mutex_unlock(...) -#define WARN_ON(x) if (x) {printf("WARNING in %s line %d\n" \ - , __FILE__, __LINE__); } - -#define KERN_WARNING -#define KERN_ERR -#define KERN_NOTICE -#define KERN_DEBUG - #define GFP_KERNEL 0 #define IRQ_HANDLED 1 #define ENOTSUPP 524 /* Operation is not supported */ -#define kmalloc(size, type) memalign(CONFIG_SYS_CACHELINE_SIZE, size) -#define kfree(addr) free(addr) -#define mdelay(n) ({unsigned long msec = (n); while (msec--) udelay(1000); }) +#define BITS_PER_BYTE 8 +#define BITS_TO_LONGS(nr) \ + DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long)) +#define DECLARE_BITMAP(name, bits) \ + unsigned long name[BITS_TO_LONGS(bits)] + +#define small_const_nbits(nbits) \ + (__builtin_constant_p(nbits) && (nbits) <= BITS_PER_LONG) + +static inline void bitmap_zero(unsigned long *dst, int nbits) +{ + if (small_const_nbits(nbits)) + *dst = 0UL; + else { + int len = BITS_TO_LONGS(nbits) * sizeof(unsigned long); + memset(dst, 0, len); + } +} -#define __iomem -#define min_t min #define dma_cache_maint(addr, size, mode) cache_flush() void cache_flush(void); diff --git a/include/usb/musb_dma.h b/include/usb/musb_dma.h new file mode 100644 index 0000000000..4d61df2249 --- /dev/null +++ b/include/usb/musb_dma.h @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2009 Wind River Systems, Inc. + * Tom Rix <Tom.Rix@windriver.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __MUSB_DMA_H__ +#define __MUSB_DMA_H__ + + +int configure_dma_channel(u32 epnum, u16 packet_sz, u8 mode, + u32 dma_addr, u32 len, int tx); +int wait_dma_xfer_done(void); +#endif /* __MUSB_DMA_H__ */ diff --git a/include/usb/musb_udc.h b/include/usb/musb_udc.h index be808fd516..c56d958f65 100644 --- a/include/usb/musb_udc.h +++ b/include/usb/musb_udc.h @@ -35,9 +35,17 @@ void udc_enable(struct usb_device_instance *device); void udc_disable(void); void udc_startup_events(struct usb_device_instance *device); int udc_init(void); +void udc_power_on(void); +void udc_power_off(void); +int udc_soft_init(void); +void udc_hot_startup(struct usb_device_instance *device); +unsigned int udc_chars_in_rxfifo(unsigned int ep); +void poll_rx_ep(unsigned int ep); +int udc_is_initialized(void); + /* usbtty */ -#ifdef CONFIG_USB_TTY +//#ifdef CONFIG_USB_TTY #define EP0_MAX_PACKET_SIZE 64 /* MUSB_EP0_FIFOSIZE */ #define UDC_INT_ENDPOINT 1 @@ -47,7 +55,14 @@ int udc_init(void); #define UDC_IN_ENDPOINT 3 #define UDC_IN_PACKET_SIZE 64 #define UDC_BULK_PACKET_SIZE 64 +#define UDC_BULK_HS_PACKET_SIZE 512 + +#ifdef CONFIG_USB_ACM_TWO_CHANS +#define UDC_INT_ENDPOINT2 4 +#define UDC_OUT_ENDPOINT2 3 +#define UDC_IN_ENDPOINT2 2 +#endif -#endif /* CONFIG_USB_TTY */ +//#endif /* CONFIG_USB_TTY */ #endif /* __MUSB_UDC_H__ */ diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h index 6c973b6995..6a8fd44244 100644 --- a/include/usb/s3c_udc.h +++ b/include/usb/s3c_udc.h @@ -24,6 +24,7 @@ #include <asm/errno.h> #include <linux/usb/ch9.h> +#include <usbdescriptors.h> #include <linux/usb/gadget.h> #include <linux/list.h> #include <usb/lin_gadget_compat.h> @@ -111,54 +112,6 @@ extern struct s3c_udc *the_controller; #define ep_index(EP) ((EP)->bEndpointAddress&0xF) #define ep_maxpacket(EP) ((EP)->ep.maxpacket) -/*-------------------------------------------------------------------------*/ -/* #define DEBUG_UDC */ -#ifdef DEBUG_UDC -#define DBG(stuff...) printf("udc: " stuff) -#else -#define DBG(stuff...) do {} while (0) -#endif - -#ifdef DEBUG_S3C_UDC_SETUP -#define DEBUG_SETUP(fmt, args...) printk(fmt, ##args) -#else -#define DEBUG_SETUP(fmt, args...) do {} while (0) -#endif - -#ifdef DEBUG_S3C_UDC_EP0 -#define DEBUG_EP0(fmt, args...) printk(fmt, ##args) -#else -#define DEBUG_EP0(fmt, args...) do {} while (0) -#endif - -#ifdef DEBUG_S3C_UDC_ISR -#define DEBUG_ISR 1 -#else -#define DEBUG_ISR 0 -#endif - -#ifdef DEBUG_S3C_UDC_OUT_EP -#define DEBUG_OUT_EP(fmt, args...) printk(fmt, ##args) -#else -#define DEBUG_OUT_EP(fmt, args...) do {} while (0) -#endif - -#ifdef DEBUG_S3C_UDC_IN_EP -#define DEBUG_IN_EP 1 -#else -#define DEBUG_IN_EP 0 -#endif - -#if defined(DEBUG_S3C_UDC_SETUP) || defined(DEBUG_S3C_UDC_EP0) || \ - defined(DEBUG_S3C_UDC_ISR) || defined(DEBUG_S3C_UDC_OUT_EP) || \ - defined(DEBUG_S3C_UDC_IN_EP) || defined(DEBUG_S3C_UDC) -#define DEBUG -#endif - -#define ERR(stuff...) printf("ERR udc: " stuff) -#define WARN(stuff...) printf("WARNING udc: " stuff) -#define INFO(stuff...) printf("INFO udc: " stuff) - extern void otg_phy_init(struct s3c_udc *dev); extern void otg_phy_off(struct s3c_udc *dev); diff --git a/include/usb/usbserial.h b/include/usb/usbserial.h new file mode 100644 index 0000000000..7484f3d426 --- /dev/null +++ b/include/usb/usbserial.h @@ -0,0 +1,37 @@ +/* + * (C) Copyright 2003 + * Gerry Hamel, geh@ti.com, Texas Instruments + * + * (C) Copyright 2006 + * Bryan O'Donoghue, bodonoghue@codehermit.ie, CodeHermit + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __USB_SERIAL_H__ +#define __USB_SERIAL_H__ + +#define USB_ACM_CHAN_0 0 +#define USB_ACM_CHAN_1 1 + +int usbser_tstc (int chan); +int usbser_getc (int chan); +void usbser_putc (int chan, const char c); +int usbser_read(int chan, unsigned char *_buf, unsigned int len); +int usbser_write(int chan, const unsigned char *_buf, unsigned int len); +int drv_usbser_init (void); + +#endif diff --git a/include/usbdescriptors.h b/include/usbdescriptors.h index de1069f0ea..6f9d41d376 100644 --- a/include/usbdescriptors.h +++ b/include/usbdescriptors.h @@ -213,6 +213,18 @@ struct usb_interface_descriptor { u8 iInterface; } __attribute__ ((packed)); +/* usb interface association descriptor (IAD) */ +struct usb_function_descriptor { + u8 bLength; + u8 bDescriptorType; /* 0x0B */ + u8 bFirstInterface; + u8 bInterfaceCount; + u8 bFunctionClass; + u8 bFunctionSubClass; + u8 bFunctionProtocol; + u8 iFunction; +} __attribute__ ((packed)); + struct usb_configuration_descriptor { u8 bLength; u8 bDescriptorType; /* 0x2 */ diff --git a/include/usbdevice.h b/include/usbdevice.h index 3edaf8bcc2..2243356993 100644 --- a/include/usbdevice.h +++ b/include/usbdevice.h @@ -33,7 +33,7 @@ #include <common.h> #include "usbdescriptors.h" - +#include "pdl.h" #define MAX_URBS_QUEUED 5 @@ -474,8 +474,8 @@ typedef struct urb_link { * allocated for receiving data for an endpoint and used to call the * function driver to inform it that data has arrived. */ - -#define URB_BUF_SIZE 128 /* in linux we'd malloc this, but in u-boot we prefer static data */ +/* change to 256 for high speed, the buffer is 2bytes width yingchun*/ +#define URB_BUF_SIZE 512 /* in linux we'd malloc this, but in u-boot we prefer static data */ struct urb { struct usb_endpoint_instance *endpoint; @@ -488,11 +488,13 @@ struct urb { u8* buffer; unsigned int buffer_length; unsigned int actual_length; + unsigned int req_length; + int use_dma; urb_send_status_t status; int data; - u16 buffer_data[URB_BUF_SIZE]; /* data received (OUT) or being sent (IN) */ + u8 *buffer_data; /* data received (OUT) or being sent (IN) */ }; /* Endpoint configuration @@ -643,6 +645,10 @@ struct urb *first_urb_detached (urb_link * hd); void urb_append (urb_link * hd, struct urb *urb); struct urb *usbd_alloc_urb (struct usb_device_instance *device, struct usb_endpoint_instance *endpoint); +int usbd_init_urb (struct urb *urb, struct usb_device_instance *device, + struct usb_endpoint_instance *endpoint, u8 *buf, unsigned int len); +int usbd_setup_urb(struct urb *urb, u8 *buf, u32 len, int dma); +void usbd_free_urb(struct urb *urb); void usbd_dealloc_urb (struct urb *urb); /* @@ -687,6 +693,7 @@ void usbd_tx_complete (struct usb_endpoint_instance *endpoint); #ifdef DEBUG static inline void print_urb(struct urb *u) { + if (!pdl_dbg_usb_ep0) return; serial_printf("urb %p\n", (u)); serial_printf("\tendpoint %p\n", u->endpoint); serial_printf("\tdevice %p\n", u->device); @@ -699,6 +706,7 @@ static inline void print_urb(struct urb *u) static inline void print_usb_device_request(struct usb_device_request *r) { + if (!pdl_dbg_usb_ep0) return; serial_printf("usb request\n"); serial_printf("\tbmRequestType 0x%2.2x\n", r->bmRequestType); if ((r->bmRequestType & USB_REQ_DIRECTION_MASK) == 0) diff --git a/include/version.h b/include/version.h index c908bd3013..9f3fbf3de0 100644 --- a/include/version.h +++ b/include/version.h @@ -24,11 +24,11 @@ #ifndef __VERSION_H__ #define __VERSION_H__ -#include <timestamp.h> - -#ifndef DO_DEPS_ONLY -#include "generated/version_autogenerated.h" -#endif +// Only include: +// #include "generated/version_autogenerated.h" +// in files that directly use the version macros: +// PLAIN_VERSION, U_BOOT_VERSION, CC_VERSION_STRING, LD_VERSION_STRING +// or U_BOOT_VERSION_STRING #ifndef CONFIG_IDENT_STRING #define CONFIG_IDENT_STRING "" |