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Diffstat (limited to 'db845c/firmware/bdwlan.txt')
| -rw-r--r-- | db845c/firmware/bdwlan.txt | 5223 |
1 files changed, 0 insertions, 5223 deletions
diff --git a/db845c/firmware/bdwlan.txt b/db845c/firmware/bdwlan.txt deleted file mode 100644 index 5c0df64..0000000 --- a/db845c/firmware/bdwlan.txt +++ /dev/null @@ -1,5223 +0,0 @@ -nvBaseId__0_0 1 -nvBaseLen__0_0 1028 -nvBaseFlag__0_0 0x0 -length__0_0 19152 -checksum__0_0 0xc7a2 -bdf_version__0_0 0x2 -template_version__0_0 0x1 -macAddr__0_0 0x0 0x0 0x0 0x0 0x0 0x0 -regDmn__0_0 0x0 0x0 -refDesignId__0_0 0x0 -customerId__0_0 0x0 -projectId__0_0 0x0 -boardDataRev__0_0 0x0 -rfSilent__0_0 0x0 -wlanLedGpio__0_0 0x0 -nvMacFlag__0_0 1 -calSmVersion__0_0 0x0 -concurrencyModeMask__0_0 0x0 -commonBoardFlags__0_0 0x0 -overwriteCdacIn__0_0 0x0 -overwriteCdacOut__0_0 0x0 -otpCdacIn__0_0 0x0 -otpCdacOut__0_0 0x0 -fineCorrectionCdacIn__0_0 0x0 -fineCorrectionCdacOut__0_0 0x0 -checkTrainingStatusDelay__0_0 0x190 -intPaConfig_rtcExSel__0_0 0x0 -mipiPowerMode__0_0 0 -calRFId__0_0 2 -calBBId__0_0 1 -dbsTableSelect__0_0 0x0 0x0 0x0 0x0 -sensitivityAdjustment__0_0 0 -swreg__0_0 0x0 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-fullpdadc_read_B0_G_11_6 0 -fullmeas_pwr_B0_G_11_6 0 -fullpdadc_read_B0_G_11_7 0 -fullmeas_pwr_B0_G_11_7 0 -fullpdadc_read_B0_G_11_8 0 -fullmeas_pwr_B0_G_11_8 0 -fullpdadc_read_B0_G_11_9 0 -fullmeas_pwr_B0_G_11_9 0 -fullpdadc_read_B1_G_11_0 0 -fullmeas_pwr_B1_G_11_0 0 -fullpdadc_read_B1_G_11_1 0 -fullmeas_pwr_B1_G_11_1 0 -fullpdadc_read_B1_G_11_2 0 -fullmeas_pwr_B1_G_11_2 0 -fullpdadc_read_B1_G_11_3 0 -fullmeas_pwr_B1_G_11_3 0 -fullpdadc_read_B1_G_11_4 0 -fullmeas_pwr_B1_G_11_4 0 -fullpdadc_read_B1_G_11_5 0 -fullmeas_pwr_B1_G_11_5 0 -fullpdadc_read_B1_G_11_6 0 -fullmeas_pwr_B1_G_11_6 0 -fullpdadc_read_B1_G_11_7 0 -fullmeas_pwr_B1_G_11_7 0 -fullpdadc_read_B1_G_11_8 0 -fullmeas_pwr_B1_G_11_8 0 -fullpdadc_read_B1_G_11_9 0 -fullmeas_pwr_B1_G_11_9 0 -fullpdadc_read_B0_G_12_0 0 -fullmeas_pwr_B0_G_12_0 0 -fullpdadc_read_B0_G_12_1 0 -fullmeas_pwr_B0_G_12_1 0 -fullpdadc_read_B0_G_12_2 0 -fullmeas_pwr_B0_G_12_2 0 -fullpdadc_read_B0_G_12_3 0 -fullmeas_pwr_B0_G_12_3 0 -fullpdadc_read_B0_G_12_4 0 -fullmeas_pwr_B0_G_12_4 0 -fullpdadc_read_B0_G_12_5 0 -fullmeas_pwr_B0_G_12_5 0 -fullpdadc_read_B0_G_12_6 0 -fullmeas_pwr_B0_G_12_6 0 -fullpdadc_read_B0_G_12_7 0 -fullmeas_pwr_B0_G_12_7 0 -fullpdadc_read_B0_G_12_8 0 -fullmeas_pwr_B0_G_12_8 0 -fullpdadc_read_B0_G_12_9 0 -fullmeas_pwr_B0_G_12_9 0 -fullpdadc_read_B1_G_12_0 0 -fullmeas_pwr_B1_G_12_0 0 -fullpdadc_read_B1_G_12_1 0 -fullmeas_pwr_B1_G_12_1 0 -fullpdadc_read_B1_G_12_2 0 -fullmeas_pwr_B1_G_12_2 0 -fullpdadc_read_B1_G_12_3 0 -fullmeas_pwr_B1_G_12_3 0 -fullpdadc_read_B1_G_12_4 0 -fullmeas_pwr_B1_G_12_4 0 -fullpdadc_read_B1_G_12_5 0 -fullmeas_pwr_B1_G_12_5 0 -fullpdadc_read_B1_G_12_6 0 -fullmeas_pwr_B1_G_12_6 0 -fullpdadc_read_B1_G_12_7 0 -fullmeas_pwr_B1_G_12_7 0 -fullpdadc_read_B1_G_12_8 0 -fullmeas_pwr_B1_G_12_8 0 -fullpdadc_read_B1_G_12_9 0 -fullmeas_pwr_B1_G_12_9 0 -fullpdadc_read_B0_G_13_0 0 -fullmeas_pwr_B0_G_13_0 0 -fullpdadc_read_B0_G_13_1 0 -fullmeas_pwr_B0_G_13_1 0 -fullpdadc_read_B0_G_13_2 0 -fullmeas_pwr_B0_G_13_2 0 -fullpdadc_read_B0_G_13_3 0 -fullmeas_pwr_B0_G_13_3 0 -fullpdadc_read_B0_G_13_4 0 -fullmeas_pwr_B0_G_13_4 0 -fullpdadc_read_B0_G_13_5 0 -fullmeas_pwr_B0_G_13_5 0 -fullpdadc_read_B0_G_13_6 0 -fullmeas_pwr_B0_G_13_6 0 -fullpdadc_read_B0_G_13_7 0 -fullmeas_pwr_B0_G_13_7 0 -fullpdadc_read_B0_G_13_8 0 -fullmeas_pwr_B0_G_13_8 0 -fullpdadc_read_B0_G_13_9 0 -fullmeas_pwr_B0_G_13_9 0 -fullpdadc_read_B1_G_13_0 0 -fullmeas_pwr_B1_G_13_0 0 -fullpdadc_read_B1_G_13_1 0 -fullmeas_pwr_B1_G_13_1 0 -fullpdadc_read_B1_G_13_2 0 -fullmeas_pwr_B1_G_13_2 0 -fullpdadc_read_B1_G_13_3 0 -fullmeas_pwr_B1_G_13_3 0 -fullpdadc_read_B1_G_13_4 0 -fullmeas_pwr_B1_G_13_4 0 -fullpdadc_read_B1_G_13_5 0 -fullmeas_pwr_B1_G_13_5 0 -fullpdadc_read_B1_G_13_6 0 -fullmeas_pwr_B1_G_13_6 0 -fullpdadc_read_B1_G_13_7 0 -fullmeas_pwr_B1_G_13_7 0 -fullpdadc_read_B1_G_13_8 0 -fullmeas_pwr_B1_G_13_8 0 -fullpdadc_read_B1_G_13_9 0 -fullmeas_pwr_B1_G_13_9 0 -calOffsetFreqPier2G_G_0_0 112 142 172 184 -calOffsetPierData2G_B0_G_0_0 0 0 0 0 -calOffsetPierData2G_B1_G_0_0 0 0 0 0 -offsetThreshold2G_G_0_0 0 -calData2GFuture 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 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-meas_pwr_B1_A_0_0 147 -paSet_txgainIdx_B1_A_0_1 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B1_A_0_1 137 -paSet_txgainIdx_B1_A_0_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B1_A_0_2 115 -paSet_txgainIdx_B1_A_0_3 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B1_A_0_3 104 -paSet_txgainIdx_B1_A_0_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B1_A_0_4 78 -paSet_txgainIdx_B1_A_0_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_0_5 60 -paSet_txgainIdx_B1_A_0_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_0_6 60 -paSet_txgainIdx_B1_A_0_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_0_7 60 -dacGain_A_0_0 -8 -8 -thermCalVal_A_0_0 123 123 -voltCalVal_A_0_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_1_0 pasetting:0x3 txgainIdx:0xa -meas_pwr_B0_A_1_0 150 -paSet_txgainIdx_B0_A_1_1 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B0_A_1_1 130 -paSet_txgainIdx_B0_A_1_2 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B0_A_1_2 119 -paSet_txgainIdx_B0_A_1_3 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B0_A_1_3 97 -paSet_txgainIdx_B0_A_1_4 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B0_A_1_4 75 -paSet_txgainIdx_B0_A_1_5 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B0_A_1_5 60 -paSet_txgainIdx_B0_A_1_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_1_6 42 -paSet_txgainIdx_B0_A_1_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_1_7 42 -paSet_txgainIdx_B1_A_1_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B1_A_1_0 145 -paSet_txgainIdx_B1_A_1_1 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B1_A_1_1 134 -paSet_txgainIdx_B1_A_1_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B1_A_1_2 112 -paSet_txgainIdx_B1_A_1_3 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B1_A_1_3 101 -paSet_txgainIdx_B1_A_1_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B1_A_1_4 74 -paSet_txgainIdx_B1_A_1_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_1_5 57 -paSet_txgainIdx_B1_A_1_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_1_6 57 -paSet_txgainIdx_B1_A_1_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_1_7 57 -dacGain_A_1_0 -8 -8 -thermCalVal_A_1_0 123 123 -voltCalVal_A_1_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_2_0 pasetting:0x3 txgainIdx:0x9 -meas_pwr_B0_A_2_0 144 -paSet_txgainIdx_B0_A_2_1 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B0_A_2_1 135 -paSet_txgainIdx_B0_A_2_2 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B0_A_2_2 124 -paSet_txgainIdx_B0_A_2_3 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B0_A_2_3 103 -paSet_txgainIdx_B0_A_2_4 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B0_A_2_4 81 -paSet_txgainIdx_B0_A_2_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_2_5 48 -paSet_txgainIdx_B0_A_2_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_2_6 48 -paSet_txgainIdx_B0_A_2_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_2_7 48 -paSet_txgainIdx_B1_A_2_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B1_A_2_0 149 -paSet_txgainIdx_B1_A_2_1 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B1_A_2_1 138 -paSet_txgainIdx_B1_A_2_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B1_A_2_2 116 -paSet_txgainIdx_B1_A_2_3 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B1_A_2_3 105 -paSet_txgainIdx_B1_A_2_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B1_A_2_4 79 -paSet_txgainIdx_B1_A_2_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_2_5 61 -paSet_txgainIdx_B1_A_2_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_2_6 61 -paSet_txgainIdx_B1_A_2_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_2_7 61 -dacGain_A_2_0 -8 -8 -thermCalVal_A_2_0 123 123 -voltCalVal_A_2_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_3_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B0_A_3_0 145 -paSet_txgainIdx_B0_A_3_1 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B0_A_3_1 134 -paSet_txgainIdx_B0_A_3_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B0_A_3_2 114 -paSet_txgainIdx_B0_A_3_3 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B0_A_3_3 104 -paSet_txgainIdx_B0_A_3_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B0_A_3_4 78 -paSet_txgainIdx_B0_A_3_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_3_5 60 -paSet_txgainIdx_B0_A_3_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_3_6 60 -paSet_txgainIdx_B0_A_3_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_3_7 60 -paSet_txgainIdx_B1_A_3_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B1_A_3_0 153 -paSet_txgainIdx_B1_A_3_1 pasetting:0x3 txgainIdx:0x6 -meas_pwr_B1_A_3_1 129 -paSet_txgainIdx_B1_A_3_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B1_A_3_2 121 -paSet_txgainIdx_B1_A_3_3 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B1_A_3_3 100 -paSet_txgainIdx_B1_A_3_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B1_A_3_4 84 -paSet_txgainIdx_B1_A_3_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_3_5 66 -paSet_txgainIdx_B1_A_3_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_3_6 66 -paSet_txgainIdx_B1_A_3_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_3_7 66 -dacGain_A_3_0 -8 -8 -thermCalVal_A_3_0 123 123 -voltCalVal_A_3_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_4_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B0_A_4_0 149 -paSet_txgainIdx_B0_A_4_1 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B0_A_4_1 139 -paSet_txgainIdx_B0_A_4_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B0_A_4_2 118 -paSet_txgainIdx_B0_A_4_3 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B0_A_4_3 98 -paSet_txgainIdx_B0_A_4_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B0_A_4_4 83 -paSet_txgainIdx_B0_A_4_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_4_5 65 -paSet_txgainIdx_B0_A_4_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_4_6 65 -paSet_txgainIdx_B0_A_4_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_4_7 65 -paSet_txgainIdx_B1_A_4_0 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B1_A_4_0 150 -paSet_txgainIdx_B1_A_4_1 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B1_A_4_1 129 -paSet_txgainIdx_B1_A_4_2 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B1_A_4_2 120 -paSet_txgainIdx_B1_A_4_3 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B1_A_4_3 108 -paSet_txgainIdx_B1_A_4_4 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_4_4 76 -paSet_txgainIdx_B1_A_4_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_4_5 76 -paSet_txgainIdx_B1_A_4_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_4_6 76 -paSet_txgainIdx_B1_A_4_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_4_7 76 -dacGain_A_4_0 -8 -8 -thermCalVal_A_4_0 123 123 -voltCalVal_A_4_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_5_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B0_A_5_0 148 -paSet_txgainIdx_B0_A_5_1 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B0_A_5_1 138 -paSet_txgainIdx_B0_A_5_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B0_A_5_2 117 -paSet_txgainIdx_B0_A_5_3 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B0_A_5_3 107 -paSet_txgainIdx_B0_A_5_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B0_A_5_4 81 -paSet_txgainIdx_B0_A_5_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_5_5 62 -paSet_txgainIdx_B0_A_5_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_5_6 62 -paSet_txgainIdx_B0_A_5_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_5_7 62 -paSet_txgainIdx_B1_A_5_0 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B1_A_5_0 154 -paSet_txgainIdx_B1_A_5_1 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B1_A_5_1 132 -paSet_txgainIdx_B1_A_5_2 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B1_A_5_2 122 -paSet_txgainIdx_B1_A_5_3 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B1_A_5_3 96 -paSet_txgainIdx_B1_A_5_4 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_5_4 78 -paSet_txgainIdx_B1_A_5_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_5_5 78 -paSet_txgainIdx_B1_A_5_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_5_6 78 -paSet_txgainIdx_B1_A_5_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_5_7 78 -dacGain_A_5_0 -8 -8 -thermCalVal_A_5_0 123 123 -voltCalVal_A_5_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_6_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B0_A_6_0 148 -paSet_txgainIdx_B0_A_6_1 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B0_A_6_1 138 -paSet_txgainIdx_B0_A_6_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B0_A_6_2 116 -paSet_txgainIdx_B0_A_6_3 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B0_A_6_3 106 -paSet_txgainIdx_B0_A_6_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B0_A_6_4 80 -paSet_txgainIdx_B0_A_6_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_6_5 62 -paSet_txgainIdx_B0_A_6_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_6_6 62 -paSet_txgainIdx_B0_A_6_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_6_7 62 -paSet_txgainIdx_B1_A_6_0 pasetting:0x3 txgainIdx:0x6 -meas_pwr_B1_A_6_0 145 -paSet_txgainIdx_B1_A_6_1 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B1_A_6_1 137 -paSet_txgainIdx_B1_A_6_2 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B1_A_6_2 116 -paSet_txgainIdx_B1_A_6_3 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B1_A_6_3 100 -paSet_txgainIdx_B1_A_6_4 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_6_4 82 -paSet_txgainIdx_B1_A_6_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_6_5 82 -paSet_txgainIdx_B1_A_6_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_6_6 82 -paSet_txgainIdx_B1_A_6_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_6_7 82 -dacGain_A_6_0 -8 -8 -thermCalVal_A_6_0 123 123 -voltCalVal_A_6_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_7_0 pasetting:0x3 txgainIdx:0x8 -meas_pwr_B0_A_7_0 150 -paSet_txgainIdx_B0_A_7_1 pasetting:0x3 txgainIdx:0x7 -meas_pwr_B0_A_7_1 139 -paSet_txgainIdx_B0_A_7_2 pasetting:0x3 txgainIdx:0x5 -meas_pwr_B0_A_7_2 118 -paSet_txgainIdx_B0_A_7_3 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B0_A_7_3 96 -paSet_txgainIdx_B0_A_7_4 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B0_A_7_4 81 -paSet_txgainIdx_B0_A_7_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_7_5 63 -paSet_txgainIdx_B0_A_7_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_7_6 63 -paSet_txgainIdx_B0_A_7_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B0_A_7_7 63 -paSet_txgainIdx_B1_A_7_0 pasetting:0x3 txgainIdx:0x6 -meas_pwr_B1_A_7_0 148 -paSet_txgainIdx_B1_A_7_1 pasetting:0x3 txgainIdx:0x4 -meas_pwr_B1_A_7_1 131 -paSet_txgainIdx_B1_A_7_2 pasetting:0x3 txgainIdx:0x3 -meas_pwr_B1_A_7_2 119 -paSet_txgainIdx_B1_A_7_3 pasetting:0x3 txgainIdx:0x2 -meas_pwr_B1_A_7_3 104 -paSet_txgainIdx_B1_A_7_4 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_7_4 86 -paSet_txgainIdx_B1_A_7_5 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_7_5 86 -paSet_txgainIdx_B1_A_7_6 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_7_6 86 -paSet_txgainIdx_B1_A_7_7 pasetting:0x3 txgainIdx:0x1 -meas_pwr_B1_A_7_7 86 -dacGain_A_7_0 -8 -8 -thermCalVal_A_7_0 123 123 -voltCalVal_A_7_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_8_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_8_0 0 -paSet_txgainIdx_B0_A_8_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_8_1 0 -paSet_txgainIdx_B0_A_8_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_8_2 0 -paSet_txgainIdx_B0_A_8_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_8_3 0 -paSet_txgainIdx_B0_A_8_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_8_4 0 -paSet_txgainIdx_B0_A_8_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_8_5 0 -paSet_txgainIdx_B0_A_8_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_8_6 0 -paSet_txgainIdx_B0_A_8_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_8_7 0 -paSet_txgainIdx_B1_A_8_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_8_0 0 -paSet_txgainIdx_B1_A_8_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_8_1 0 -paSet_txgainIdx_B1_A_8_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_8_2 0 -paSet_txgainIdx_B1_A_8_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_8_3 0 -paSet_txgainIdx_B1_A_8_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_8_4 0 -paSet_txgainIdx_B1_A_8_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_8_5 0 -paSet_txgainIdx_B1_A_8_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_8_6 0 -paSet_txgainIdx_B1_A_8_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_8_7 0 -dacGain_A_8_0 0 0 -thermCalVal_A_8_0 121 121 -voltCalVal_A_8_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_9_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_9_0 0 -paSet_txgainIdx_B0_A_9_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_9_1 0 -paSet_txgainIdx_B0_A_9_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_9_2 0 -paSet_txgainIdx_B0_A_9_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_9_3 0 -paSet_txgainIdx_B0_A_9_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_9_4 0 -paSet_txgainIdx_B0_A_9_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_9_5 0 -paSet_txgainIdx_B0_A_9_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_9_6 0 -paSet_txgainIdx_B0_A_9_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_9_7 0 -paSet_txgainIdx_B1_A_9_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_9_0 0 -paSet_txgainIdx_B1_A_9_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_9_1 0 -paSet_txgainIdx_B1_A_9_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_9_2 0 -paSet_txgainIdx_B1_A_9_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_9_3 0 -paSet_txgainIdx_B1_A_9_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_9_4 0 -paSet_txgainIdx_B1_A_9_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_9_5 0 -paSet_txgainIdx_B1_A_9_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_9_6 0 -paSet_txgainIdx_B1_A_9_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_9_7 0 -dacGain_A_9_0 0 0 -thermCalVal_A_9_0 121 121 -voltCalVal_A_9_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_10_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_10_0 0 -paSet_txgainIdx_B0_A_10_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_10_1 0 -paSet_txgainIdx_B0_A_10_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_10_2 0 -paSet_txgainIdx_B0_A_10_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_10_3 0 -paSet_txgainIdx_B0_A_10_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_10_4 0 -paSet_txgainIdx_B0_A_10_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_10_5 0 -paSet_txgainIdx_B0_A_10_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_10_6 0 -paSet_txgainIdx_B0_A_10_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_10_7 0 -paSet_txgainIdx_B1_A_10_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_10_0 0 -paSet_txgainIdx_B1_A_10_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_10_1 0 -paSet_txgainIdx_B1_A_10_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_10_2 0 -paSet_txgainIdx_B1_A_10_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_10_3 0 -paSet_txgainIdx_B1_A_10_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_10_4 0 -paSet_txgainIdx_B1_A_10_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_10_5 0 -paSet_txgainIdx_B1_A_10_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_10_6 0 -paSet_txgainIdx_B1_A_10_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_10_7 0 -dacGain_A_10_0 0 0 -thermCalVal_A_10_0 121 121 -voltCalVal_A_10_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_11_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_11_0 0 -paSet_txgainIdx_B0_A_11_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_11_1 0 -paSet_txgainIdx_B0_A_11_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_11_2 0 -paSet_txgainIdx_B0_A_11_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_11_3 0 -paSet_txgainIdx_B0_A_11_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_11_4 0 -paSet_txgainIdx_B0_A_11_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_11_5 0 -paSet_txgainIdx_B0_A_11_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_11_6 0 -paSet_txgainIdx_B0_A_11_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_11_7 0 -paSet_txgainIdx_B1_A_11_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_11_0 0 -paSet_txgainIdx_B1_A_11_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_11_1 0 -paSet_txgainIdx_B1_A_11_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_11_2 0 -paSet_txgainIdx_B1_A_11_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_11_3 0 -paSet_txgainIdx_B1_A_11_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_11_4 0 -paSet_txgainIdx_B1_A_11_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_11_5 0 -paSet_txgainIdx_B1_A_11_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_11_6 0 -paSet_txgainIdx_B1_A_11_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_11_7 0 -dacGain_A_11_0 0 0 -thermCalVal_A_11_0 121 121 -voltCalVal_A_11_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_12_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_12_0 0 -paSet_txgainIdx_B0_A_12_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_12_1 0 -paSet_txgainIdx_B0_A_12_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_12_2 0 -paSet_txgainIdx_B0_A_12_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_12_3 0 -paSet_txgainIdx_B0_A_12_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_12_4 0 -paSet_txgainIdx_B0_A_12_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_12_5 0 -paSet_txgainIdx_B0_A_12_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_12_6 0 -paSet_txgainIdx_B0_A_12_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_12_7 0 -paSet_txgainIdx_B1_A_12_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_12_0 0 -paSet_txgainIdx_B1_A_12_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_12_1 0 -paSet_txgainIdx_B1_A_12_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_12_2 0 -paSet_txgainIdx_B1_A_12_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_12_3 0 -paSet_txgainIdx_B1_A_12_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_12_4 0 -paSet_txgainIdx_B1_A_12_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_12_5 0 -paSet_txgainIdx_B1_A_12_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_12_6 0 -paSet_txgainIdx_B1_A_12_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_12_7 0 -dacGain_A_12_0 0 0 -thermCalVal_A_12_0 121 121 -voltCalVal_A_12_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_13_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_13_0 0 -paSet_txgainIdx_B0_A_13_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_13_1 0 -paSet_txgainIdx_B0_A_13_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_13_2 0 -paSet_txgainIdx_B0_A_13_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_13_3 0 -paSet_txgainIdx_B0_A_13_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_13_4 0 -paSet_txgainIdx_B0_A_13_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_13_5 0 -paSet_txgainIdx_B0_A_13_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_13_6 0 -paSet_txgainIdx_B0_A_13_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_13_7 0 -paSet_txgainIdx_B1_A_13_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_13_0 0 -paSet_txgainIdx_B1_A_13_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_13_1 0 -paSet_txgainIdx_B1_A_13_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_13_2 0 -paSet_txgainIdx_B1_A_13_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_13_3 0 -paSet_txgainIdx_B1_A_13_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_13_4 0 -paSet_txgainIdx_B1_A_13_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_13_5 0 -paSet_txgainIdx_B1_A_13_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_13_6 0 -paSet_txgainIdx_B1_A_13_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_13_7 0 -dacGain_A_13_0 0 0 -thermCalVal_A_13_0 121 121 -voltCalVal_A_13_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_14_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_14_0 0 -paSet_txgainIdx_B0_A_14_1 pasetting:0x0 txgainIdx:0x0 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-paSet_txgainIdx_B0_A_19_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_19_6 0 -paSet_txgainIdx_B0_A_19_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_19_7 0 -paSet_txgainIdx_B1_A_19_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_19_0 0 -paSet_txgainIdx_B1_A_19_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_19_1 0 -paSet_txgainIdx_B1_A_19_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_19_2 0 -paSet_txgainIdx_B1_A_19_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_19_3 0 -paSet_txgainIdx_B1_A_19_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_19_4 0 -paSet_txgainIdx_B1_A_19_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_19_5 0 -paSet_txgainIdx_B1_A_19_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_19_6 0 -paSet_txgainIdx_B1_A_19_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_19_7 0 -dacGain_A_19_0 0 0 -thermCalVal_A_19_0 121 121 -voltCalVal_A_19_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_20_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_20_0 0 -paSet_txgainIdx_B0_A_20_1 pasetting:0x0 txgainIdx:0x0 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-paSet_txgainIdx_B0_A_22_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_22_6 0 -paSet_txgainIdx_B0_A_22_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_22_7 0 -paSet_txgainIdx_B1_A_22_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_22_0 0 -paSet_txgainIdx_B1_A_22_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_22_1 0 -paSet_txgainIdx_B1_A_22_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_22_2 0 -paSet_txgainIdx_B1_A_22_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_22_3 0 -paSet_txgainIdx_B1_A_22_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_22_4 0 -paSet_txgainIdx_B1_A_22_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_22_5 0 -paSet_txgainIdx_B1_A_22_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_22_6 0 -paSet_txgainIdx_B1_A_22_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_22_7 0 -dacGain_A_22_0 0 0 -thermCalVal_A_22_0 121 121 -voltCalVal_A_22_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_23_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_23_0 0 -paSet_txgainIdx_B0_A_23_1 pasetting:0x0 txgainIdx:0x0 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-paSet_txgainIdx_B0_A_25_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_25_6 0 -paSet_txgainIdx_B0_A_25_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_25_7 0 -paSet_txgainIdx_B1_A_25_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_25_0 0 -paSet_txgainIdx_B1_A_25_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_25_1 0 -paSet_txgainIdx_B1_A_25_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_25_2 0 -paSet_txgainIdx_B1_A_25_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_25_3 0 -paSet_txgainIdx_B1_A_25_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_25_4 0 -paSet_txgainIdx_B1_A_25_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_25_5 0 -paSet_txgainIdx_B1_A_25_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_25_6 0 -paSet_txgainIdx_B1_A_25_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_25_7 0 -dacGain_A_25_0 0 0 -thermCalVal_A_25_0 121 121 -voltCalVal_A_25_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_26_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_26_0 0 -paSet_txgainIdx_B0_A_26_1 pasetting:0x0 txgainIdx:0x0 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-paSet_txgainIdx_B0_A_28_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_28_6 0 -paSet_txgainIdx_B0_A_28_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_28_7 0 -paSet_txgainIdx_B1_A_28_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_28_0 0 -paSet_txgainIdx_B1_A_28_1 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_28_1 0 -paSet_txgainIdx_B1_A_28_2 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_28_2 0 -paSet_txgainIdx_B1_A_28_3 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_28_3 0 -paSet_txgainIdx_B1_A_28_4 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_28_4 0 -paSet_txgainIdx_B1_A_28_5 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_28_5 0 -paSet_txgainIdx_B1_A_28_6 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_28_6 0 -paSet_txgainIdx_B1_A_28_7 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B1_A_28_7 0 -dacGain_A_28_0 0 0 -thermCalVal_A_28_0 121 121 -voltCalVal_A_28_0 0 -calOlpc5GReserved 0 0 0 -paSet_txgainIdx_B0_A_29_0 pasetting:0x0 txgainIdx:0x0 -meas_pwr_B0_A_29_0 0 -paSet_txgainIdx_B0_A_29_1 pasetting:0x0 txgainIdx:0x0 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-targetPowerTempOffset_G_0_0 0 0 -targetPowerEnablePerChainLimit_G_0_0 0x0 -targetPowerPerChainLimit_G_0_0 0 0 -targetPower2GFuture 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -targetPowerR2PTable_11bg_36_64_0_0 34 34 34 34 34 34 34 34 34 33 32 32 -targetPowerR2PTable_HT20_36_64_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 -targetPowerR2PTable_HT40_36_64_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 -targetPowerR2PTable_VHT20_36_64_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT40_36_64_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT80_36_64_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT160_36_64_0_0 20 20 20 20 20 20 20 20 20 20 -targetPowerR2PTable_DupExt_36_64_0_0 34 34 34 34 34 -targetPowerR2PTable_11bg_100_144_0_0 34 34 34 34 34 34 34 34 34 33 32 32 -targetPowerR2PTable_HT20_100_144_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 -targetPowerR2PTable_HT40_100_144_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 -targetPowerR2PTable_VHT20_100_144_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT40_100_144_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT80_100_144_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT160_100_144_0_0 20 20 20 20 20 20 20 20 20 20 -targetPowerR2PTable_DupExt_100_144_0_0 34 34 34 34 34 -targetPowerR2PTable_11bg_149_183_0_0 34 34 34 34 34 34 34 34 34 33 32 32 -targetPowerR2PTable_HT20_149_183_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 -targetPowerR2PTable_HT40_149_183_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 -targetPowerR2PTable_VHT20_149_183_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT40_149_183_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT80_149_183_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 -targetPowerR2PTable_VHT160_149_183_0_0 20 20 20 20 20 20 20 20 20 20 -targetPowerR2PTable_DupExt_149_183_0_0 34 34 34 34 34 -targetPowerTempThresh_A_0_0 0 0 -targetPowerTempOffset_A_0_0 0 0 -targetPowerEnablePerChainLimit_A_0_0 0x0 -targetPowerPerChainLimit_A_0_0 0 0 -clpcACKPowerOffsetCckG__0_0 0 -clpcACKPowerOffsetOfdmG__0_0 0 -clpcACKPowerOffsetOfdmA__0_0 0 -futureSelfGenA__0_0 0 0 0 0 0 -targetPower5GFuture 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -nvCtlId__0_0 12 -nvCtlLen__0_0 3432 -nvCtlFlag__0_0 0x0 -ctlIndex2G_11b_mode_0_G_0_0 1 -ctlIndex2G_11b_bf_reg_0_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_11b_numChMask_0_G_0_0 0x2 -ctlIndex2G_11b_numSSMask_0_G_0_0 0x1 -ctlIndex2G_11b_mode_1_G_0_0 1 -ctlIndex2G_11b_bf_reg_1_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_11b_numChMask_1_G_0_0 0x1 -ctlIndex2G_11b_numSSMask_1_G_0_0 0x1 -ctlIndex2G_11b_mode_2_G_0_0 1 -ctlIndex2G_11b_bf_reg_2_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_11b_numChMask_2_G_0_0 0x2 -ctlIndex2G_11b_numSSMask_2_G_0_0 0x1 -ctlIndex2G_11b_mode_3_G_0_0 1 -ctlIndex2G_11b_bf_reg_3_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_11b_numChMask_3_G_0_0 0x1 -ctlIndex2G_11b_numSSMask_3_G_0_0 0x1 -ctlIndex2G_11b_mode_4_G_0_0 1 -ctlIndex2G_11b_bf_reg_4_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_11b_numChMask_4_G_0_0 0x2 -ctlIndex2G_11b_numSSMask_4_G_0_0 0x1 -ctlIndex2G_11b_mode_5_G_0_0 1 -ctlIndex2G_11b_bf_reg_5_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_11b_numChMask_5_G_0_0 0x1 -ctlIndex2G_11b_numSSMask_5_G_0_0 0x1 -ctlFreqbin2G_11b_G_0_0 112 117 122 127 132 137 142 147 152 157 162 167 172 184 -ctl2G11bReserved_G_0_0 0 0 -ctlData2G_11b_0_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_11b_1_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_11b_2_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_11b_3_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_11b_4_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_11b_5_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlIndex2G_HT20_mode_0_G_0_0 2 -ctlIndex2G_HT20_bf_reg_0_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT20_numChMask_0_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_0_G_0_0 0x1 -ctlIndex2G_HT20_mode_1_G_0_0 2 -ctlIndex2G_HT20_bf_reg_1_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT20_numChMask_1_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_1_G_0_0 0x2 -ctlIndex2G_HT20_mode_2_G_0_0 2 -ctlIndex2G_HT20_bf_reg_2_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT20_numChMask_2_G_0_0 0x1 -ctlIndex2G_HT20_numSSMask_2_G_0_0 0x1 -ctlIndex2G_HT20_mode_3_G_0_0 2 -ctlIndex2G_HT20_bf_reg_3_G_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT20_numChMask_3_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_3_G_0_0 0x1 -ctlIndex2G_HT20_mode_4_G_0_0 0 -ctlIndex2G_HT20_bf_reg_4_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT20_numChMask_4_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_4_G_0_0 0x1 -ctlIndex2G_HT20_mode_5_G_0_0 0 -ctlIndex2G_HT20_bf_reg_5_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT20_numChMask_5_G_0_0 0x1 -ctlIndex2G_HT20_numSSMask_5_G_0_0 0x1 -ctlIndex2G_HT20_mode_6_G_0_0 0 -ctlIndex2G_HT20_bf_reg_6_G_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT20_numChMask_6_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_6_G_0_0 0x1 -ctlIndex2G_HT20_mode_7_G_0_0 2 -ctlIndex2G_HT20_bf_reg_7_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT20_numChMask_7_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_7_G_0_0 0x1 -ctlIndex2G_HT20_mode_8_G_0_0 2 -ctlIndex2G_HT20_bf_reg_8_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT20_numChMask_8_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_8_G_0_0 0x2 -ctlIndex2G_HT20_mode_9_G_0_0 2 -ctlIndex2G_HT20_bf_reg_9_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT20_numChMask_9_G_0_0 0x1 -ctlIndex2G_HT20_numSSMask_9_G_0_0 0x1 -ctlIndex2G_HT20_mode_10_G_0_0 2 -ctlIndex2G_HT20_bf_reg_10_G_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT20_numChMask_10_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_10_G_0_0 0x1 -ctlIndex2G_HT20_mode_11_G_0_0 0 -ctlIndex2G_HT20_bf_reg_11_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT20_numChMask_11_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_11_G_0_0 0x1 -ctlIndex2G_HT20_mode_12_G_0_0 0 -ctlIndex2G_HT20_bf_reg_12_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT20_numChMask_12_G_0_0 0x1 -ctlIndex2G_HT20_numSSMask_12_G_0_0 0x1 -ctlIndex2G_HT20_mode_13_G_0_0 0 -ctlIndex2G_HT20_bf_reg_13_G_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT20_numChMask_13_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_13_G_0_0 0x1 -ctlIndex2G_HT20_mode_14_G_0_0 2 -ctlIndex2G_HT20_bf_reg_14_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT20_numChMask_14_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_14_G_0_0 0x1 -ctlIndex2G_HT20_mode_15_G_0_0 2 -ctlIndex2G_HT20_bf_reg_15_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT20_numChMask_15_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_15_G_0_0 0x2 -ctlIndex2G_HT20_mode_16_G_0_0 2 -ctlIndex2G_HT20_bf_reg_16_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT20_numChMask_16_G_0_0 0x1 -ctlIndex2G_HT20_numSSMask_16_G_0_0 0x1 -ctlIndex2G_HT20_mode_17_G_0_0 2 -ctlIndex2G_HT20_bf_reg_17_G_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT20_numChMask_17_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_17_G_0_0 0x1 -ctlIndex2G_HT20_mode_18_G_0_0 0 -ctlIndex2G_HT20_bf_reg_18_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT20_numChMask_18_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_18_G_0_0 0x1 -ctlIndex2G_HT20_mode_19_G_0_0 0 -ctlIndex2G_HT20_bf_reg_19_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT20_numChMask_19_G_0_0 0x1 -ctlIndex2G_HT20_numSSMask_19_G_0_0 0x1 -ctlIndex2G_HT20_mode_20_G_0_0 0 -ctlIndex2G_HT20_bf_reg_20_G_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT20_numChMask_20_G_0_0 0x2 -ctlIndex2G_HT20_numSSMask_20_G_0_0 0x1 -ctlFreqbin2G_HT20_G_0_0 112 117 122 127 132 137 142 147 152 157 162 167 172 184 -ctlData2G_HT20_0_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_1_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_2_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_3_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_4_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_5_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_6_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_7_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_8_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_9_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_10_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_11_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_12_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_13_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_14_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_15_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_16_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_17_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_18_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_19_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT20_20_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlPad2 0 0 -ctlIndex2G_HT40_mode_0_G_0_0 3 -ctlIndex2G_HT40_bf_reg_0_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT40_numChMask_0_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_0_G_0_0 0x1 -ctlIndex2G_HT40_mode_1_G_0_0 3 -ctlIndex2G_HT40_bf_reg_1_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT40_numChMask_1_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_1_G_0_0 0x2 -ctlIndex2G_HT40_mode_2_G_0_0 3 -ctlIndex2G_HT40_bf_reg_2_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT40_numChMask_2_G_0_0 0x1 -ctlIndex2G_HT40_numSSMask_2_G_0_0 0x1 -ctlIndex2G_HT40_mode_3_G_0_0 3 -ctlIndex2G_HT40_bf_reg_3_G_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex2G_HT40_numChMask_3_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_3_G_0_0 0x1 -ctlIndex2G_HT40_mode_4_G_0_0 3 -ctlIndex2G_HT40_bf_reg_4_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT40_numChMask_4_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_4_G_0_0 0x1 -ctlIndex2G_HT40_mode_5_G_0_0 3 -ctlIndex2G_HT40_bf_reg_5_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT40_numChMask_5_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_5_G_0_0 0x2 -ctlIndex2G_HT40_mode_6_G_0_0 3 -ctlIndex2G_HT40_bf_reg_6_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT40_numChMask_6_G_0_0 0x1 -ctlIndex2G_HT40_numSSMask_6_G_0_0 0x1 -ctlIndex2G_HT40_mode_7_G_0_0 3 -ctlIndex2G_HT40_bf_reg_7_G_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex2G_HT40_numChMask_7_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_7_G_0_0 0x1 -ctlIndex2G_HT40_mode_8_G_0_0 3 -ctlIndex2G_HT40_bf_reg_8_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT40_numChMask_8_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_8_G_0_0 0x1 -ctlIndex2G_HT40_mode_9_G_0_0 3 -ctlIndex2G_HT40_bf_reg_9_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT40_numChMask_9_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_9_G_0_0 0x2 -ctlIndex2G_HT40_mode_10_G_0_0 3 -ctlIndex2G_HT40_bf_reg_10_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT40_numChMask_10_G_0_0 0x1 -ctlIndex2G_HT40_numSSMask_10_G_0_0 0x1 -ctlIndex2G_HT40_mode_11_G_0_0 3 -ctlIndex2G_HT40_bf_reg_11_G_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex2G_HT40_numChMask_11_G_0_0 0x2 -ctlIndex2G_HT40_numSSMask_11_G_0_0 0x1 -ctlFreqbin2G_HT40_G_0_0 122 127 132 137 142 147 152 157 162 -ctl2GHT40Reserved_G_0_0 0 0 0 -ctlData2G_HT40_0_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_1_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_2_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_3_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_4_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_5_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_6_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_7_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_8_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_9_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_10_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlData2G_HT40_11_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc -ctlSpare2G 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -ctlIndex5G_11a_mode_0_A_0_0 0 -ctlIndex5G_11a_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_11a_numChMask_0_A_0_0 0x2 -ctlIndex5G_11a_numSSMask_0_A_0_0 0x1 -ctlIndex5G_11a_mode_1_A_0_0 0 -ctlIndex5G_11a_bf_reg_1_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_11a_numChMask_1_A_0_0 0x1 -ctlIndex5G_11a_numSSMask_1_A_0_0 0x1 -ctlIndex5G_11a_mode_2_A_0_0 0 -ctlIndex5G_11a_bf_reg_2_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex5G_11a_numChMask_2_A_0_0 0x2 -ctlIndex5G_11a_numSSMask_2_A_0_0 0x1 -ctlIndex5G_11a_mode_3_A_0_0 0 -ctlIndex5G_11a_bf_reg_3_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_11a_numChMask_3_A_0_0 0x2 -ctlIndex5G_11a_numSSMask_3_A_0_0 0x1 -ctlIndex5G_11a_mode_4_A_0_0 0 -ctlIndex5G_11a_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_11a_numChMask_4_A_0_0 0x1 -ctlIndex5G_11a_numSSMask_4_A_0_0 0x1 -ctlIndex5G_11a_mode_5_A_0_0 0 -ctlIndex5G_11a_bf_reg_5_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex5G_11a_numChMask_5_A_0_0 0x2 -ctlIndex5G_11a_numSSMask_5_A_0_0 0x1 -ctlIndex5G_11a_mode_6_A_0_0 0 -ctlIndex5G_11a_bf_reg_6_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_11a_numChMask_6_A_0_0 0x2 -ctlIndex5G_11a_numSSMask_6_A_0_0 0x1 -ctlIndex5G_11a_mode_7_A_0_0 0 -ctlIndex5G_11a_bf_reg_7_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_11a_numChMask_7_A_0_0 0x1 -ctlIndex5G_11a_numSSMask_7_A_0_0 0x1 -ctlIndex5G_11a_mode_8_A_0_0 0 -ctlIndex5G_11a_bf_reg_8_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex5G_11a_numChMask_8_A_0_0 0x2 -ctlIndex5G_11a_numSSMask_8_A_0_0 0x1 -ctlFreqbin5G_11a_A_0_0 76 80 84 88 92 96 100 104 140 144 148 152 156 160 164 168 172 176 180 184 189 193 197 201 205 255 255 255 255 -ctl5G11aReserved_A_0_0 0 -ctlData5G_11a_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_11a_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_11a_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_11a_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_11a_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_11a_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_11a_6_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_11a_7_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_11a_8_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlPad4 0 0 0 -ctlIndex5G_HT20_mode_0_A_0_0 2 -ctlIndex5G_HT20_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_HT20_numChMask_0_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_0_A_0_0 0x1 -ctlIndex5G_HT20_mode_1_A_0_0 2 -ctlIndex5G_HT20_bf_reg_1_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_HT20_numChMask_1_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_1_A_0_0 0x2 -ctlIndex5G_HT20_mode_2_A_0_0 2 -ctlIndex5G_HT20_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_HT20_numChMask_2_A_0_0 0x1 -ctlIndex5G_HT20_numSSMask_2_A_0_0 0x1 -ctlIndex5G_HT20_mode_3_A_0_0 2 -ctlIndex5G_HT20_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex5G_HT20_numChMask_3_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_3_A_0_0 0x1 -ctlIndex5G_HT20_mode_4_A_0_0 2 -ctlIndex5G_HT20_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_HT20_numChMask_4_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_4_A_0_0 0x1 -ctlIndex5G_HT20_mode_5_A_0_0 2 -ctlIndex5G_HT20_bf_reg_5_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_HT20_numChMask_5_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_5_A_0_0 0x2 -ctlIndex5G_HT20_mode_6_A_0_0 2 -ctlIndex5G_HT20_bf_reg_6_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_HT20_numChMask_6_A_0_0 0x1 -ctlIndex5G_HT20_numSSMask_6_A_0_0 0x1 -ctlIndex5G_HT20_mode_7_A_0_0 2 -ctlIndex5G_HT20_bf_reg_7_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex5G_HT20_numChMask_7_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_7_A_0_0 0x1 -ctlIndex5G_HT20_mode_8_A_0_0 2 -ctlIndex5G_HT20_bf_reg_8_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_HT20_numChMask_8_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_8_A_0_0 0x1 -ctlIndex5G_HT20_mode_9_A_0_0 2 -ctlIndex5G_HT20_bf_reg_9_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_HT20_numChMask_9_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_9_A_0_0 0x2 -ctlIndex5G_HT20_mode_10_A_0_0 2 -ctlIndex5G_HT20_bf_reg_10_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_HT20_numChMask_10_A_0_0 0x1 -ctlIndex5G_HT20_numSSMask_10_A_0_0 0x1 -ctlIndex5G_HT20_mode_11_A_0_0 2 -ctlIndex5G_HT20_bf_reg_11_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex5G_HT20_numChMask_11_A_0_0 0x2 -ctlIndex5G_HT20_numSSMask_11_A_0_0 0x1 -ctlFreqbin5G_HT20_A_0_0 76 80 84 88 92 96 100 104 140 144 148 152 156 160 164 168 172 176 180 184 189 193 197 201 205 255 255 255 255 -ctl5GHT20Reserved_A_0_0 0 0 0 -ctlData5G_HT20_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_6_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_7_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_8_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_9_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_10_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlData5G_HT20_11_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 -ctlIndex5G_HT40_mode_0_A_0_0 3 -ctlIndex5G_HT40_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_HT40_numChMask_0_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_0_A_0_0 0x1 -ctlIndex5G_HT40_mode_1_A_0_0 3 -ctlIndex5G_HT40_bf_reg_1_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_HT40_numChMask_1_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_1_A_0_0 0x2 -ctlIndex5G_HT40_mode_2_A_0_0 3 -ctlIndex5G_HT40_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_HT40_numChMask_2_A_0_0 0x1 -ctlIndex5G_HT40_numSSMask_2_A_0_0 0x1 -ctlIndex5G_HT40_mode_3_A_0_0 3 -ctlIndex5G_HT40_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex5G_HT40_numChMask_3_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_3_A_0_0 0x1 -ctlIndex5G_HT40_mode_4_A_0_0 3 -ctlIndex5G_HT40_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_HT40_numChMask_4_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_4_A_0_0 0x1 -ctlIndex5G_HT40_mode_5_A_0_0 3 -ctlIndex5G_HT40_bf_reg_5_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_HT40_numChMask_5_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_5_A_0_0 0x2 -ctlIndex5G_HT40_mode_6_A_0_0 3 -ctlIndex5G_HT40_bf_reg_6_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_HT40_numChMask_6_A_0_0 0x1 -ctlIndex5G_HT40_numSSMask_6_A_0_0 0x1 -ctlIndex5G_HT40_mode_7_A_0_0 3 -ctlIndex5G_HT40_bf_reg_7_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex5G_HT40_numChMask_7_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_7_A_0_0 0x1 -ctlIndex5G_HT40_mode_8_A_0_0 3 -ctlIndex5G_HT40_bf_reg_8_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_HT40_numChMask_8_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_8_A_0_0 0x1 -ctlIndex5G_HT40_mode_9_A_0_0 3 -ctlIndex5G_HT40_bf_reg_9_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_HT40_numChMask_9_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_9_A_0_0 0x2 -ctlIndex5G_HT40_mode_10_A_0_0 3 -ctlIndex5G_HT40_bf_reg_10_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_HT40_numChMask_10_A_0_0 0x1 -ctlIndex5G_HT40_numSSMask_10_A_0_0 0x1 -ctlIndex5G_HT40_mode_11_A_0_0 3 -ctlIndex5G_HT40_bf_reg_11_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex5G_HT40_numChMask_11_A_0_0 0x2 -ctlIndex5G_HT40_numSSMask_11_A_0_0 0x1 -ctlFreqbin5G_HT40_A_0_0 78 82 86 90 94 98 102 142 146 150 154 158 162 166 170 174 178 182 191 195 199 203 -ctl5GHT40Reserved_A_0_0 0 0 -ctlData5G_HT40_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_6_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_7_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_8_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_9_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_10_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_HT40_11_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlIndex5G_VHT80_mode_0_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT80_numChMask_0_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_0_A_0_0 0x1 -ctlIndex5G_VHT80_mode_1_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_1_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT80_numChMask_1_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_1_A_0_0 0x2 -ctlIndex5G_VHT80_mode_2_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT80_numChMask_2_A_0_0 0x1 -ctlIndex5G_VHT80_numSSMask_2_A_0_0 0x1 -ctlIndex5G_VHT80_mode_3_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT80_numChMask_3_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_3_A_0_0 0x1 -ctlIndex5G_VHT80_mode_4_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT80_numChMask_4_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_4_A_0_0 0x1 -ctlIndex5G_VHT80_mode_5_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_5_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT80_numChMask_5_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_5_A_0_0 0x2 -ctlIndex5G_VHT80_mode_6_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_6_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT80_numChMask_6_A_0_0 0x1 -ctlIndex5G_VHT80_numSSMask_6_A_0_0 0x1 -ctlIndex5G_VHT80_mode_7_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_7_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT80_numChMask_7_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_7_A_0_0 0x1 -ctlIndex5G_VHT80_mode_8_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_8_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT80_numChMask_8_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_8_A_0_0 0x1 -ctlIndex5G_VHT80_mode_9_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_9_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT80_numChMask_9_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_9_A_0_0 0x2 -ctlIndex5G_VHT80_mode_10_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_10_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT80_numChMask_10_A_0_0 0x1 -ctlIndex5G_VHT80_numSSMask_10_A_0_0 0x1 -ctlIndex5G_VHT80_mode_11_A_0_0 4 -ctlIndex5G_VHT80_bf_reg_11_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT80_numChMask_11_A_0_0 0x2 -ctlIndex5G_VHT80_numSSMask_11_A_0_0 0x1 -ctlFreqbin5G_VHT80_A_0_0 82 86 90 94 98 146 150 154 158 162 166 170 174 178 195 199 -ctlData5G_VHT80_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_6_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_7_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_8_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_9_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_10_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80_11_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_0_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_0_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_0_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_1_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_1_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_1_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_1_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_2_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_2_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_2_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_3_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_3_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_3_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_4_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_4_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_4_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_5_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_5_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_5_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_5_A_0_0 0x2 -ctlModeExt5G_PrimaryLowerFreq_A_0_0 8 8 8 8 8 8 -ctlFreqbin5G_VHT80p80_PrimaryLowerFreq_A_0_0 90 154 158 162 166 170 -ctlData5G_VHT80p80_PrimaryLowerFreq_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryLowerFreq_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryLowerFreq_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryLowerFreq_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryLowerFreq_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryLowerFreq_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_0_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_0_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_0_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_1_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_1_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_1_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_1_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_2_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_2_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_2_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_3_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_3_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_3_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_4_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_4_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_4_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_5_A_0_0 7 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_5_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_5_A_0_0 0x2 -ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_5_A_0_0 0x2 -ctlModeExt5G_VHT80p80_PrimaryHigherFreq_A_0_0 9 9 9 9 9 9 -ctlFreqbin5G_VHT80p80_PrimaryHigherFreq_A_0_0 90 154 158 162 166 170 -ctlData5G_VHT80p80_PrimaryHigherFreq_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryHigherFreq_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryHigherFreq_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryHigherFreq_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryHigherFreq_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT80p80_PrimaryHigherFreq_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlIndex5G_VHT160_mode_0_A_0_0 6 -ctlIndex5G_VHT160_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT160_numChMask_0_A_0_0 0x2 -ctlIndex5G_VHT160_numSSMask_0_A_0_0 0x2 -ctlIndex5G_VHT160_mode_1_A_0_0 6 -ctlIndex5G_VHT160_bf_reg_1_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 -ctlIndex5G_VHT160_numChMask_1_A_0_0 0x2 -ctlIndex5G_VHT160_numSSMask_1_A_0_0 0x2 -ctlIndex5G_VHT160_mode_2_A_0_0 6 -ctlIndex5G_VHT160_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT160_numChMask_2_A_0_0 0x2 -ctlIndex5G_VHT160_numSSMask_2_A_0_0 0x2 -ctlIndex5G_VHT160_mode_3_A_0_0 6 -ctlIndex5G_VHT160_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 -ctlIndex5G_VHT160_numChMask_3_A_0_0 0x2 -ctlIndex5G_VHT160_numSSMask_3_A_0_0 0x2 -ctlIndex5G_VHT160_mode_4_A_0_0 6 -ctlIndex5G_VHT160_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT160_numChMask_4_A_0_0 0x2 -ctlIndex5G_VHT160_numSSMask_4_A_0_0 0x2 -ctlIndex5G_VHT160_mode_5_A_0_0 6 -ctlIndex5G_VHT160_bf_reg_5_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 -ctlIndex5G_VHT160_numChMask_5_A_0_0 0x2 -ctlIndex5G_VHT160_numSSMask_5_A_0_0 0x2 -ctlFreqbin5G_VHT160_A_0_0 90 154 158 162 166 170 -ctl5GVHT160Reserved_A_0_0 0 0 -ctlData5G_VHT160_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT160_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT160_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT160_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT160_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlData5G_VHT160_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c -ctlSpare5G 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 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-CCK2gLimit_B1_1_0 0x3c -Ofdm2gLimit_B1_1_0 0x3c -Ofdm5gLimit_B1_1_0 0x3c -pad_B1_1_0 0 -CCK2gLimit_B0_2_0 0x3c -Ofdm2gLimit_B0_2_0 0x3c -Ofdm5gLimit_B0_2_0 0x3c -pad_B0_2_0 0 -CCK2gLimit_B1_2_0 0x3c -Ofdm2gLimit_B1_2_0 0x3c -Ofdm5gLimit_B1_2_0 0x3c -pad_B1_2_0 0 -CCK2gLimit_B0_3_0 0x3c -Ofdm2gLimit_B0_3_0 0x3c -Ofdm5gLimit_B0_3_0 0x3c -pad_B0_3_0 0 -CCK2gLimit_B1_3_0 0x3c -Ofdm2gLimit_B1_3_0 0x3c -Ofdm5gLimit_B1_3_0 0x3c -pad_B1_3_0 0 -CCK2gLimit_B0_4_0 0x3c -Ofdm2gLimit_B0_4_0 0x3c -Ofdm5gLimit_B0_4_0 0x3c -pad_B0_4_0 0 -CCK2gLimit_B1_4_0 0x3c -Ofdm2gLimit_B1_4_0 0x3c -Ofdm5gLimit_B1_4_0 0x3c -pad_B1_4_0 0 -nvRxGainId__0_0 14 -nvRxGainLen__0_0 260 -nvRxGainFlag__0_0 0x0 -bandMask_G_0_0_0 0x0 -refISS_G_0_0_0 0 -rate_G_0_0_0 0 -bandWidth_G_0_0_0 0 -numChan_G_0_0_0 0 -numChain_G_0_0_0 0 -numPkts_G_0_0_0 0 -chans_G_0_0_0 0 0 0 0 -chainMasks_G_0_0_0 0x0 0x0 -rxNFCalPowerDBr_G_0_0_0 0 0 -rxNFCalPowerDBm_G_0_0_0 0 0 -rxTempMeas_G_0_0_0 0 0 -rxNFThermCalSlope_G_0_0_0 0 0 -minCcaThreshold_G_0_0_0 0 0 -rxNFCalPowerDBmDTIMSynth_G_0_0_0 0 0 -rxNFCalPowerDBr_G_0_1_0 0 0 -rxNFCalPowerDBm_G_0_1_0 0 0 -rxTempMeas_G_0_1_0 0 0 -rxNFThermCalSlope_G_0_1_0 0 0 -minCcaThreshold_G_0_1_0 0 0 -rxNFCalPowerDBmDTIMSynth_G_0_1_0 0 0 -rxNFCalPowerDBr_G_0_2_0 0 0 -rxNFCalPowerDBm_G_0_2_0 0 0 -rxTempMeas_G_0_2_0 0 0 -rxNFThermCalSlope_G_0_2_0 0 0 -minCcaThreshold_G_0_2_0 0 0 -rxNFCalPowerDBmDTIMSynth_G_0_2_0 0 0 -rxNFCalPowerDBr_G_0_3_0 0 0 -rxNFCalPowerDBm_G_0_3_0 0 0 -rxTempMeas_G_0_3_0 0 0 -rxNFThermCalSlope_G_0_3_0 0 0 -minCcaThreshold_G_0_3_0 0 0 -rxNFCalPowerDBmDTIMSynth_G_0_3_0 0 0 -bandMask_A_0_0_0 0x0 -refISS_A_0_0_0 0 -rate_A_0_0_0 0 -bandWidth_A_0_0_0 0 -numChan_A_0_0_0 0 -numChain_A_0_0_0 0 -numPkts_A_0_0_0 0 -chans_A_0_0_0 0 0 0 0 -chainMasks_A_0_0_0 0x0 0x0 -rxNFCalPowerDBr_A_0_0_0 0 0 -rxNFCalPowerDBm_A_0_0_0 0 0 -rxTempMeas_A_0_0_0 0 0 -rxNFThermCalSlope_A_0_0_0 0 0 -minCcaThreshold_A_0_0_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_0_0_0 0 0 -rxNFCalPowerDBr_A_0_1_0 0 0 -rxNFCalPowerDBm_A_0_1_0 0 0 -rxTempMeas_A_0_1_0 0 0 -rxNFThermCalSlope_A_0_1_0 0 0 -minCcaThreshold_A_0_1_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_0_1_0 0 0 -rxNFCalPowerDBr_A_0_2_0 0 0 -rxNFCalPowerDBm_A_0_2_0 0 0 -rxTempMeas_A_0_2_0 0 0 -rxNFThermCalSlope_A_0_2_0 0 0 -minCcaThreshold_A_0_2_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_0_2_0 0 0 -rxNFCalPowerDBr_A_0_3_0 0 0 -rxNFCalPowerDBm_A_0_3_0 0 0 -rxTempMeas_A_0_3_0 0 0 -rxNFThermCalSlope_A_0_3_0 0 0 -minCcaThreshold_A_0_3_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_0_3_0 0 0 -bandMask_A_1_0_0 0x0 -refISS_A_1_0_0 0 -rate_A_1_0_0 0 -bandWidth_A_1_0_0 0 -numChan_A_1_0_0 0 -numChain_A_1_0_0 0 -numPkts_A_1_0_0 0 -chans_A_1_0_0 0 0 0 0 -chainMasks_A_1_0_0 0x0 0x0 -rxNFCalPowerDBr_A_1_0_0 0 0 -rxNFCalPowerDBm_A_1_0_0 0 0 -rxTempMeas_A_1_0_0 0 0 -rxNFThermCalSlope_A_1_0_0 0 0 -minCcaThreshold_A_1_0_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_1_0_0 0 0 -rxNFCalPowerDBr_A_1_1_0 0 0 -rxNFCalPowerDBm_A_1_1_0 0 0 -rxTempMeas_A_1_1_0 0 0 -rxNFThermCalSlope_A_1_1_0 0 0 -minCcaThreshold_A_1_1_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_1_1_0 0 0 -rxNFCalPowerDBr_A_1_2_0 0 0 -rxNFCalPowerDBm_A_1_2_0 0 0 -rxTempMeas_A_1_2_0 0 0 -rxNFThermCalSlope_A_1_2_0 0 0 -minCcaThreshold_A_1_2_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_1_2_0 0 0 -rxNFCalPowerDBr_A_1_3_0 0 0 -rxNFCalPowerDBm_A_1_3_0 0 0 -rxTempMeas_A_1_3_0 0 0 -rxNFThermCalSlope_A_1_3_0 0 0 -minCcaThreshold_A_1_3_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_1_3_0 0 0 -bandMask_A_2_0_0 0x0 -refISS_A_2_0_0 0 -rate_A_2_0_0 0 -bandWidth_A_2_0_0 0 -numChan_A_2_0_0 0 -numChain_A_2_0_0 0 -numPkts_A_2_0_0 0 -chans_A_2_0_0 0 0 0 0 -chainMasks_A_2_0_0 0x0 0x0 -rxNFCalPowerDBr_A_2_0_0 0 0 -rxNFCalPowerDBm_A_2_0_0 0 0 -rxTempMeas_A_2_0_0 0 0 -rxNFThermCalSlope_A_2_0_0 0 0 -minCcaThreshold_A_2_0_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_2_0_0 0 0 -rxNFCalPowerDBr_A_2_1_0 0 0 -rxNFCalPowerDBm_A_2_1_0 0 0 -rxTempMeas_A_2_1_0 0 0 -rxNFThermCalSlope_A_2_1_0 0 0 -minCcaThreshold_A_2_1_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_2_1_0 0 0 -rxNFCalPowerDBr_A_2_2_0 0 0 -rxNFCalPowerDBm_A_2_2_0 0 0 -rxTempMeas_A_2_2_0 0 0 -rxNFThermCalSlope_A_2_2_0 0 0 -minCcaThreshold_A_2_2_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_2_2_0 0 0 -rxNFCalPowerDBr_A_2_3_0 0 0 -rxNFCalPowerDBm_A_2_3_0 0 0 -rxTempMeas_A_2_3_0 0 0 -rxNFThermCalSlope_A_2_3_0 0 0 -minCcaThreshold_A_2_3_0 0 0 -rxNFCalPowerDBmDTIMSynth_A_2_3_0 0 0 -nvRttTableId__0_0 15 -nvRttTableLen__0_0 1016 -nvRttTableFlag__0_0 0x0 -rttTxBaseDelayLowBand_Legacy_20_160_T0_0_0 5450 0 3680 0 -rttTxBaseDelayLowBand_Ht20_20_160_T0_0_0 5350 0 3570 0 -rttTxBaseDelayLowBand_Vht20_20_160_T0_0_0 0 0 -64 0 -rttTxBaseDelayLowBand_Dup40_40_160_T0_0_0 3950 5054 0 -rttTxBaseDelayLowBand_Ht40_40_160_T0_0_0 6150 4570 0 -rttTxBaseDelayLowBand_Vht40_40_160_T0_0_0 6450 4880 0 -rttTxBaseDelayLowBand_Dup80_80_160_T0_0_0 4222 0 -rttTxBaseDelayLowBand_Vht80_80_160_T0_0_0 4110 0 -rttTxBaseDelayLowBand_Dup160_160_160_T0_0_0 0 -rttTxBaseDelayLowBand_Vht160_160_160_T0_0_0 0 -rttTxBaseDelayLowBand_rttDelay_20_160Reserved_T0_0_0 0x0 0x0 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