From af016d94f7e50ffd4ca0fe93a22cb07c06f4c4bf Mon Sep 17 00:00:00 2001 From: Leo Yan Date: Thu, 12 Mar 2015 10:23:48 +0800 Subject: arm64: dts: enable psci in hikey Enable psci in Hisilicon Hi6220 HiKey board. Signed-off-by: Haojian Zhuang Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hi6220.dtsi | 36 +++++++++++++----------------------- 1 file changed, 13 insertions(+), 23 deletions(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/hi6220.dtsi b/arch/arm64/boot/dts/hi6220.dtsi index d3428f4db9d8..e15c862600f5 100644 --- a/arch/arm64/boot/dts/hi6220.dtsi +++ b/arch/arm64/boot/dts/hi6220.dtsi @@ -9,6 +9,11 @@ #include / { + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + cpus { #address-cells = <2>; #size-cells = <0>; @@ -17,8 +22,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x0>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x740fff8>; + enable-method = "psci"; clocks = <&clock_acpu HI6220_STUB_ACPU0>; clock-names = "acpu0"; clock-latency = <0>; @@ -36,57 +40,44 @@ compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x1>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x740fff8>; - clock-latency = <0>; + enable-method = "psci"; }; cpu2: cpu@2 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x2>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x740fff8>; - clock-latency = <0>; + enable-method = "psci"; }; cpu3: cpu@3 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x3>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x740fff8>; - clock-latency = <0>; + enable-method = "psci"; }; cpu4: cpu@4 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x100>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x740fff8>; + enable-method = "psci"; clock-latency = <0>; }; cpu5: cpu@5 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x101>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x740fff8>; - clock-latency = <0>; + enable-method = "psci"; }; cpu6: cpu@6 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x102>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x740fff8>; - clock-latency = <0>; + enable-method = "psci"; }; cpu7: cpu@7 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x103>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x740fff8>; - clock-latency = <0>; + enable-method = "psci"; }; cpu-map { @@ -211,7 +202,6 @@ <1 14 0xff08>, <1 11 0xff08>, <1 10 0xff08>; - clock-frequency = <1200000>; }; reboot { -- cgit v1.2.3