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authorHaojian Zhuang <haojian.zhuang@gmail.com>2013-05-31 15:27:16 +0800
committerHaojian Zhuang <haojian.zhuang@gmail.com>2013-06-04 11:37:36 +0800
commitbee57c3a06cc66676d456e3e9e10d6e0d8778a33 (patch)
tree48e4a93e763b820ae3f3562fc3dc0366c980cbba /arch/arm/mach-mmp
parente59dea7a723a7380251e2d061bbfe2a76fcbf98f (diff)
ARM: pxa: init dma debugfs in late level
Remove pxa_init_dma() from core_initcall level since it's unncecssary for DT mode. But dma debugfs is also included in pxa_init_dma(). So only initiliaze dma debugfs in late_initcall level. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Diffstat (limited to 'arch/arm/mach-mmp')
-rw-r--r--arch/arm/mach-mmp/mmp2.c2
-rw-r--r--arch/arm/mach-mmp/pxa168.c2
-rw-r--r--arch/arm/mach-mmp/pxa910.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index f26ea9da604..a0abfd707a5 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -114,7 +114,6 @@ static int __init mmp2_init(void)
return 0;
}
-postcore_initcall(mmp2_init);
#define APBC_TIMERS APBC_REG(0x024)
@@ -122,6 +121,7 @@ void __init mmp2_timer_init(void)
{
unsigned long clk_rst;
+ mmp2_init();
__raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
/*
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 2bdec910afa..345a493a30f 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -61,7 +61,6 @@ static int __init pxa168_init(void)
return 0;
}
-postcore_initcall(pxa168_init);
/* system timer - clock enabled, 3.25MHz */
#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
@@ -69,6 +68,7 @@ postcore_initcall(pxa168_init);
void __init pxa168_timer_init(void)
{
+ pxa168_init();
/* this is early, we have to initialize the CCU registers by
* ourselves instead of using clk_* API. Clock rate is defined
* by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index df379c2d595..1a84800f850 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -100,7 +100,6 @@ static int __init pxa910_init(void)
return 0;
}
-postcore_initcall(pxa910_init);
/* system timer - clock enabled, 3.25MHz */
#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
@@ -108,6 +107,7 @@ postcore_initcall(pxa910_init);
void __init pxa910_timer_init(void)
{
+ pxa910_init();
/* reset and configure */
__raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
__raw_writel(TIMER_CLK_RST, APBC_TIMERS);