diff options
Diffstat (limited to 'arch/arm/mach-mmp')
-rw-r--r-- | arch/arm/mach-mmp/mmp2.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mmp/pxa168.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mmp/pxa910.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c index f26ea9da604..a0abfd707a5 100644 --- a/arch/arm/mach-mmp/mmp2.c +++ b/arch/arm/mach-mmp/mmp2.c @@ -114,7 +114,6 @@ static int __init mmp2_init(void) return 0; } -postcore_initcall(mmp2_init); #define APBC_TIMERS APBC_REG(0x024) @@ -122,6 +121,7 @@ void __init mmp2_timer_init(void) { unsigned long clk_rst; + mmp2_init(); __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS); /* diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c index 2bdec910afa..345a493a30f 100644 --- a/arch/arm/mach-mmp/pxa168.c +++ b/arch/arm/mach-mmp/pxa168.c @@ -61,7 +61,6 @@ static int __init pxa168_init(void) return 0; } -postcore_initcall(pxa168_init); /* system timer - clock enabled, 3.25MHz */ #define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3)) @@ -69,6 +68,7 @@ postcore_initcall(pxa168_init); void __init pxa168_timer_init(void) { + pxa168_init(); /* this is early, we have to initialize the CCU registers by * ourselves instead of using clk_* API. Clock rate is defined * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c index df379c2d595..1a84800f850 100644 --- a/arch/arm/mach-mmp/pxa910.c +++ b/arch/arm/mach-mmp/pxa910.c @@ -100,7 +100,6 @@ static int __init pxa910_init(void) return 0; } -postcore_initcall(pxa910_init); /* system timer - clock enabled, 3.25MHz */ #define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3)) @@ -108,6 +107,7 @@ postcore_initcall(pxa910_init); void __init pxa910_timer_init(void) { + pxa910_init(); /* reset and configure */ __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS); __raw_writel(TIMER_CLK_RST, APBC_TIMERS); |