diff options
author | Jun Nie <jun.nie@linaro.org> | 2018-12-19 12:03:05 +0800 |
---|---|---|
committer | Bryan O'Donoghue <bryan.odonoghue@linaro.org> | 2019-05-28 17:07:54 +0100 |
commit | 518465278f77a043b0fb3d2d0f70584240f88c3c (patch) | |
tree | 5b90884798ab758a838c2c37c7b76547fead1110 | |
parent | 4219f3bab2387afb8c2d2fc17fb40ce9679d87a4 (diff) |
pico: change uart pinmux to enable serial console
Signed-off-by: Jun Nie <jun.nie@linaro.org>
-rw-r--r-- | lib/aarch32/misc_helpers.S | 1 | ||||
-rw-r--r-- | plat/imx/common/include/imx_io_mux.h | 24 | ||||
-rw-r--r-- | plat/imx/imx7/picopi/include/platform_def.h | 9 | ||||
-rw-r--r-- | plat/imx/imx7/picopi/picopi_bl2_el3_setup.c | 80 | ||||
-rw-r--r-- | plat/imx/imx7/picopi/platform.mk | 2 |
5 files changed, 41 insertions, 75 deletions
diff --git a/lib/aarch32/misc_helpers.S b/lib/aarch32/misc_helpers.S index 6d2ec1c52..402f40340 100644 --- a/lib/aarch32/misc_helpers.S +++ b/lib/aarch32/misc_helpers.S @@ -14,6 +14,7 @@ .globl memcpy4 .globl disable_mmu_icache_secure .globl disable_mmu_secure + .arch_extension sec func smc /* diff --git a/plat/imx/common/include/imx_io_mux.h b/plat/imx/common/include/imx_io_mux.h index 9b304217e..c5f6add69 100644 --- a/plat/imx/common/include/imx_io_mux.h +++ b/plat/imx/common/include/imx_io_mux.h @@ -121,8 +121,24 @@ #define IOMUXC_SW_MUX_CTL_PAD_I2C2_SDA_OFFSET 0x0154 #define IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL_OFFSET 0x0158 #define IOMUXC_SW_MUX_CTL_PAD_I2C3_SDA_OFFSET 0x015C + #define IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_OFFSET 0x0160 +#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT0_I2C4_SCL 0x0 +#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT1_UART5_RX_DATA BIT(0) +#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT2_WDOG4_WDOG_B BIT(1) +#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT3_CSI_PIXCLK (BIT(1) | BIT(0)) +#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT4_USB_OTG1_ID BIT(2) +#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT5_GPIO4_IO14 (BIT(2) | BIT(0)) +#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT6_EPDC_VCOM0 (BIT(2) | BIT(1)) + #define IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_OFFSET 0x0164 +#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT0_I2C4_SDA 0x0 +#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT1_UART5_TX_DATA BIT(0) +#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT2_WDOG4_WDOG_RST_B_DEB BIT(1) +#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT3_CSI_MCLK (BIT(1) | BIT(0)) +#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT4_USB_OTG2_ID BIT(2) +#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT5_GPIO4_IO15 (BIT(1) | BIT(0)) +#define IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT6_EPDC_VCOM1 (BIT(2) | BIT(1)) #define IOMUXC_SW_MUX_CTL_PAD_ECSPI1_SCLK_OFFSET 0x0168 #define IOMUXC_SW_MUX_CTL_PAD_ECSPI1_SCLK_ALT0_ECSPI1_SCLK 0x00 @@ -588,7 +604,15 @@ #define IOMUXC_UART4_RTS_B_SELECT_INPUT_OFFSET 0x0708 #define IOMUXC_UART4_RX_DATA_SELECT_INPUT_OFFSET 0x070C #define IOMUXC_UART5_RTS_B_SELECT_INPUT_OFFSET 0x0710 + #define IOMUXC_UART5_RX_DATA_SELECT_INPUT_OFFSET 0x0714 +#define IOMUXC_UART5_RX_DATA_SELECT_INPUT_I2C4_SCL_ALT1 0x00 +#define IOMUXC_UART5_RX_DATA_SELECT_INPUT_I2C4_SDA_ALT1 BIT(0) +#define IOMUXC_UART5_RX_DATA_SELECT_INPUT_SAI1_RX_DATA_ALT2 BIT(1) +#define IOMUXC_UART5_RX_DATA_SELECT_INPUT_SAI1_TX_BCLK_ALT2 (BIT(1) | BIT(0)) +#define IOMUXC_UART5_RX_DATA_SELECT_INPUT_GPIO1_IO06_ALT3 BIT(2) +#define IOMUXC_UART5_RX_DATA_SELECT_INPUT_GPIO1_IO07_ALT3 (BIT(2) | BIT(1)) + #define IOMUXC_UART6_RTS_B_SELECT_INPUT_OFFSET 0x0718 #define IOMUXC_UART6_RX_DATA_SELECT_INPUT_OFFSET 0x071C #define IOMUXC_UART7_RTS_B_SELECT_INPUT_OFFSET 0x0720 diff --git a/plat/imx/imx7/picopi/include/platform_def.h b/plat/imx/imx7/picopi/include/platform_def.h index 23621d3d8..41f7585c4 100644 --- a/plat/imx/imx7/picopi/include/platform_def.h +++ b/plat/imx/imx7/picopi/include/platform_def.h @@ -172,14 +172,7 @@ #define MAX_IO_BLOCK_DEVICES 1 /* UART defines */ -#if PLAT_PICOPI_UART == 1 -#define PLAT_PICOPI_UART_BASE MXC_UART1_BASE -#elif PLAT_PICOPI_UART == 6 -#define IMX_UART_DTE -#define PLAT_PICOPI_UART_BASE MXC_UART6_BASE -#else -#error "define PLAT_PICOPI_UART=1 or PLAT_PICOPI_UART=6" -#endif +#define PLAT_PICOPI_UART_BASE MXC_UART5_BASE #define PLAT_PICOPI_BOOT_UART_BASE PLAT_PICOPI_UART_BASE #define PLAT_PICOPI_BOOT_UART_CLK_IN_HZ 24000000 diff --git a/plat/imx/imx7/picopi/picopi_bl2_el3_setup.c b/plat/imx/imx7/picopi/picopi_bl2_el3_setup.c index 3e53d0df8..4af860085 100644 --- a/plat/imx/imx7/picopi/picopi_bl2_el3_setup.c +++ b/plat/imx/imx7/picopi/picopi_bl2_el3_setup.c @@ -29,11 +29,8 @@ #include <imx_wdog.h> #include "picopi_private.h" -#define UART1_CLK_SELECT (CCM_TARGET_ROOT_ENABLE |\ - CCM_TRGT_MUX_UART1_CLK_ROOT_OSC_24M) - -#define UART6_CLK_SELECT (CCM_TARGET_ROOT_ENABLE |\ - CCM_TRGT_MUX_UART6_CLK_ROOT_OSC_24M) +#define UART5_CLK_SELECT (CCM_TARGET_ROOT_ENABLE |\ + CCM_TRGT_MUX_UART5_CLK_ROOT_OSC_24M) #define USDHC_CLK_SELECT (CCM_TARGET_ROOT_ENABLE |\ CCM_TRGT_MUX_NAND_USDHC_BUS_CLK_ROOT_AHB |\ @@ -135,67 +132,20 @@ void bl2_el3_plat_arch_setup(void) /* Setup the MMU here */ } -#define PICOPI_UART1_TX_MUX \ - IOMUXC_SW_MUX_CTL_PAD_UART1_TX_DATA_ALT0_UART1_TX_DATA - -#define PICOPI_UART1_TX_FEATURES \ - (IOMUXC_SW_PAD_CTL_PAD_UART1_TX_DATA_PS_3_100K_PU | \ - IOMUXC_SW_PAD_CTL_PAD_UART1_TX_DATA_PE_EN | \ - IOMUXC_SW_PAD_CTL_PAD_UART1_TX_DATA_HYS_EN | \ - IOMUXC_SW_PAD_CTL_PAD_UART1_TX_DATA_DSE_1_X4) - -#define PICOPI_UART1_RX_MUX \ - IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA_ALT0_UART1_RX_DATA - -#define PICOPI_UART1_RX_FEATURES \ - (IOMUXC_SW_PAD_CTL_PAD_UART1_RX_DATA_PS_3_100K_PU | \ - IOMUXC_SW_PAD_CTL_PAD_UART1_RX_DATA_PE_EN | \ - IOMUXC_SW_PAD_CTL_PAD_UART1_RX_DATA_HYS_EN | \ - IOMUXC_SW_PAD_CTL_PAD_UART1_RX_DATA_DSE_1_X4) - -#define PICOPI_UART6_TX_MUX \ - IOMUXC_SW_MUX_CTL_PAD_ECSPI1_MOSI_ALT1_UART6_TX_DATA - -#define PICOPI_UART6_TX_FEATURES \ - (IOMUXC_SW_PAD_CTL_PAD_ECSPI1_MOSI_PS_3_100K_PU | \ - IOMUXC_SW_PAD_CTL_PAD_ECSPI1_MOSI_PE_EN | \ - IOMUXC_SW_PAD_CTL_PAD_ECSPI1_MOSI_HYS_EN | \ - IOMUXC_SW_PAD_CTL_PAD_ECSPI1_MOSI_DSE_1_X4) - -#define PICOPI_UART6_RX_MUX \ - IOMUXC_SW_MUX_CTL_PAD_ECSPI1_SCLK_ALT1_UART6_RX_DATA +#define PICOPI_UART5_RX_MUX \ + IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_ALT1_UART5_RX_DATA -#define PICOPI_UART6_RX_FEATURES \ - (IOMUXC_SW_PAD_CTL_PAD_ECSPI1_SCLK_PS_3_100K_PU | \ - IOMUXC_SW_PAD_CTL_PAD_ECSPI1_SCLK_PE_EN | \ - IOMUXC_SW_PAD_CTL_PAD_ECSPI1_SCLK_HYS_EN | \ - IOMUXC_SW_PAD_CTL_PAD_ECSPI1_SCLK_DSE_1_X4) +#define PICOPI_UART5_TX_MUX \ + IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_ALT1_UART5_TX_DATA static void picopi_setup_pinmux(void) { - /* Configure UART1 TX */ - imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_UART1_TX_DATA_OFFSET, - PICOPI_UART1_TX_MUX); - imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_UART1_TX_DATA_OFFSET, - PICOPI_UART1_TX_FEATURES); - - /* Configure UART1 RX */ - imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA_OFFSET, - PICOPI_UART1_RX_MUX); - imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_UART1_RX_DATA_OFFSET, - PICOPI_UART1_RX_FEATURES); - - /* Configure UART6 TX */ - imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_ECSPI1_MOSI_OFFSET, - PICOPI_UART6_TX_MUX); - imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_ECSPI1_MOSI_OFFSET, - PICOPI_UART6_TX_FEATURES); - - /* Configure UART6 RX */ - imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_ECSPI1_SCLK_OFFSET, - PICOPI_UART6_RX_MUX); - imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_ECSPI1_SCLK_OFFSET, - PICOPI_UART6_RX_FEATURES); + /* Configure UART5 TX */ + imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA_OFFSET, + PICOPI_UART5_TX_MUX); + /* Configure UART5 RX */ + imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_OFFSET, + PICOPI_UART5_RX_MUX); } static void picopi_usdhc_setup(void) @@ -251,8 +201,7 @@ static void picopi_setup_usb_clocks(void) void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2, u_register_t arg3, u_register_t arg4) { - uint32_t uart1_en_bits = (uint32_t)UART1_CLK_SELECT; - uint32_t uart6_en_bits = (uint32_t)UART6_CLK_SELECT; + uint32_t uart5_en_bits = (uint32_t)UART5_CLK_SELECT; uint32_t usdhc_clock_sel = PLAT_PICOPI_SD - 1; /* Initialize the AIPS */ @@ -263,8 +212,7 @@ void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2, /* Initialize clocks, regulators, pin-muxes etc */ imx_clock_init(); - imx_clock_enable_uart(0, uart1_en_bits); - imx_clock_enable_uart(5, uart6_en_bits); + imx_clock_enable_uart(4, uart5_en_bits); imx_clock_enable_usdhc(usdhc_clock_sel, USDHC_CLK_SELECT); picopi_setup_system_counter(); picopi_setup_wdog_clocks(); diff --git a/plat/imx/imx7/picopi/platform.mk b/plat/imx/imx7/picopi/platform.mk index f946f03c5..81d365e68 100644 --- a/plat/imx/imx7/picopi/platform.mk +++ b/plat/imx/imx7/picopi/platform.mk @@ -121,7 +121,7 @@ SEPARATE_CODE_AND_RODATA := 1 USE_COHERENT_MEM := 1 # PLAT_PICOPI_UART -PLAT_PICOPI_UART :=1 +PLAT_PICOPI_UART :=5 $(eval $(call add_define,PLAT_PICOPI_UART)) # Add the build options to pack BLx images and kernel device tree |