diff options
Diffstat (limited to 'plat/imx/imx7/warp7/warp7_bl2_el3_setup.c')
-rw-r--r-- | plat/imx/imx7/warp7/warp7_bl2_el3_setup.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/plat/imx/imx7/warp7/warp7_bl2_el3_setup.c b/plat/imx/imx7/warp7/warp7_bl2_el3_setup.c index 0eedd2100..a0af9200d 100644 --- a/plat/imx/imx7/warp7/warp7_bl2_el3_setup.c +++ b/plat/imx/imx7/warp7/warp7_bl2_el3_setup.c @@ -22,7 +22,7 @@ #include <imx_aips.h> #include <imx_caam.h> -#include <imx_clock.h> +#include <imx7_clock.h> #include <imx_csu.h> #include <imx_gpt.h> #include <imx_io_mux.h> @@ -231,22 +231,22 @@ static void warp7_setup_wdog_clocks(void) { uint32_t wdog_en_bits = (uint32_t)WDOG_CLK_SELECT; - imx_clock_set_wdog_clk_root_bits(wdog_en_bits); - imx_clock_enable_wdog(0); - imx_clock_enable_wdog(1); - imx_clock_enable_wdog(2); - imx_clock_enable_wdog(3); + imx7_clock_set_wdog_clk_root_bits(wdog_en_bits); + imx7_clock_enable_wdog(0); + imx7_clock_enable_wdog(1); + imx7_clock_enable_wdog(2); + imx7_clock_enable_wdog(3); } static void warp7_setup_usb_clocks(void) { uint32_t usb_en_bits = (uint32_t)USB_CLK_SELECT; - imx_clock_set_usb_clk_root_bits(usb_en_bits); - imx_clock_enable_usb(CCM_CCGR_ID_USB_IPG); - imx_clock_enable_usb(CCM_CCGR_ID_USB_PHY_480MCLK); - imx_clock_enable_usb(CCM_CCGR_ID_USB_OTG1_PHY); - imx_clock_enable_usb(CCM_CCGR_ID_USB_OTG2_PHY); + imx7_clock_set_usb_clk_root_bits(usb_en_bits); + imx7_clock_enable_usb(CCM_CCGR_ID_USB_IPG); + imx7_clock_enable_usb(CCM_CCGR_ID_USB_PHY_480MCLK); + imx7_clock_enable_usb(CCM_CCGR_ID_USB_OTG1_PHY); + imx7_clock_enable_usb(CCM_CCGR_ID_USB_OTG2_PHY); } /* * bl2_el3_early_platform_setup() @@ -268,10 +268,10 @@ void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2, imx_gpt_ops_init(GPT1_BASE_ADDR); /* Initialize clocks, regulators, pin-muxes etc */ - imx_clock_init(); - imx_clock_enable_uart(0, uart1_en_bits); - imx_clock_enable_uart(5, uart6_en_bits); - imx_clock_enable_usdhc(usdhc_clock_sel, USDHC_CLK_SELECT); + imx7_clock_init(); + imx7_clock_enable_uart(0, uart1_en_bits); + imx7_clock_enable_uart(5, uart6_en_bits); + imx7_clock_enable_usdhc(usdhc_clock_sel, USDHC_CLK_SELECT); warp7_setup_system_counter(); warp7_setup_wdog_clocks(); warp7_setup_usb_clocks(); |