diff options
author | echristo <echristo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2006-04-04 22:31:41 +0000 |
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committer | echristo <echristo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2006-04-04 22:31:41 +0000 |
commit | c0e5c2031c9220bf33798b23d5fd4e61c3a605fa (patch) | |
tree | b81926d3859c893f13975d027075f7d73678d33e | |
parent | 8cf1e895c986f7e9d6f3bce412980b0e25258590 (diff) |
2006-03-22 Eric Christopher <echristo@apple.com>
Radar 4419200
2006-01-27 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/emmintrin.h (_mm_cvtsd_f64): Add missing Intel
intrinsic.
(_mm_cvtsi128_si64): Likewise.
(_mm_cvtsd_si64): Likewise.
(_mm_cvttsd_si64): Likewise.
(_mm_cvtsi64_sd): Likewise.
(_mm_cvtsi64_si128): Likewise.
* config/i386/mmintrin.h (_m_from_int64): Likewise.
(_mm_cvtsi64_m64): Likewise.
(_m_to_int64): Likewise.
(_mm_cvtm64_si64): Likewise.
* config/i386/xmmintrin.h (_mm_cvtss_si64): Likewise.
(_mm_cvttss_si64): Likewise.
(_mm_cvtsi64_ss): Likewise.
(_mm_cvtss_f32): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/apple-local-200502-branch@112681 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/ChangeLog | 21 | ||||
-rw-r--r-- | gcc/config/i386/emmintrin.h | 50 | ||||
-rw-r--r-- | gcc/config/i386/mmintrin.h | 37 | ||||
-rw-r--r-- | gcc/config/i386/xmmintrin.h | 40 |
4 files changed, 138 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 81fd604165f..b1c32cedae1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,24 @@ +2006-03-22 Eric Christopher <echristo@apple.com> + + Radar 4419200 + 2006-01-27 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/emmintrin.h (_mm_cvtsd_f64): Add missing Intel + intrinsic. + (_mm_cvtsi128_si64): Likewise. + (_mm_cvtsd_si64): Likewise. + (_mm_cvttsd_si64): Likewise. + (_mm_cvtsi64_sd): Likewise. + (_mm_cvtsi64_si128): Likewise. + * config/i386/mmintrin.h (_m_from_int64): Likewise. + (_mm_cvtsi64_m64): Likewise. + (_m_to_int64): Likewise. + (_mm_cvtm64_si64): Likewise. + * config/i386/xmmintrin.h (_mm_cvtss_si64): Likewise. + (_mm_cvttss_si64): Likewise. + (_mm_cvtsi64_ss): Likewise. + (_mm_cvtss_f32): Likewise. + 2006-03-30 Geoffrey Keating <geoffk@apple.com> Radar 4495520 diff --git a/gcc/config/i386/emmintrin.h b/gcc/config/i386/emmintrin.h index 4376ab2e882..d8a79d59a99 100644 --- a/gcc/config/i386/emmintrin.h +++ b/gcc/config/i386/emmintrin.h @@ -1,5 +1,5 @@ /* APPLE LOCAL file mainline 2005-06-30 Radar 4131077 */ -/* Copyright (C) 2003, 2004, 2005 Free Software Foundation, Inc. +/* Copyright (C) 2003, 2004, 2005, 2006 Free Software Foundation, Inc. This file is part of GCC. @@ -26,7 +26,7 @@ Public License. */ /* Implemented from the specification included in the Intel C++ Compiler - User Guide and Reference, version 8.0. */ + User Guide and Reference, version 9.0. */ #ifndef _EMMINTRIN_H_INCLUDED #define _EMMINTRIN_H_INCLUDED @@ -160,6 +160,12 @@ _mm_store_sd (double *__P, __m128d __A) *__P = __builtin_ia32_vec_ext_v2df (__A, 0); } +static __inline double __attribute__((__always_inline__, __nodebug__)) +_mm_cvtsd_f64 (__m128d __A) +{ + return __builtin_ia32_vec_ext_v2df (__A, 0); +} + static __inline void __attribute__((__always_inline__, __nodebug__)) _mm_storel_pd (double *__P, __m128d __A) { @@ -201,6 +207,14 @@ _mm_cvtsi128_si32 (__m128i __A) } #ifdef __x86_64__ +/* Intel intrinsic. */ +static __inline long long __attribute__((__always_inline__, __nodebug__)) +_mm_cvtsi128_si64 (__m128i __A) +{ + return __builtin_ia32_vec_ext_v2di ((__v2di)__A, 0); +} + +/* Microsoft intrinsic. */ static __inline long long __attribute__((__always_inline__, __nodebug__)) _mm_cvtsi128_si64x (__m128i __A) { @@ -768,6 +782,14 @@ _mm_cvtsd_si32 (__m128d __A) } #ifdef __x86_64__ +/* Intel intrinsic. */ +static __inline long long __attribute__((__always_inline__, __nodebug__)) +_mm_cvtsd_si64 (__m128d __A) +{ + return __builtin_ia32_cvtsd2si64 ((__v2df) __A); +} + +/* Microsoft intrinsic. */ static __inline long long __attribute__((__always_inline__, __nodebug__)) _mm_cvtsd_si64x (__m128d __A) { @@ -782,6 +804,14 @@ _mm_cvttsd_si32 (__m128d __A) } #ifdef __x86_64__ +/* Intel intrinsic. */ +static __inline long long __attribute__((__always_inline__, __nodebug__)) +_mm_cvttsd_si64 (__m128d __A) +{ + return __builtin_ia32_cvttsd2si64 ((__v2df) __A); +} + +/* Microsoft intrinsic. */ static __inline long long __attribute__((__always_inline__, __nodebug__)) _mm_cvttsd_si64x (__m128d __A) { @@ -802,6 +832,14 @@ _mm_cvtsi32_sd (__m128d __A, int __B) } #ifdef __x86_64__ +/* Intel intrinsic. */ +static __inline __m128d __attribute__((__always_inline__, __nodebug__)) +_mm_cvtsi64_sd (__m128d __A, long long __B) +{ + return (__m128d)__builtin_ia32_cvtsi642sd ((__v2df) __A, __B); +} + +/* Microsoft intrinsic. */ static __inline __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cvtsi64x_sd (__m128d __A, long long __B) { @@ -1358,6 +1396,14 @@ _mm_cvtsi32_si128 (int __A) } #ifdef __x86_64__ +/* Intel intrinsic. */ +static __inline __m128i __attribute__((__always_inline__, __nodebug__)) +_mm_cvtsi64_si128 (long long __A) +{ + return _mm_set_epi64x (0, __A); +} + +/* Microsoft intrinsic. */ static __inline __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtsi64x_si128 (long long __A) { diff --git a/gcc/config/i386/mmintrin.h b/gcc/config/i386/mmintrin.h index 981a4b376f8..a366783cfa3 100644 --- a/gcc/config/i386/mmintrin.h +++ b/gcc/config/i386/mmintrin.h @@ -1,5 +1,5 @@ /* APPLE LOCAL file mainline 2005-06-30 Radar 4131077 */ -/* Copyright (C) 2002, 2003, 2004, 2005 Free Software Foundation, Inc. +/* Copyright (C) 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. This file is part of GCC. @@ -26,7 +26,7 @@ Public License. */ /* Implemented from the specification included in the Intel C++ Compiler - User Guide and Reference, version 8.0. */ + User Guide and Reference, version 9.0. */ #ifndef _MMINTRIN_H_INCLUDED #define _MMINTRIN_H_INCLUDED @@ -71,13 +71,27 @@ _m_from_int (int __i) #ifdef __x86_64__ /* Convert I to a __m64 object. */ + +/* Intel intrinsic. */ +static __inline __m64 __attribute__((__always_inline__, __nodebug__)) +_m_from_int64 (long long __i) +{ + return (__m64) __i; +} + +static __inline __m64 __attribute__((__always_inline__, __nodebug__)) +_mm_cvtsi64_m64 (long long __i) +{ + return (__m64) __i; +} + +/* Microsoft intrinsic. */ static __inline __m64 __attribute__((__always_inline__, __nodebug__)) _mm_cvtsi64x_si64 (long long __i) { return (__m64) __i; } -/* Convert I to a __m64 object. */ static __inline __m64 __attribute__((__always_inline__, __nodebug__)) _mm_set_pi64x (long long __i) { @@ -99,7 +113,22 @@ _m_to_int (__m64 __i) } #ifdef __x86_64__ -/* Convert the lower 32 bits of the __m64 object into an integer. */ +/* Convert the __m64 object to a 64bit integer. */ + +/* Intel intrinsic. */ +static __inline long long __attribute__((__always_inline__, __nodebug__)) +_m_to_int64 (__m64 __i) +{ + return (long long)__i; +} + +static __inline long long __attribute__((__always_inline__, __nodebug__)) +_mm_cvtm64_si64 (__m64 __i) +{ + return (long long)__i; +} + +/* Microsoft intrinsic. */ static __inline long long __attribute__((__always_inline__, __nodebug__)) _mm_cvtsi64_si64x (__m64 __i) { diff --git a/gcc/config/i386/xmmintrin.h b/gcc/config/i386/xmmintrin.h index a582109dd6b..38cccbe068a 100644 --- a/gcc/config/i386/xmmintrin.h +++ b/gcc/config/i386/xmmintrin.h @@ -1,5 +1,5 @@ /* APPLE LOCAL file mainline 2005-06-30 Radar 4131077 */ -/* Copyright (C) 2002, 2003, 2004, 2005 Free Software Foundation, Inc. +/* Copyright (C) 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. This file is part of GCC. @@ -26,7 +26,7 @@ Public License. */ /* Implemented from the specification included in the Intel C++ Compiler - User Guide and Reference, version 8.0. */ + User Guide and Reference, version 9.0. */ #ifndef _XMMINTRIN_H_INCLUDED #define _XMMINTRIN_H_INCLUDED @@ -493,8 +493,16 @@ _mm_cvt_ss2si (__m128 __A) } #ifdef __x86_64__ -/* Convert the lower SPFP value to a 32-bit integer according to the current - rounding mode. */ +/* Convert the lower SPFP value to a 32-bit integer according to the + current rounding mode. */ +/* Intel intrinsic. */ +static __inline long long __attribute__((__always_inline__, __nodebug__)) +_mm_cvtss_si64 (__m128 __A) +{ + return __builtin_ia32_cvtss2si64 ((__v4sf) __A); +} + +/* Microsoft intrinsic. */ static __inline long long __attribute__((__always_inline__, __nodebug__)) _mm_cvtss_si64x (__m128 __A) { @@ -531,6 +539,15 @@ _mm_cvtt_ss2si (__m128 __A) #ifdef __x86_64__ /* Truncate the lower SPFP value to a 32-bit integer. */ + +/* Intel intrinsic. */ +static __inline long long __attribute__((__always_inline__, __nodebug__)) +_mm_cvttss_si64 (__m128 __A) +{ + return __builtin_ia32_cvttss2si64 ((__v4sf) __A); +} + +/* Microsoft intrinsic. */ static __inline long long __attribute__((__always_inline__, __nodebug__)) _mm_cvttss_si64x (__m128 __A) { @@ -567,6 +584,15 @@ _mm_cvt_si2ss (__m128 __A, int __B) #ifdef __x86_64__ /* Convert B to a SPFP value and insert it as element zero in A. */ + +/* Intel intrinsic. */ +static __inline __m128 __attribute__((__always_inline__, __nodebug__)) +_mm_cvtsi64_ss (__m128 __A, long long __B) +{ + return (__m128) __builtin_ia32_cvtsi642ss ((__v4sf) __A, __B); +} + +/* Microsoft intrinsic. */ static __inline __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cvtsi64x_ss (__m128 __A, long long __B) { @@ -913,6 +939,12 @@ _mm_store_ss (float *__P, __m128 __A) *__P = __builtin_ia32_vec_ext_v4sf ((__v4sf)__A, 0); } +static __inline float __attribute__((__always_inline__, __nodebug__)) +_mm_cvtss_f32 (__m128 __A) +{ + return __builtin_ia32_vec_ext_v4sf ((__v4sf)__A, 0); +} + /* Store four SPFP values. The address must be 16-byte aligned. */ static __inline void __attribute__((__always_inline__, __nodebug__)) _mm_store_ps (float *__P, __m128 __A) |