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authorhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>2009-02-28 22:29:25 +0000
committerhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>2009-02-28 22:29:25 +0000
commit5e56456bab065122a321c492b04e1ba91216b1d2 (patch)
tree75747b6395ff94f87c52cd7881ef9eda6c4aec76
parenta83051310f2f46eb96a15829d8f92ffbde1da289 (diff)
2009-02-28 H.J. Lu <hongjiu.lu@intel.com>
PR target/39327 * config/i386/sse.md (avx_addsubv8sf3): Correct item bits. (avx_addsubv4df3): Likewise. (*avx_addsubv4sf3): Likewise. (sse3_addsubv4sf3): Likewise. (*avx_addsubv2df3): Likewise. (sse3_addsubv2df3): Likewise. (avx_unpckhps256): Correct item selectors. (avx_unpcklps256): Likewise. (avx_unpckhpd256): Likewise. (avx_unpcklpd256): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@144498 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog14
-rw-r--r--gcc/config/i386/sse.md32
2 files changed, 30 insertions, 16 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 87578499cf0..4bf1384d6da 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,17 @@
+2009-02-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/39327
+ * config/i386/sse.md (avx_addsubv8sf3): Correct item bits.
+ (avx_addsubv4df3): Likewise.
+ (*avx_addsubv4sf3): Likewise.
+ (sse3_addsubv4sf3): Likewise.
+ (*avx_addsubv2df3): Likewise.
+ (sse3_addsubv2df3): Likewise.
+ (avx_unpckhps256): Correct item selectors.
+ (avx_unpcklps256): Likewise.
+ (avx_unpckhpd256): Likewise.
+ (avx_unpcklpd256): Likewise.
+
2009-02-28 Jan Hubicka <jh@suse.cz>
* tree-inline.c (expand_call_inline): Avoid duplicate declarations of
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index a54133378b5..db5b64fc3a8 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -1101,7 +1101,7 @@
(match_operand:V8SF 1 "register_operand" "x")
(match_operand:V8SF 2 "nonimmediate_operand" "xm"))
(minus:V8SF (match_dup 1) (match_dup 2))
- (const_int 85)))]
+ (const_int 66)))]
"TARGET_AVX"
"vaddsubps\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "sseadd")
@@ -1115,7 +1115,7 @@
(match_operand:V4DF 1 "register_operand" "x")
(match_operand:V4DF 2 "nonimmediate_operand" "xm"))
(minus:V4DF (match_dup 1) (match_dup 2))
- (const_int 5)))]
+ (const_int 6)))]
"TARGET_AVX"
"vaddsubpd\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "sseadd")
@@ -1129,7 +1129,7 @@
(match_operand:V4SF 1 "register_operand" "x")
(match_operand:V4SF 2 "nonimmediate_operand" "xm"))
(minus:V4SF (match_dup 1) (match_dup 2))
- (const_int 5)))]
+ (const_int 6)))]
"TARGET_AVX"
"vaddsubps\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "sseadd")
@@ -1143,7 +1143,7 @@
(match_operand:V4SF 1 "register_operand" "0")
(match_operand:V4SF 2 "nonimmediate_operand" "xm"))
(minus:V4SF (match_dup 1) (match_dup 2))
- (const_int 5)))]
+ (const_int 6)))]
"TARGET_SSE3"
"addsubps\t{%2, %0|%0, %2}"
[(set_attr "type" "sseadd")
@@ -1157,7 +1157,7 @@
(match_operand:V2DF 1 "register_operand" "x")
(match_operand:V2DF 2 "nonimmediate_operand" "xm"))
(minus:V2DF (match_dup 1) (match_dup 2))
- (const_int 1)))]
+ (const_int 2)))]
"TARGET_AVX"
"vaddsubpd\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "sseadd")
@@ -1171,7 +1171,7 @@
(match_operand:V2DF 1 "register_operand" "0")
(match_operand:V2DF 2 "nonimmediate_operand" "xm"))
(minus:V2DF (match_dup 1) (match_dup 2))
- (const_int 1)))]
+ (const_int 2)))]
"TARGET_SSE3"
"addsubpd\t{%2, %0|%0, %2}"
[(set_attr "type" "sseadd")
@@ -3059,10 +3059,10 @@
(vec_concat:V16SF
(match_operand:V8SF 1 "register_operand" "x")
(match_operand:V8SF 2 "nonimmediate_operand" "xm"))
- (parallel [(const_int 2) (const_int 6)
- (const_int 3) (const_int 7)
- (const_int 10) (const_int 14)
- (const_int 11) (const_int 15)])))]
+ (parallel [(const_int 2) (const_int 10)
+ (const_int 3) (const_int 11)
+ (const_int 6) (const_int 14)
+ (const_int 7) (const_int 15)])))]
"TARGET_AVX"
"vunpckhps\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "sselog")
@@ -3102,10 +3102,10 @@
(vec_concat:V16SF
(match_operand:V8SF 1 "register_operand" "x")
(match_operand:V8SF 2 "nonimmediate_operand" "xm"))
- (parallel [(const_int 0) (const_int 4)
- (const_int 1) (const_int 5)
- (const_int 8) (const_int 12)
- (const_int 9) (const_int 13)])))]
+ (parallel [(const_int 0) (const_int 8)
+ (const_int 1) (const_int 9)
+ (const_int 4) (const_int 12)
+ (const_int 5) (const_int 13)])))]
"TARGET_AVX"
"vunpcklps\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "sselog")
@@ -3902,7 +3902,7 @@
(vec_concat:V8DF
(match_operand:V4DF 1 "register_operand" "x")
(match_operand:V4DF 2 "nonimmediate_operand" "xm"))
- (parallel [(const_int 2) (const_int 6)
+ (parallel [(const_int 1) (const_int 5)
(const_int 3) (const_int 7)])))]
"TARGET_AVX"
"vunpckhpd\t{%2, %1, %0|%0, %1, %2}"
@@ -4023,7 +4023,7 @@
(match_operand:V4DF 1 "register_operand" "x")
(match_operand:V4DF 2 "nonimmediate_operand" "xm"))
(parallel [(const_int 0) (const_int 4)
- (const_int 1) (const_int 5)])))]
+ (const_int 2) (const_int 6)])))]
"TARGET_AVX"
"vunpcklpd\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "sselog")