[gcc]

2018-07-15  Bill Schmidt  <wschmidt@linux.ibm.com>

	Backport from mainline
	2018-07-13  Bill Schmidt  <wschmidt@linux.ibm.com>
		    Steve Munroe  <munroesj52@gmail.com>

	* config/rs6000/emmintrin.h (_mm_and_si128): New function.
	(_mm_andnot_si128): Likewise.
	(_mm_or_si128): Likewise.
	(_mm_xor_si128): Likewise.

[gcc/testsuite]

2018-07-15  Bill Schmidt  <wschmidt@linux.ibm.com>

	Backport from mainline
	2018-07-13  Bill Schmidt  <wschmidt@linux.ibm.com>
		    Steve Munroe  <munroesj52@gmail.com>

	* gcc.target/powerpc/sse2-pand-1.c: New file.
	* gcc.target/powerpc/sse2-pandn-1.c: Likewise.
	* gcc.target/powerpc/sse2-por-1.c: Likewise.
	* gcc.target/powerpc/sse2-pxor-1.c: Likewise.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-8-branch@262669 138bc75d-0d04-0410-961f-82ee72b054a4

7 files changed, 213 insertions, 0 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fcf80cdff21..2ea72bc5562 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,14 @@
+2018-07-15  Bill Schmidt  <wschmidt@linux.ibm.com>
+
+	Backport from mainline
+	2018-07-13  Bill Schmidt  <wschmidt@linux.ibm.com>
+		    Steve Munroe  <munroesj52@gmail.com>
+
+	* config/rs6000/emmintrin.h (_mm_and_si128): New function.
+	(_mm_andnot_si128): Likewise.
+	(_mm_or_si128): Likewise.
+	(_mm_xor_si128): Likewise.
+
 2018-07-14  Martin Sebor  <msebor@redhat.com>
 
 	PR tree-optimization/86274
diff --git a/gcc/config/rs6000/emmintrin.h b/gcc/config/rs6000/emmintrin.h
index 5d27a80339c..412ece7355b 100644
--- a/gcc/config/rs6000/emmintrin.h
+++ b/gcc/config/rs6000/emmintrin.h
@@ -1884,6 +1884,30 @@ _mm_xor_pd (__m128d __A, __m128d __B)
 }
 
 extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_and_si128 (__m128i __A, __m128i __B)
+{
+  return (__m128i)vec_and ((__v2di) __A, (__v2di) __B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_andnot_si128 (__m128i __A, __m128i __B)
+{
+  return (__m128i)vec_andc ((__v2di) __B, (__v2di) __A);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_or_si128 (__m128i __A, __m128i __B)
+{
+  return (__m128i)vec_or ((__v2di) __A, (__v2di) __B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_xor_si128 (__m128i __A, __m128i __B)
+{
+  return (__m128i)vec_xor ((__v2di) __A, (__v2di) __B);
+}
+
+extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm_cmpeq_epi8 (__m128i __A, __m128i __B)
 {
   return (__m128i) vec_cmpeq ((__v16qi) __A, (__v16qi)__B);
@@ -2333,3 +2357,4 @@ _mm_castsi128_pd(__m128i __A)
 }
 
 #endif /* EMMINTRIN_H_ */
+
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d1e8379dee8..6e17cbc85b0 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,14 @@
+2018-07-15  Bill Schmidt  <wschmidt@linux.ibm.com>
+
+	Backport from mainline
+	2018-07-13  Bill Schmidt  <wschmidt@linux.ibm.com>
+		    Steve Munroe  <munroesj52@gmail.com>
+
+	* gcc.target/powerpc/sse2-pand-1.c: New file.
+	* gcc.target/powerpc/sse2-pandn-1.c: Likewise.
+	* gcc.target/powerpc/sse2-por-1.c: Likewise.
+	* gcc.target/powerpc/sse2-pxor-1.c: Likewise.
+
 2018-07-14  Martin Sebor  <msebor@redhat.com>
 
 	PR tree-optimization/86274
diff --git a/gcc/testsuite/gcc.target/powerpc/sse2-pand-1.c b/gcc/testsuite/gcc.target/powerpc/sse2-pand-1.c
new file mode 100644
index 00000000000..8c5904b5cf1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/sse2-pand-1.c
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#ifndef CHECK_H
+#define CHECK_H "sse2-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse2_test_pand_1
+#endif
+
+#include <emmintrin.h>
+
+static __m128i
+__attribute__((noinline, unused))
+test (__m128i s1, __m128i s2)
+{
+  return _mm_and_si128 (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128i_b u, s1, s2;
+  char e[16];
+  int i;
+   
+  s1.x = _mm_set_epi8 (1,2,3,4,10,20,30,90,-80,-40,-100,-15,98, 25, 98,7);
+  s2.x = _mm_set_epi8 (88, 44, 33, 22, 11, 98, 76, -100, -34, -78, -39, 6, 3, 4, 5, 119);
+  u.x = test (s1.x, s2.x); 
+   
+  for (i = 0; i < 16; i++)
+     e[i] = s1.a[i] & s2.a[i];
+
+  if (check_union128i_b (u, e))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/sse2-pandn-1.c b/gcc/testsuite/gcc.target/powerpc/sse2-pandn-1.c
new file mode 100644
index 00000000000..5d0d1b7b66a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/sse2-pandn-1.c
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#ifndef CHECK_H
+#define CHECK_H "sse2-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse2_test_pandn_1
+#endif
+
+#include <emmintrin.h>
+
+static __m128i
+__attribute__((noinline, unused))
+test (__m128i s1, __m128i s2)
+{
+  return _mm_andnot_si128 (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128i_b u, s1, s2;
+  char e[16];
+  int i;
+   
+  s1.x = _mm_set_epi8 (1,2,3,4,10,20,30,90,-80,-40,-100,-15,98, 25, 98,7);
+  s2.x = _mm_set_epi8 (88, 44, 33, 22, 11, 98, 76, -100, -34, -78, -39, 6, 3, 4, 5, 119);
+  u.x = test (s1.x, s2.x); 
+   
+  for (i = 0; i < 16; i++)
+     e[i] = (~s1.a[i]) & s2.a[i];
+
+  if (check_union128i_b (u, e))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/sse2-por-1.c b/gcc/testsuite/gcc.target/powerpc/sse2-por-1.c
new file mode 100644
index 00000000000..bdd48ad6f8c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/sse2-por-1.c
@@ -0,0 +1,43 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#ifndef CHECK_H
+#define CHECK_H "sse2-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse2_test_por_1
+#endif
+
+#include <emmintrin.h>
+
+static __m128i
+__attribute__((noinline, unused))
+test (__m128i s1, __m128i s2)
+{
+  return _mm_or_si128 (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128i_w u, s1, s2;
+  short e[8];
+  int i;
+   
+  s1.x = _mm_set_epi16 (10,20,30,90,-80,-40,-100,-15);
+  s2.x = _mm_set_epi16 (11, 98, 76, -100, -34, -78, -39, 14);
+  u.x = test (s1.x, s2.x); 
+   
+  for (i = 0; i < 8; i++)
+    {
+      e[i] = s1.a[i] | s2.a[i];
+    }
+
+  if (check_union128i_w (u, e))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/sse2-pxor-1.c b/gcc/testsuite/gcc.target/powerpc/sse2-pxor-1.c
new file mode 100644
index 00000000000..cf430ee2d6f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/sse2-pxor-1.c
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target p8vector_hw } */
+
+#ifndef CHECK_H
+#define CHECK_H "sse2-check.h"
+#endif
+
+#include CHECK_H
+
+#ifndef TEST
+#define TEST sse2_test_pxor_1
+#endif
+
+#include <emmintrin.h>
+
+static __m128i
+__attribute__((noinline, unused))
+test (__m128i s1, __m128i s2)
+{
+  return _mm_xor_si128 (s1, s2); 
+}
+
+static void
+TEST (void)
+{
+  union128i_ub u, s1, s2;
+  unsigned char e[16] = {0};
+  int i; 
+   
+  s1.x = _mm_set_epi8 (1,2,3,4,10,20,30,90,80,40,100,15,98, 25, 98,7);
+  s2.x = _mm_set_epi8 (88, 44, 33, 22, 11, 98, 76, 100, 34, 78, 39, 6, 3, 4, 5, 119);
+  u.x = test (s1.x, s2.x); 
+ 
+  for (i = 0; i < 16; i++)
+    e[i] = s1.a[i] ^ s2.a[i];
+
+  if (check_union128i_ub (u, e))
+    abort ();
+}