diff options
| author | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-10-21 09:09:50 +0000 |
|---|---|---|
| committer | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-10-21 09:09:50 +0000 |
| commit | 36a24c973cfc9f59037584cce8529fca048a081e (patch) | |
| tree | 0f3feff432968cb157d7cb4a529e2cef7f0c55be | |
| parent | 07a96917c68dd72889c32adb4f1f3f935a308a34 (diff) | |
gcc/
* config/mips/mips.h (ISA_HAS_LDC1_SDC1): New macro.
* config/mips/mips.c (mips_split_64bit_move_p): Use ISA_HAS_LDC1_SDC1
instead of checking mips_isa.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@129523 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/mips/mips.c | 5 | ||||
| -rw-r--r-- | gcc/config/mips/mips.h | 3 |
3 files changed, 11 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3005f1133ea..cbc431f8e9b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2007-10-21 Richard Sandiford <rsandifo@nildram.co.uk> + * config/mips/mips.h (ISA_HAS_LDC1_SDC1): New macro. + * config/mips/mips.c (mips_split_64bit_move_p): Use ISA_HAS_LDC1_SDC1 + instead of checking mips_isa. + +2007-10-21 Richard Sandiford <rsandifo@nildram.co.uk> + * doc/invoke.texi (-mpaired-single): Don't say that the option requires 64-bit code. * config/mips/mips-protos.h (mips_modes_tieable_p): Declare. diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 419b6a498f4..0948832b8ab 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -3433,9 +3433,8 @@ mips_split_64bit_move_p (rtx dest, rtx src) if (FP_REG_RTX_P (src) && FP_REG_RTX_P (dest)) return false; - /* Check for floating-point loads and stores. They can be done using - ldc1 and sdc1 on MIPS II and above. */ - if (mips_isa > 1) + /* Check for floating-point loads and stores. */ + if (ISA_HAS_LDC1_SDC1) { if (FP_REG_RTX_P (dest) && MEM_P (src)) return false; diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 2b14f306d24..96af71e6209 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -735,6 +735,9 @@ enum mips_code_readable_setting { && !TARGET_MIPS5500 \ && !TARGET_MIPS16) +/* ISA has LDC1 and SDC1. */ +#define ISA_HAS_LDC1_SDC1 (!ISA_MIPS1 && !TARGET_MIPS16) + /* ISA has the mips4 FP condition code instructions: FP-compare to CC, branch on CC, and move (both FP and non-FP) on CC. */ #define ISA_HAS_8CC (ISA_MIPS4 \ |