diff options
author | uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-04-21 19:09:27 +0000 |
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committer | uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-04-21 19:09:27 +0000 |
commit | 920e66dcfc2535add2eec943577c2e15ef45e31e (patch) | |
tree | 6c9e802f58fdf2d76a0283b10c923a61265aa821 | |
parent | e12be0dd662a98cda1ce88c9803c92c0f0708a4f (diff) |
* gcc.target/i386/pr79804.c: Add additional dg-error directive.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@247065 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/pr79804.c | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 84d1074c8d4..95938c45013 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2017-04-21 Uros Bizjak <ubizjak@gmail.com> + + * gcc.target/i386/pr79804.c: Add additional dg-error directive. + 2017-04-21 Richard Biener <rguenther@suse.de> PR tree-optimization/79547 diff --git a/gcc/testsuite/gcc.target/i386/pr79804.c b/gcc/testsuite/gcc.target/i386/pr79804.c index 4325131ded6..c7dda69fad4 100644 --- a/gcc/testsuite/gcc.target/i386/pr79804.c +++ b/gcc/testsuite/gcc.target/i386/pr79804.c @@ -7,4 +7,4 @@ void foo (void) register int r20 asm ("20"); asm volatile ("# %0" : "=r"(r20)); /* { dg-error "invalid use of register" } */ -} +} /* { dg-error "cannot be used in asm here" } */ |