diff options
author | kelvin <kelvin@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-05-09 20:11:50 +0000 |
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committer | kelvin <kelvin@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-05-09 20:11:50 +0000 |
commit | a355e5c6cc9dad942b3babce2686ee4f8925371b (patch) | |
tree | e2766081b5745b5d95cfc04411e2196a2ba1a4b8 | |
parent | 4ec208afe425ddd81da00c089d99f17e92dc156e (diff) |
cosmetic refinements
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/ibm/kelvin-rfc2463@236046 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/config/rs6000/rs6000-builtin.def | 2 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index 3c806551d51..e7196ded2c1 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -686,7 +686,7 @@ CODE_FOR_ ## ICODE) /* ICODE */ /* Miscellaneous builtins for decimal floating point instructions - added in ISA 3.0. These instructions don't require either the VSX + added in ISA 3.0. These instructions don't require the VSX options, just the basic ISA 3.0 enablement since they operate on general purpose registers. */ #define BU_P9_DFP_MISC_0(ENUM, NAME, ATTR, ICODE) \ diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 8f4ac53e7e9..747504fd11c 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -3666,9 +3666,9 @@ rs6000_builtin_mask_calculate (void) | ((rs6000_cpu == PROCESSOR_CELL) ? RS6000_BTM_CELL : 0) | ((TARGET_P8_VECTOR) ? RS6000_BTM_P8_VECTOR : 0) | ((TARGET_P9_VECTOR) ? RS6000_BTM_P9_VECTOR : 0) - | ((TARGET_P9_MISC) ? RS6000_BTM_P9_MISC : 0) + | ((TARGET_P9_MISC) ? RS6000_BTM_P9_MISC : 0) | ((TARGET_MODULO) ? RS6000_BTM_MODULO : 0) - | ((TARGET_64BIT) ? RS6000_BTM_64BIT : 0) + | ((TARGET_64BIT) ? RS6000_BTM_64BIT : 0) | ((TARGET_CRYPTO) ? RS6000_BTM_CRYPTO : 0) | ((TARGET_HTM) ? RS6000_BTM_HTM : 0) | ((TARGET_DFP) ? RS6000_BTM_DFP : 0) |