diff options
author | ro <ro@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-11-21 15:08:03 +0000 |
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committer | ro <ro@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-11-21 15:08:03 +0000 |
commit | 2cb678f8b39d07b9113a2ea3ad0a050984b9c2f3 (patch) | |
tree | 7a605776eaf5085da826aa80d70ae95bc4701ed2 | |
parent | c0538fdb2016c3496c96ca92e574f7233a268557 (diff) |
Fix ultrasparc_vis[23]_hw tests
* lib/target-supports.exp
(check_effective_target_ultrasparc_vis2_hw): Call check_runtime
with ultrasparc_vis2_hw.
(check_effective_target_ultrasparc_vis3_hw): Call check_runtime
with ultrasparc_vis3_hw.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181582 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/testsuite/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/testsuite/lib/target-supports.exp | 4 |
2 files changed, 10 insertions, 2 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3785361a5ac..6d8010dc4d1 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,13 @@ 2011-11-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + * lib/target-supports.exp + (check_effective_target_ultrasparc_vis2_hw): Call check_runtime + with ultrasparc_vis2_hw. + (check_effective_target_ultrasparc_vis3_hw): Call check_runtime + with ultrasparc_vis3_hw. + +2011-11-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + * c-c++-common/tm/malloc.c: Scan tree dumps for std::malloc if *-*-solaris2* && c++. diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 94309102034..cd013336bda 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -2476,7 +2476,7 @@ proc check_effective_target_ultrasparc_hw { } { # instructions. We check this by attempting: "bmask %g0, %g0, %g0" proc check_effective_target_ultrasparc_vis2_hw { } { - return [check_runtime ultrasparc_hw { + return [check_runtime ultrasparc_vis2_hw { int main() { __asm__(".word 0x81b00320"); return 0; } } "-mcpu=ultrasparc3"] } @@ -2485,7 +2485,7 @@ proc check_effective_target_ultrasparc_vis2_hw { } { # instructions. We check this by attempting: "addxc %g0, %g0, %g0" proc check_effective_target_ultrasparc_vis3_hw { } { - return [check_runtime ultrasparc_hw { + return [check_runtime ultrasparc_vis3_hw { int main() { __asm__(".word 0x81b00220"); return 0; } } "-mcpu=niagara3"] } |