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author | rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4> | 2019-01-22 14:03:22 +0000 |
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committer | rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4> | 2019-01-22 14:03:22 +0000 |
commit | f8f32a5f5c5635321a4e1a953cbf1f56e66896ef (patch) | |
tree | 89fa63d90fea36afcd59db535729092fc47a2e5d /gcc/config/arm/arm.c | |
parent | cc41270a0d3d6b0870f866ee87402cd96e451bbe (diff) |
[arm] PR target/88469 fix incorrect argument passing with 64-bit bitfields
Unfortunately another PCS bug has come to light with the layout of
structs whose alignment is dominated by a 64-bit bitfield element.
Such fields in the type list appear to have alignment 1, but in
reality, for the purposes of alignment of the underlying structure,
the alignment is derived from the underlying bitfield's type. We've
been getting this wrong since support for over-aligned record types
was added several releases back. Worse still, the existing code may
generate unaligned memory accesses that may fault on some versions of
the architecture.
I've taken the opportunity to add a few more tests that check the
passing arguments with overalignment in the PCS. Looking through the
existing tests it looked like they were really only checking
self-consistency and not the precise location of the arguments.
PR target/88469
gcc:
* config/arm/arm.c (arm_needs_doubleword_align): Return 2 if a record's
alignment is dominated by a bitfield with 64-bit aligned base type.
(arm_function_arg): Emit a warning if the alignment has changed since
earlier GCC releases.
(arm_function_arg_boundary): Likewise.
(arm_setup_incoming_varargs): Likewise.
gcc/testsuite:
* gcc.target/arm/aapcs/bitfield1.c: New test.
* gcc.target/arm/aapcs/overalign_rec1.c: New test.
* gcc.target/arm/aapcs/overalign_rec2.c: New test.
* gcc.target/arm/aapcs/overalign_rec3.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@268151 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/arm/arm.c')
-rw-r--r-- | gcc/config/arm/arm.c | 32 |
1 files changed, 28 insertions, 4 deletions
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 73cb8df9af1..c6fbda25e96 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -6598,7 +6598,9 @@ arm_init_cumulative_args (CUMULATIVE_ARGS *pcum, tree fntype, } } -/* Return 1 if double word alignment is required for argument passing. +/* Return 2 if double word alignment is required for argument passing, + but wasn't required before the fix for PR88469. + Return 1 if double word alignment is required for argument passing. Return -1 if double word alignment used to be required for argument passing before PR77728 ABI fix, but is not required anymore. Return 0 if double word alignment is not required and wasn't requried @@ -6618,7 +6620,8 @@ arm_needs_doubleword_align (machine_mode mode, const_tree type) return TYPE_ALIGN (TREE_TYPE (type)) > PARM_BOUNDARY; int ret = 0; - /* Record/aggregate types: Use greatest member alignment of any member. */ + int ret2 = 0; + /* Record/aggregate types: Use greatest member alignment of any member. */ for (tree field = TYPE_FIELDS (type); field; field = DECL_CHAIN (field)) if (DECL_ALIGN (field) > PARM_BOUNDARY) { @@ -6630,6 +6633,13 @@ arm_needs_doubleword_align (machine_mode mode, const_tree type) Make sure we can warn about that with -Wpsabi. */ ret = -1; } + else if (TREE_CODE (field) == FIELD_DECL + && DECL_BIT_FIELD (field) + && TYPE_ALIGN (DECL_BIT_FIELD_TYPE (field)) > PARM_BOUNDARY) + ret2 = 1; + + if (ret2) + return 2; return ret; } @@ -6695,7 +6705,12 @@ arm_function_arg (cumulative_args_t pcum_v, machine_mode mode, inform (input_location, "parameter passing for argument of type " "%qT changed in GCC 7.1", type); else if (res > 0) - pcum->nregs++; + { + pcum->nregs++; + if (res > 1 && warn_psabi) + inform (input_location, "parameter passing for argument of type " + "%qT changed in GCC 9.1", type); + } } /* Only allow splitting an arg between regs and memory if all preceding @@ -6722,6 +6737,9 @@ arm_function_arg_boundary (machine_mode mode, const_tree type) if (res < 0 && warn_psabi) inform (input_location, "parameter passing for argument of type %qT " "changed in GCC 7.1", type); + if (res > 1 && warn_psabi) + inform (input_location, "parameter passing for argument of type " + "%qT changed in GCC 9.1", type); return res > 0 ? DOUBLEWORD_ALIGNMENT : PARM_BOUNDARY; } @@ -26999,7 +27017,13 @@ arm_setup_incoming_varargs (cumulative_args_t pcum_v, inform (input_location, "parameter passing for argument of " "type %qT changed in GCC 7.1", type); else if (res > 0) - nregs++; + { + nregs++; + if (res > 1 && warn_psabi) + inform (input_location, + "parameter passing for argument of type " + "%qT changed in GCC 9.1", type); + } } } else |