diff options
| author | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | 2019-10-15 21:43:15 +0000 |
|---|---|---|
| committer | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | 2019-10-15 21:43:15 +0000 |
| commit | a2cc6ec0ffbc1516d0aad92dc2586c56cdf2dc93 (patch) | |
| tree | 779f8203794cd2e5405df14a6f07a813cb4921fa /gcc/config/rs6000/rs6000.md | |
| parent | b4dfb0315e93db0c05e05b01de2efc23ad8a43f7 (diff) | |
Reformat some code.
2019-10-15 Michael Meissner <meissner@linux.ibm.com>
* config/rs6000/rs6000.md (mov<mode>_64bit_dm): Reformat.
(movtd_64bit_nodm): Reformat.
(mov<mode>_32bit): Reformat.
(mov<mode>_softfloat): Reformat.
(FMOVE128_GPR splitter): Reformat.
(DIFD splitter): Reformat.
(TI2 splitter): Reformat.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/ibm/pcrel-trunk@277013 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/rs6000/rs6000.md')
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 35 |
1 files changed, 28 insertions, 7 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index b65e8ca8382..c39c46836dc 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -7777,7 +7777,10 @@ "#" "&& reload_completed" [(pc)] -{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; } +{ + rs6000_split_multireg_move (operands[0], operands[1]); + DONE; +} [(set_attr "length" "8") (set_attr "isa" "*,*,*,*,*,*,*,*,p8v,p8v") (set_attr "max_prefixed_insns" "2") @@ -7792,7 +7795,10 @@ "#" "&& reload_completed" [(pc)] -{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; } +{ + rs6000_split_multireg_move (operands[0], operands[1]); + DONE;} + [(set_attr "length" "8,8,8,12,12,8") (set_attr "max_prefixed_insns" "2") (set_attr "num_insns" "2,2,2,3,3,2")]) @@ -7809,7 +7815,10 @@ "#" "&& reload_completed" [(pc)] -{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; } +{ + rs6000_split_multireg_move (operands[0], operands[1]); + DONE; +} [(set_attr "length" "8,8,8,8,20,20,16")]) (define_insn_and_split "*mov<mode>_softfloat" @@ -7821,7 +7830,10 @@ "#" "&& reload_completed" [(pc)] -{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; } +{ + rs6000_split_multireg_move (operands[0], operands[1]); + DONE; +} [(set_attr_alternative "length" [(if_then_else (match_test "TARGET_POWERPC64") (const_string "8") @@ -8613,7 +8625,10 @@ || (!vsx_register_operand (operands[0], <MODE>mode) && !vsx_register_operand (operands[1], <MODE>mode)))" [(pc)] -{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }) +{ + rs6000_split_multireg_move (operands[0], operands[1]); + DONE; +}) ;; Move SFmode to a VSX from a GPR register. Because scalar floating point ;; type is stored internally as double precision in the VSX registers, we have @@ -8803,7 +8818,10 @@ && gpr_or_gpr_p (operands[0], operands[1]) && !direct_move_p (operands[0], operands[1])" [(pc)] -{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }) +{ + rs6000_split_multireg_move (operands[0], operands[1]); + DONE; +}) ;; GPR store GPR load GPR move GPR li GPR lis GPR # ;; FPR store FPR load FPR move AVX store AVX store AVX load @@ -9030,7 +9048,10 @@ && !direct_move_p (operands[0], operands[1]) && !quad_load_store_p (operands[0], operands[1])" [(pc)] -{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }) +{ + rs6000_split_multireg_move (operands[0], operands[1]); + DONE; +}) (define_expand "setmemsi" [(parallel [(set (match_operand:BLK 0 "") |