diff options
author | (no author) <(no author)@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-10-21 21:49:38 +0000 |
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committer | (no author) <(no author)@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-10-21 21:49:38 +0000 |
commit | d1f09cc8803aae37febfcf0462dc562debd01829 (patch) | |
tree | b0fd40a57cb8c8f081db703d3b7fc81aa9fd1b91 /gcc/config/s390/s390.md | |
parent | b88baab8dc533a28fc64d5addedc490222540398 (diff) |
This commit was manufactured by cvs2svn to create tagimmuse-rewrite-beta
'immuse-rewrite-beta'.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/tags/immuse-rewrite-beta@89407 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/s390/s390.md')
-rw-r--r-- | gcc/config/s390/s390.md | 352 |
1 files changed, 232 insertions, 120 deletions
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 5a649932329..7d59f0c0f7e 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -34,17 +34,21 @@ ;; (-524288..524287) for long displacement ;; M -- Constant integer with a value of 0x7fffffff. ;; N -- Multiple letter constraint followed by 4 parameter letters. -;; 0..9: number of the part counting from most to least significant -;; H,Q: mode of the part -;; D,S,H: mode of the containing operand -;; 0,F: value of the other parts (F - all bits set) +;; 0..9,x: number of the part counting from most to least significant +;; H,Q: mode of the part +;; D,S,H: mode of the containing operand +;; 0,F: value of the other parts (F - all bits set) ;; ;; The constraint matches if the specified part of a constant -;; has a value different from its other parts. +;; has a value different from its other parts. If the letter x +;; is specified instead of a part number, the constraint matches +;; if there is any single part with non-default value. ;; Q -- Memory reference without index register and with short displacement. ;; R -- Memory reference with index register and short displacement. ;; S -- Memory reference without index register but with long displacement. ;; T -- Memory reference with index register and long displacement. +;; A -- Multiple letter constraint followed by Q, R, S, or T: +;; Offsettable memory reference of type specified by second letter. ;; U -- Pointer with short displacement. ;; W -- Pointer with long displacement. ;; Y -- Shift count operand. @@ -517,6 +521,39 @@ [(set_attr "op_type" "RS,RSY")]) +; Compare (equality) instructions + +(define_insn "*cmpdi_cct" + [(set (reg 33) + (compare (match_operand:DI 0 "nonimmediate_operand" "d,d,d,m,Q") + (match_operand:DI 1 "general_operand" "d,K,m,d,Q")))] + "s390_match_ccmode (insn, CCTmode) && TARGET_64BIT + && (!s390_pool_operand (operands[0]) || !s390_pool_operand (operands[1]))" + "@ + cgr\t%0,%1 + cghi\t%0,%c1 + cg\t%0,%1 + cg\t%1,%0 + clc\t%O0(8,%R0),%1" + [(set_attr "op_type" "RRE,RI,RXY,RXY,SS")]) + +(define_insn "*cmpsi_cct" + [(set (reg 33) + (compare (match_operand:SI 0 "nonimmediate_operand" "d,d,d,d,R,T,Q") + (match_operand:SI 1 "general_operand" "d,K,R,T,d,d,Q")))] + "s390_match_ccmode (insn, CCTmode) + && (!s390_pool_operand (operands[0]) || !s390_pool_operand (operands[1]))" + "@ + cr\t%0,%1 + chi\t%0,%c1 + c\t%0,%1 + cy\t%0,%1 + c\t%1,%0 + cy\t%1,%0 + clc\t%O0(4,%R0),%1" + [(set_attr "op_type" "RR,RI,RX,RXY,RX,RXY,SS")]) + + ; Compare (signed) instructions (define_insn "*cmpdi_ccs_sign" @@ -569,7 +606,7 @@ [(set (reg 33) (compare (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,m")) (match_operand:DI 0 "register_operand" "d,d")))] - "s390_match_ccmode(insn, CCURmode) && TARGET_64BIT" + "s390_match_ccmode (insn, CCURmode) && TARGET_64BIT" "@ clgfr\t%0,%1 clgf\t%0,%1" @@ -577,86 +614,56 @@ (define_insn "*cmpdi_ccu" [(set (reg 33) - (compare (match_operand:DI 0 "register_operand" "d,d") - (match_operand:DI 1 "general_operand" "d,m")))] - "s390_match_ccmode(insn, CCUmode) && TARGET_64BIT" + (compare (match_operand:DI 0 "nonimmediate_operand" "d,d,Q") + (match_operand:DI 1 "general_operand" "d,m,Q")))] + "s390_match_ccmode (insn, CCUmode) && TARGET_64BIT + && (!s390_pool_operand (operands[0]) || !s390_pool_operand (operands[1]))" "@ clgr\t%0,%1 - clg\t%0,%1" - [(set_attr "op_type" "RRE,RXY")]) + clg\t%0,%1 + clc\t%O0(8,%R0),%1" + [(set_attr "op_type" "RRE,RXY,SS")]) (define_insn "*cmpsi_ccu" [(set (reg 33) - (compare (match_operand:SI 0 "register_operand" "d,d,d") - (match_operand:SI 1 "general_operand" "d,R,T")))] - "s390_match_ccmode(insn, CCUmode)" + (compare (match_operand:SI 0 "nonimmediate_operand" "d,d,d,Q") + (match_operand:SI 1 "general_operand" "d,R,T,Q")))] + "s390_match_ccmode (insn, CCUmode) + && (!s390_pool_operand (operands[0]) || !s390_pool_operand (operands[1]))" "@ clr\t%0,%1 cl\t%0,%1 - cly\t%0,%1" - [(set_attr "op_type" "RR,RX,RXY")]) + cly\t%0,%1 + clc\t%O0(4,%R0),%1" + [(set_attr "op_type" "RR,RX,RXY,SS")]) (define_insn "*cmphi_ccu" [(set (reg 33) - (compare (match_operand:HI 0 "register_operand" "d,d") - (match_operand:HI 1 "s_imm_operand" "Q,S")))] - "s390_match_ccmode(insn, CCUmode)" + (compare (match_operand:HI 0 "nonimmediate_operand" "d,d,Q") + (match_operand:HI 1 "general_operand" "Q,S,Q")))] + "s390_match_ccmode (insn, CCUmode) + && (!s390_pool_operand (operands[0]) || !s390_pool_operand (operands[1])) + && !register_operand (operands[1], HImode)" "@ clm\t%0,3,%1 - clmy\t%0,3,%1" - [(set_attr "op_type" "RS,RSY")]) + clmy\t%0,3,%1 + clc\t%O0(2,%R0),%1" + [(set_attr "op_type" "RS,RSY,SS")]) (define_insn "*cmpqi_ccu" [(set (reg 33) - (compare (match_operand:QI 0 "register_operand" "d,d") - (match_operand:QI 1 "s_imm_operand" "Q,S")))] - "s390_match_ccmode(insn, CCUmode)" + (compare (match_operand:QI 0 "nonimmediate_operand" "d,d,Q,S,Q") + (match_operand:QI 1 "general_operand" "Q,S,n,n,Q")))] + "s390_match_ccmode (insn, CCUmode) + && (!s390_pool_operand (operands[0]) || !s390_pool_operand (operands[1])) + && !register_operand (operands[1], QImode)" "@ clm\t%0,1,%1 - clmy\t%0,1,%1" - [(set_attr "op_type" "RS,RSY")]) - -(define_insn "*cli" - [(set (reg 33) - (compare (match_operand:QI 0 "memory_operand" "Q,S") - (match_operand:QI 1 "immediate_operand" "n,n")))] - "s390_match_ccmode (insn, CCUmode)" - "@ + clmy\t%0,1,%1 cli\t%0,%b1 - cliy\t%0,%b1" - [(set_attr "op_type" "SI,SIY")]) - -(define_insn "*cmpdi_ccu_mem" - [(set (reg 33) - (compare (match_operand:DI 0 "s_operand" "Q") - (match_operand:DI 1 "s_imm_operand" "Q")))] - "s390_match_ccmode(insn, CCUmode)" - "clc\t%O0(8,%R0),%1" - [(set_attr "op_type" "SS")]) - -(define_insn "*cmpsi_ccu_mem" - [(set (reg 33) - (compare (match_operand:SI 0 "s_operand" "Q") - (match_operand:SI 1 "s_imm_operand" "Q")))] - "s390_match_ccmode(insn, CCUmode)" - "clc\t%O0(4,%R0),%1" - [(set_attr "op_type" "SS")]) - -(define_insn "*cmphi_ccu_mem" - [(set (reg 33) - (compare (match_operand:HI 0 "s_operand" "Q") - (match_operand:HI 1 "s_imm_operand" "Q")))] - "s390_match_ccmode(insn, CCUmode)" - "clc\t%O0(2,%R0),%1" - [(set_attr "op_type" "SS")]) - -(define_insn "*cmpqi_ccu_mem" - [(set (reg 33) - (compare (match_operand:QI 0 "s_operand" "Q") - (match_operand:QI 1 "s_imm_operand" "Q")))] - "s390_match_ccmode(insn, CCUmode)" - "clc\t%O0(1,%R0),%1" - [(set_attr "op_type" "SS")]) + cliy\t%0,%b1 + clc\t%O0(1,%R0),%1" + [(set_attr "op_type" "RS,RSY,SI,SIY,SS")]) ; DF instructions @@ -1264,7 +1271,7 @@ (define_insn "*movstricthi" [(set (strict_low_part (match_operand:HI 0 "register_operand" "+d,d")) - (match_operand:HI 1 "s_imm_operand" "Q,S")) + (match_operand:HI 1 "memory_operand" "Q,S")) (clobber (reg:CC 33))] "" "@ @@ -5131,11 +5138,11 @@ [(set_attr "op_type" "RRE,RXY")]) (define_insn "*anddi3" - [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,d,d,d,Q") + [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,d,d,d,AQ,Q") (and:DI (match_operand:DI 1 "nonimmediate_operand" - "%d,o,0,0,0,0,0,0,0") + "%d,o,0,0,0,0,0,0,0,0") (match_operand:DI 2 "general_operand" - "M,M,N0HDF,N1HDF,N2HDF,N3HDF,d,m,Q"))) + "M,M,N0HDF,N1HDF,N2HDF,N3HDF,d,m,NxQDF,Q"))) (clobber (reg:CC 33))] "TARGET_64BIT && s390_logical_operator_ok_p (operands)" "@ @@ -5147,8 +5154,19 @@ nill\t%0,%j2 ngr\t%0,%2 ng\t%0,%2 + # nc\t%O0(8,%R0),%2" - [(set_attr "op_type" "RRE,RXE,RI,RI,RI,RI,RRE,RXY,SS")]) + [(set_attr "op_type" "RRE,RXE,RI,RI,RI,RI,RRE,RXY,SI,SS")]) + +(define_split + [(set (match_operand:DI 0 "s_operand" "") + (and:DI (match_dup 0) (match_operand:DI 1 "immediate_operand" ""))) + (clobber (reg:CC 33))] + "reload_completed" + [(parallel + [(set (match_dup 0) (and:QI (match_dup 0) (match_dup 1))) + (clobber (reg:CC 33))])] + "s390_narrow_logical_operator (AND, &operands[0], &operands[1]);") (define_expand "anddi3" [(set (match_operand:DI 0 "nonimmediate_operand" "") @@ -5192,9 +5210,11 @@ [(set_attr "op_type" "RR,RX,RXY")]) (define_insn "*andsi3_zarch" - [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,d,d,d,d,Q") - (and:SI (match_operand:SI 1 "nonimmediate_operand" "%d,o,0,0,0,0,0,0") - (match_operand:SI 2 "general_operand" "M,M,N0HSF,N1HSF,d,R,T,Q"))) + [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,d,d,d,d,AQ,Q") + (and:SI (match_operand:SI 1 "nonimmediate_operand" + "%d,o,0,0,0,0,0,0,0") + (match_operand:SI 2 "general_operand" + "M,M,N0HSF,N1HSF,d,R,T,NxQSF,Q"))) (clobber (reg:CC 33))] "TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ @@ -5205,20 +5225,32 @@ nr\t%0,%2 n\t%0,%2 ny\t%0,%2 + # nc\t%O0(4,%R0),%2" - [(set_attr "op_type" "RRE,RXE,RI,RI,RR,RX,RXY,SS")]) + [(set_attr "op_type" "RRE,RXE,RI,RI,RR,RX,RXY,SI,SS")]) (define_insn "*andsi3_esa" - [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,Q") - (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0") - (match_operand:SI 2 "general_operand" "d,R,Q"))) + [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,AQ,Q") + (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0,0") + (match_operand:SI 2 "general_operand" "d,R,NxQSF,Q"))) (clobber (reg:CC 33))] "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ nr\t%0,%2 n\t%0,%2 + # nc\t%O0(4,%R0),%2" - [(set_attr "op_type" "RR,RX,SS")]) + [(set_attr "op_type" "RR,RX,SI,SS")]) + +(define_split + [(set (match_operand:SI 0 "s_operand" "") + (and:SI (match_dup 0) (match_operand:SI 1 "immediate_operand" ""))) + (clobber (reg:CC 33))] + "reload_completed" + [(parallel + [(set (match_dup 0) (and:QI (match_dup 0) (match_dup 1))) + (clobber (reg:CC 33))])] + "s390_narrow_logical_operator (AND, &operands[0], &operands[1]);") (define_expand "andsi3" [(set (match_operand:SI 0 "nonimmediate_operand" "") @@ -5233,27 +5265,39 @@ ; (define_insn "*andhi3_zarch" - [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,Q") - (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0") - (match_operand:HI 2 "general_operand" "d,n,Q"))) + [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,AQ,Q") + (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0,0") + (match_operand:HI 2 "general_operand" "d,n,NxQHF,Q"))) (clobber (reg:CC 33))] "TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ nr\t%0,%2 nill\t%0,%x2 + # nc\t%O0(2,%R0),%2" - [(set_attr "op_type" "RR,RI,SS")]) + [(set_attr "op_type" "RR,RI,SI,SS")]) (define_insn "*andhi3_esa" - [(set (match_operand:HI 0 "nonimmediate_operand" "=d,Q") - (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0") - (match_operand:HI 2 "general_operand" "d,Q"))) + [(set (match_operand:HI 0 "nonimmediate_operand" "=d,AQ,Q") + (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0") + (match_operand:HI 2 "general_operand" "d,NxQHF,Q"))) (clobber (reg:CC 33))] "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ nr\t%0,%2 + # nc\t%O0(2,%R0),%2" - [(set_attr "op_type" "RR,SS")]) + [(set_attr "op_type" "RR,SI,SS")]) + +(define_split + [(set (match_operand:HI 0 "s_operand" "") + (and:HI (match_dup 0) (match_operand:HI 1 "immediate_operand" ""))) + (clobber (reg:CC 33))] + "reload_completed" + [(parallel + [(set (match_dup 0) (and:QI (match_dup 0) (match_dup 1))) + (clobber (reg:CC 33))])] + "s390_narrow_logical_operator (AND, &operands[0], &operands[1]);") (define_expand "andhi3" [(set (match_operand:HI 0 "nonimmediate_operand" "") @@ -5336,10 +5380,10 @@ [(set_attr "op_type" "RRE,RXY")]) (define_insn "*iordi3" - [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,d,Q") - (ior:DI (match_operand:DI 1 "nonimmediate_operand" "0,0,0,0,0,0,0") + [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,d,AQ,Q") + (ior:DI (match_operand:DI 1 "nonimmediate_operand" "0,0,0,0,0,0,0,0") (match_operand:DI 2 "general_operand" - "N0HD0,N1HD0,N2HD0,N3HD0,d,m,Q"))) + "N0HD0,N1HD0,N2HD0,N3HD0,d,m,NxQD0,Q"))) (clobber (reg:CC 33))] "TARGET_64BIT && s390_logical_operator_ok_p (operands)" "@ @@ -5349,8 +5393,19 @@ oill\t%0,%i2 ogr\t%0,%2 og\t%0,%2 + # oc\t%O0(8,%R0),%2" - [(set_attr "op_type" "RI,RI,RI,RI,RRE,RXY,SS")]) + [(set_attr "op_type" "RI,RI,RI,RI,RRE,RXY,SI,SS")]) + +(define_split + [(set (match_operand:DI 0 "s_operand" "") + (ior:DI (match_dup 0) (match_operand:DI 1 "immediate_operand" ""))) + (clobber (reg:CC 33))] + "reload_completed" + [(parallel + [(set (match_dup 0) (ior:QI (match_dup 0) (match_dup 1))) + (clobber (reg:CC 33))])] + "s390_narrow_logical_operator (IOR, &operands[0], &operands[1]);") (define_expand "iordi3" [(set (match_operand:DI 0 "nonimmediate_operand" "") @@ -5392,9 +5447,9 @@ [(set_attr "op_type" "RR,RX,RXY")]) (define_insn "*iorsi3_zarch" - [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,d,d,Q") - (ior:SI (match_operand:SI 1 "nonimmediate_operand" "0,0,0,0,0,0") - (match_operand:SI 2 "general_operand" "N0HS0,N1HS0,d,R,T,Q"))) + [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,d,d,AQ,Q") + (ior:SI (match_operand:SI 1 "nonimmediate_operand" "0,0,0,0,0,0,0") + (match_operand:SI 2 "general_operand" "N0HS0,N1HS0,d,R,T,NxQS0,Q"))) (clobber (reg:CC 33))] "TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ @@ -5403,20 +5458,32 @@ or\t%0,%2 o\t%0,%2 oy\t%0,%2 + # oc\t%O0(4,%R0),%2" - [(set_attr "op_type" "RI,RI,RR,RX,RXY,SS")]) + [(set_attr "op_type" "RI,RI,RR,RX,RXY,SI,SS")]) (define_insn "*iorsi3_esa" - [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,Q") - (ior:SI (match_operand:SI 1 "nonimmediate_operand" "0,0,0") - (match_operand:SI 2 "general_operand" "d,R,Q"))) + [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,AQ,Q") + (ior:SI (match_operand:SI 1 "nonimmediate_operand" "0,0,0,0") + (match_operand:SI 2 "general_operand" "d,R,NxQS0,Q"))) (clobber (reg:CC 33))] "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ or\t%0,%2 o\t%0,%2 + # oc\t%O0(4,%R0),%2" - [(set_attr "op_type" "RR,RX,SS")]) + [(set_attr "op_type" "RR,RX,SI,SS")]) + +(define_split + [(set (match_operand:SI 0 "s_operand" "") + (ior:SI (match_dup 0) (match_operand:SI 1 "immediate_operand" ""))) + (clobber (reg:CC 33))] + "reload_completed" + [(parallel + [(set (match_dup 0) (ior:QI (match_dup 0) (match_dup 1))) + (clobber (reg:CC 33))])] + "s390_narrow_logical_operator (IOR, &operands[0], &operands[1]);") (define_expand "iorsi3" [(set (match_operand:SI 0 "nonimmediate_operand" "") @@ -5431,27 +5498,39 @@ ; (define_insn "*iorhi3_zarch" - [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,Q") - (ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0") - (match_operand:HI 2 "general_operand" "d,n,Q"))) + [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,AQ,Q") + (ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0,0") + (match_operand:HI 2 "general_operand" "d,n,NxQH0,Q"))) (clobber (reg:CC 33))] "TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ or\t%0,%2 oill\t%0,%x2 + # oc\t%O0(2,%R0),%2" - [(set_attr "op_type" "RR,RI,SS")]) + [(set_attr "op_type" "RR,RI,SI,SS")]) (define_insn "*iorhi3_esa" - [(set (match_operand:HI 0 "nonimmediate_operand" "=d,Q") - (ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0") - (match_operand:HI 2 "general_operand" "d,Q"))) + [(set (match_operand:HI 0 "nonimmediate_operand" "=d,AQ,Q") + (ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0") + (match_operand:HI 2 "general_operand" "d,NxQH0,Q"))) (clobber (reg:CC 33))] "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "@ or\t%0,%2 + # oc\t%O0(2,%R0),%2" - [(set_attr "op_type" "RR,SS")]) + [(set_attr "op_type" "RR,SI,SS")]) + +(define_split + [(set (match_operand:HI 0 "s_operand" "") + (ior:HI (match_dup 0) (match_operand:HI 1 "immediate_operand" ""))) + (clobber (reg:CC 33))] + "reload_completed" + [(parallel + [(set (match_dup 0) (ior:QI (match_dup 0) (match_dup 1))) + (clobber (reg:CC 33))])] + "s390_narrow_logical_operator (IOR, &operands[0], &operands[1]);") (define_expand "iorhi3" [(set (match_operand:HI 0 "nonimmediate_operand" "") @@ -5534,16 +5613,27 @@ [(set_attr "op_type" "RRE,RXY")]) (define_insn "*xordi3" - [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,Q") - (xor:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0,0") - (match_operand:DI 2 "general_operand" "d,m,Q"))) + [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,AQ,Q") + (xor:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0,0,0") + (match_operand:DI 2 "general_operand" "d,m,NxQD0,Q"))) (clobber (reg:CC 33))] "TARGET_64BIT && s390_logical_operator_ok_p (operands)" "@ xgr\t%0,%2 xg\t%0,%2 + # xc\t%O0(8,%R0),%2" - [(set_attr "op_type" "RRE,RXY,SS")]) + [(set_attr "op_type" "RRE,RXY,SI,SS")]) + +(define_split + [(set (match_operand:DI 0 "s_operand" "") + (xor:DI (match_dup 0) (match_operand:DI 1 "immediate_operand" ""))) + (clobber (reg:CC 33))] + "reload_completed" + [(parallel + [(set (match_dup 0) (xor:QI (match_dup 0) (match_dup 1))) + (clobber (reg:CC 33))])] + "s390_narrow_logical_operator (XOR, &operands[0], &operands[1]);") (define_expand "xordi3" [(set (match_operand:DI 0 "nonimmediate_operand" "") @@ -5585,17 +5675,28 @@ [(set_attr "op_type" "RR,RX,RXY")]) (define_insn "*xorsi3" - [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,Q") - (xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0,0") - (match_operand:SI 2 "general_operand" "d,R,T,Q"))) + [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,AQ,Q") + (xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0,0,0") + (match_operand:SI 2 "general_operand" "d,R,T,NxQS0,Q"))) (clobber (reg:CC 33))] "s390_logical_operator_ok_p (operands)" "@ xr\t%0,%2 x\t%0,%2 xy\t%0,%2 + # xc\t%O0(4,%R0),%2" - [(set_attr "op_type" "RR,RX,RXY,SS")]) + [(set_attr "op_type" "RR,RX,RXY,SI,SS")]) + +(define_split + [(set (match_operand:SI 0 "s_operand" "") + (xor:SI (match_dup 0) (match_operand:SI 1 "immediate_operand" ""))) + (clobber (reg:CC 33))] + "reload_completed" + [(parallel + [(set (match_dup 0) (xor:QI (match_dup 0) (match_dup 1))) + (clobber (reg:CC 33))])] + "s390_narrow_logical_operator (XOR, &operands[0], &operands[1]);") (define_expand "xorsi3" [(set (match_operand:SI 0 "nonimmediate_operand" "") @@ -5610,15 +5711,26 @@ ; (define_insn "*xorhi3" - [(set (match_operand:HI 0 "nonimmediate_operand" "=d,Q") - (xor:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0") - (match_operand:HI 2 "general_operand" "d,Q"))) + [(set (match_operand:HI 0 "nonimmediate_operand" "=d,AQ,Q") + (xor:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0") + (match_operand:HI 2 "general_operand" "d,NxQH0,Q"))) (clobber (reg:CC 33))] "s390_logical_operator_ok_p (operands)" "@ xr\t%0,%2 + # xc\t%O0(2,%R0),%2" - [(set_attr "op_type" "RR,SS")]) + [(set_attr "op_type" "RR,SI,SS")]) + +(define_split + [(set (match_operand:HI 0 "s_operand" "") + (xor:HI (match_dup 0) (match_operand:HI 1 "immediate_operand" ""))) + (clobber (reg:CC 33))] + "reload_completed" + [(parallel + [(set (match_dup 0) (xor:QI (match_dup 0) (match_dup 1))) + (clobber (reg:CC 33))])] + "s390_narrow_logical_operator (XOR, &operands[0], &operands[1]);") (define_expand "xorhi3" [(set (match_operand:HI 0 "nonimmediate_operand" "") |