Merge from gcc-7-branch.ARM/embedded-7-branch-2018q2ARM/embedded-7-branch

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/ARM/embedded-7-branch@261903 138bc75d-0d04-0410-961f-82ee72b054a4

8 files changed, 147 insertions, 4 deletions

diff --git a/gcc/testsuite/gcc.target/arm/cmse/cmse-1c99.c b/gcc/testsuite/gcc.target/arm/cmse/cmse-1c99.c
new file mode 100644
index 00000000000..0f99dd341b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/cmse/cmse-1c99.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-Os -mcmse -std=c99" }  */
+/* This is a copy of cmse-1.c to test arm_mve.h ISO C compatibility.  */
+#include "cmse-1.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-1.c
index 8675450f0c4..66476c3013f 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-1.c
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! ia32 } } } */
 /* { dg-options "-mavx512f -O2" } */
-/* { dg-final { scan-assembler-times "vcvtusi2sd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtusi2sd\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtusi2sdq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtusi2sdq\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 
 #include <immintrin.h>
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-1.c
index 38ecf39ad65..f4dae536873 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-1.c
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! ia32 } } } */
 /* { dg-options "-mavx512f -O2" } */
-/* { dg-final { scan-assembler-times "vcvtusi2ss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtusi2ss\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtusi2ssq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtusi2ssq\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 
 #include <immintrin.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/pr83660.C b/gcc/testsuite/gcc.target/powerpc/pr83660.C
new file mode 100644
index 00000000000..60adcdacb4b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr83660.C
@@ -0,0 +1,14 @@
+/* PR target/83660 */
+/* { dg-do compile } */
+/* { dg-options "-mcpu=power7" } */
+
+#include <altivec.h>
+
+typedef __vector unsigned int  uvec32_t  __attribute__((__aligned__(16)));
+
+unsigned get_word(uvec32_t v)
+{
+    return ({const unsigned _B1 = 32;
+            vec_extract((uvec32_t)v, 2);});
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/pr83969.c b/gcc/testsuite/gcc.target/powerpc/pr83969.c
new file mode 100644
index 00000000000..fe61594be16
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr83969.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=G5" } } */
+/* { dg-options "-O1 -mcpu=G5 -fno-split-wide-types -ftree-loop-vectorize" } */
+
+long long int
+n7 (int po, long long int r4)
+{
+  while (po < 1)
+    {
+      r4 |= 1;
+      ++po;
+    }
+  return r4;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr85698.c b/gcc/testsuite/gcc.target/powerpc/pr85698.c
new file mode 100644
index 00000000000..294a5665b32
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr85698.c
@@ -0,0 +1,79 @@
+/* { dg-do run } */
+/* { dg-require-effective-target vsx_hw } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
+/* { dg-options "-O3 -mcpu=power7" } */
+
+/* PR85698: Incorrect code generated on LE due to use of stxvw4x. */
+
+typedef unsigned char uint8_t;
+typedef short int16_t;
+extern void abort (void);
+extern int memcmp(const void *, const void *, __SIZE_TYPE__);
+
+uint8_t expected[128] =
+{14, 0, 4, 2, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
+ 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 28, 35, 33, 35, 36, 37, 38, 39, 40,
+ 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
+ 60, 61, 62, 63, 66, 63, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78,
+ 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 97, 96,
+ 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113,
+ 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127};
+
+static uint8_t x264_clip_uint8( int x )
+{
+  return x&(~255) ? (-x)>>31 : x;
+}
+void add4x4_idct( uint8_t *p_dst, int16_t dct[16])
+{
+  int16_t d[16];
+  int16_t tmp[16];
+  int i, y, x;
+  for( i = 0; i < 4; i++ )
+    {
+      int s02 =  dct[0*4+i]     +  dct[2*4+i];
+      int d02 =  dct[0*4+i]     -  dct[2*4+i];
+      int s13 =  dct[1*4+i]     + (dct[3*4+i]>>1);
+      int d13 = (dct[1*4+i]>>1) -  dct[3*4+i];
+      tmp[i*4+0] = s02 + s13;
+      tmp[i*4+1] = d02 + d13;
+      tmp[i*4+2] = d02 - d13;
+      tmp[i*4+3] = s02 - s13;
+    }
+  for( i = 0; i < 4; i++ )
+    {
+      int s02 =  tmp[0*4+i]     +  tmp[2*4+i];
+      int d02 =  tmp[0*4+i]     -  tmp[2*4+i];
+      int s13 =  tmp[1*4+i]     + (tmp[3*4+i]>>1);
+      int d13 = (tmp[1*4+i]>>1) -  tmp[3*4+i];
+      d[0*4+i] = ( s02 + s13 + 32 ) >> 6;
+      d[1*4+i] = ( d02 + d13 + 32 ) >> 6;
+      d[2*4+i] = ( d02 - d13 + 32 ) >> 6;
+      d[3*4+i] = ( s02 - s13 + 32 ) >> 6;
+    }
+  for( y = 0; y < 4; y++ )
+    {
+      for( x = 0; x < 4; x++ )
+        p_dst[x] = x264_clip_uint8( p_dst[x] + d[y*4+x] );
+      p_dst += 32;
+    }
+}
+
+int main()
+{
+  uint8_t dst[128];
+  int16_t dct[16];
+  int i;
+
+  for (i = 0; i < 16; i++)
+    dct[i] = i*10 + i;
+  for (i = 0; i < 128; i++)
+    dst[i] = i;
+
+  add4x4_idct(dst, dct);
+
+  if (memcmp (dst, expected, 128))
+    abort();
+
+ return 0;
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/pr85755.c b/gcc/testsuite/gcc.target/powerpc/pr85755.c
new file mode 100644
index 00000000000..2d8741d639e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr85755.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-O1" } */
+
+void
+preinc (long *q, long n)
+{
+  long i;
+  for (i = 0; i < n; i++)
+    q[i] = i;
+}
+
+void
+predec (long *q, long n)
+{
+  long i;
+  for (i = n; i >= 0; i--)
+    q[i] = i;
+}
+
+/* { dg-final { scan-assembler-times {\mstwu\M} 2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mstdu\M} 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-not {\mstfdu\M} } } */
diff --git a/gcc/testsuite/gcc.target/s390/htm-builtins-compile-4.c b/gcc/testsuite/gcc.target/s390/htm-builtins-compile-4.c
new file mode 100644
index 00000000000..c3866bde4a4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/htm-builtins-compile-4.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=zEC12 -mzarch" } */
+
+/* A bug in the builtin definition made__builtin_tbeginc to have an
+   integer return argument.  */
+void
+must_not_compile1 (void)
+{
+  int rc = __builtin_tbeginc (); /* { dg-error "void value not ignored as it ought to be" } */
+}