diff options
| author | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2002-04-20 18:01:53 +0000 |
|---|---|---|
| committer | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2002-04-20 18:01:53 +0000 |
| commit | ca92c69c3732d937f9748c06418507c0b982f000 (patch) | |
| tree | 2a2d5537271cb0ce68f2987699a8e23f7d62ad64 /gcc | |
| parent | 1b19d1e8f0543d485fb0f5a80946dc0ec7d139fe (diff) | |
* config/h8300/lib1funcs.asm (___mulsi3): Use hardware
multiply instructions for H8/300H case.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@52558 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/h8300/lib1funcs.asm | 65 |
2 files changed, 46 insertions, 24 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5435330cac9..63fd6350be4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2002-04-20 Toshiyasu Morita <toshiyasu.morita@hsa.hitachi.com> + * config/h8300/lib1funcs.asm (___mulsi3): Use hardware + multiply instructions for H8/300H case. + +2002-04-20 Toshiyasu Morita <toshiyasu.morita@hsa.hitachi.com> + * config/h8300/lib1funcs.asm (___cmpsi2, ___ucmpsi2): Bum three instructions from each routine. diff --git a/gcc/config/h8300/lib1funcs.asm b/gcc/config/h8300/lib1funcs.asm index aa68ebcab37..0fbeacd0ed0 100644 --- a/gcc/config/h8300/lib1funcs.asm +++ b/gcc/config/h8300/lib1funcs.asm @@ -730,32 +730,49 @@ _done: #else /* __H8300H__ */ +; +; mulsi3 for H8/300H - based on Hitachi SH implementation +; +; by Toshiyasu Morita +; +; Old code: +; +; 16b * 16b = 372 states (worst case) +; 32b * 32b = 724 states (worst case) +; +; New code: +; +; 16b * 16b = 68 states +; 16b * 32b = 96 states +; 32b * 32b = 124 states +; + .global ___mulsi3 ___mulsi3: - sub.l A2P,A2P - - ; while (a) -_top: mov.l A0P,A0P - beq _done - - ; if (a & 1) - bld #0,A0L - bcc _nobit - - ; r += b - add.l A1P,A2P - -_nobit: - ; a >>= 1 - shlr.l A0P - - ; b <<= 1 - shll.l A1P - bra _top - -_done: - mov.l A2P,A0P - rts + push.l er3 ; (10 states) + + mov.w r1,r2 ; ( 2 states) b * d + mulxu r0,er2 ; (22 states) + + mov.w e0,r3 ; ( 2 states) a * d + beq L_skip1 ; ( 4 states) + mulxu r1,er3 ; (22 states) + mov.w r3,e3 ; ( 2 states) + mov.w #0,r3 ; ( 2 states) + add.l er3,er2 ; ( 2 states) + +L_skip1: + mov.w e1,r3 ; ( 2 states) c * b + beq L_skip2 ; ( 4 states) + mulxu r0,er3 ; (22 states) + mov.w r3,e3 ; ( 2 states) + mov.w #0,r3 ; ( 2 states) + add.l er3,er2 ; ( 2 states) + +L_skip2: + mov.l er2,er0 ; ( 2 states) + pop.l er3 ; (10 states) + rts ; (10 states) #endif #endif /* L_mulsi3 */ |