diff options
Diffstat (limited to 'gcc/config/bfin/bfin.c')
| -rw-r--r-- | gcc/config/bfin/bfin.c | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c index 84b2d01c730..35408eb68cf 100644 --- a/gcc/config/bfin/bfin.c +++ b/gcc/config/bfin/bfin.c @@ -59,6 +59,7 @@ #include "hw-doloop.h" #include "opts.h" #include "dumpfile.h" +#include "builtins.h" /* A C structure for machine-specific, per-function data. This is added to the cfun structure. */ @@ -2317,7 +2318,7 @@ bfin_class_likely_spilled_p (reg_class_t rclass) static struct machine_function * bfin_init_machine_status (void) { - return ggc_alloc_cleared_machine_function (); + return ggc_cleared_alloc<machine_function> (); } /* Implement the TARGET_OPTION_OVERRIDE hook. */ @@ -2588,7 +2589,7 @@ split_load_immediate (rtx operands[]) && (D_REGNO_P (regno) || (regno >= REG_P0 && regno <= REG_P7 && num_zero <= 2))) { - emit_insn (gen_movsi (operands[0], GEN_INT (shifted))); + emit_insn (gen_movsi (operands[0], gen_int_mode (shifted, SImode))); emit_insn (gen_ashlsi3 (operands[0], operands[0], GEN_INT (num_zero))); return 1; } @@ -2602,13 +2603,15 @@ split_load_immediate (rtx operands[]) if (log2constp (val & 0xFFFF0000)) { emit_insn (gen_movsi (operands[0], GEN_INT (val & 0xFFFF))); - emit_insn (gen_iorsi3 (operands[0], operands[0], GEN_INT (val & 0xFFFF0000))); + emit_insn (gen_iorsi3 (operands[0], operands[0], + gen_int_mode (val & 0xFFFF0000, SImode))); return 1; } else if (log2constp (val | 0xFFFF) && (val & 0x8000) != 0) { emit_insn (gen_movsi (operands[0], GEN_INT (tmp))); - emit_insn (gen_andsi3 (operands[0], operands[0], GEN_INT (val | 0xFFFF))); + emit_insn (gen_andsi3 (operands[0], operands[0], + gen_int_mode (val | 0xFFFF, SImode))); } } @@ -2617,7 +2620,9 @@ split_load_immediate (rtx operands[]) if (tmp >= -64 && tmp <= 63) { emit_insn (gen_movsi (operands[0], GEN_INT (tmp))); - emit_insn (gen_movstricthi_high (operands[0], GEN_INT (val & -65536))); + emit_insn (gen_movstricthi_high (operands[0], + gen_int_mode (val & -65536, + SImode))); return 1; } @@ -2645,7 +2650,7 @@ split_load_immediate (rtx operands[]) { /* If optimizing for size, generate a sequence that has more instructions but is shorter. */ - emit_insn (gen_movsi (operands[0], GEN_INT (shifted_compl))); + emit_insn (gen_movsi (operands[0], gen_int_mode (shifted_compl, SImode))); emit_insn (gen_ashlsi3 (operands[0], operands[0], GEN_INT (num_compl_zero))); emit_insn (gen_one_cmplsi2 (operands[0], operands[0])); |