diff options
Diffstat (limited to 'gcc/config/ia64/ia64.md')
| -rw-r--r-- | gcc/config/ia64/ia64.md | 24 |
1 files changed, 8 insertions, 16 deletions
diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md index 75a36b3a1a0..4a256907e70 100644 --- a/gcc/config/ia64/ia64.md +++ b/gcc/config/ia64/ia64.md @@ -766,7 +766,7 @@ ;; Floating Point Moves ;; ;; Note - Patterns for SF mode moves are compulsory, but -;; patterns for DF are optional, as GCC can synthesise them. +;; patterns for DF are optional, as GCC can synthesize them. (define_expand "movsf" [(set (match_operand:SF 0 "general_operand" "") @@ -1244,7 +1244,7 @@ "dep %0 = %3, %0, %2, %1" [(set_attr "itanium_class" "ishf")]) -;; Combine doesn't like to create bitfield insertions into zero. +;; Combine doesn't like to create bit-field insertions into zero. (define_insn "*depz_internal" [(set (match_operand:DI 0 "gr_register_operand" "=r") (and:DI (ashift:DI (match_operand:DI 1 "gr_register_operand" "r") @@ -1990,6 +1990,7 @@ "INTEL_EXTENDED_IEEE_FORMAT && TARGET_INLINE_DIV" { rtx op1_tf, op2_tf, op0_tf, op0_di, twon34; + REAL_VALUE_TYPE twon34_r; op0_tf = gen_reg_rtx (TFmode); op0_di = gen_reg_rtx (DImode); @@ -2005,14 +2006,9 @@ expand_float (op2_tf, operands[2], 0); /* 2^-34 */ -#if 0 - twon34 = (CONST_DOUBLE_FROM_REAL_VALUE - (REAL_VALUE_FROM_TARGET_SINGLE (0x2e800000), TFmode)); + real_2expN (&twon34_r, -34); + twon34 = CONST_DOUBLE_FROM_REAL_VALUE (twon34_r, TFmode); twon34 = force_reg (TFmode, twon34); -#else - twon34 = gen_reg_rtx (TFmode); - convert_move (twon34, force_const_mem (SFmode, CONST_DOUBLE_FROM_REAL_VALUE (REAL_VALUE_FROM_TARGET_SINGLE (0x2e800000), SFmode)), 0); -#endif emit_insn (gen_divsi3_internal (op0_tf, op1_tf, op2_tf, twon34)); @@ -2051,6 +2047,7 @@ "INTEL_EXTENDED_IEEE_FORMAT && TARGET_INLINE_DIV" { rtx op1_tf, op2_tf, op0_tf, op0_di, twon34; + REAL_VALUE_TYPE twon34_r; op0_tf = gen_reg_rtx (TFmode); op0_di = gen_reg_rtx (DImode); @@ -2066,14 +2063,9 @@ expand_float (op2_tf, operands[2], 1); /* 2^-34 */ -#if 0 - twon34 = (CONST_DOUBLE_FROM_REAL_VALUE - (REAL_VALUE_FROM_TARGET_SINGLE (0x2e800000), TFmode)); + real_2expN (&twon34_r, -34); + twon34 = CONST_DOUBLE_FROM_REAL_VALUE (twon34_r, TFmode); twon34 = force_reg (TFmode, twon34); -#else - twon34 = gen_reg_rtx (TFmode); - convert_move (twon34, force_const_mem (SFmode, CONST_DOUBLE_FROM_REAL_VALUE (REAL_VALUE_FROM_TARGET_SINGLE (0x2e800000), SFmode)), 0); -#endif emit_insn (gen_divsi3_internal (op0_tf, op1_tf, op2_tf, twon34)); |