diff options
Diffstat (limited to 'gcc/config/rs6000/e500mc64.md')
| -rw-r--r-- | gcc/config/rs6000/e500mc64.md | 31 |
1 files changed, 20 insertions, 11 deletions
diff --git a/gcc/config/rs6000/e500mc64.md b/gcc/config/rs6000/e500mc64.md index 9c29a31e958..45823347ab9 100644 --- a/gcc/config/rs6000/e500mc64.md +++ b/gcc/config/rs6000/e500mc64.md @@ -69,18 +69,28 @@ ;; Simple SU insns. (define_insn_reservation "e500mc64_su" 1 - (and (eq_attr "type" "integer,insert_word,insert_dword,delayed_compare,\ - shift,cntlz,exts") + (and (ior (eq_attr "type" "integer,insert,cntlz,exts") + (and (eq_attr "type" "add,logical") + (eq_attr "dot" "no")) + (and (eq_attr "type" "shift") + (eq_attr "dot" "no") + (eq_attr "var_shift" "no"))) (eq_attr "cpu" "ppce500mc64")) "e500mc64_decode,e500mc64_issue+e500mc64_su_stage0+e500mc64_retire") (define_insn_reservation "e500mc64_su2" 2 - (and (eq_attr "type" "cmp,compare,delayed_compare,fast_compare,trap") + (and (ior (eq_attr "type" "cmp,compare,trap") + (and (eq_attr "type" "add,logical") + (eq_attr "dot" "yes")) + (and (eq_attr "type" "shift") + (eq_attr "dot" "yes") + (eq_attr "var_shift" "no"))) (eq_attr "cpu" "ppce500mc64")) "e500mc64_decode,e500mc64_issue+e500mc64_su_stage0,e500mc64_retire") (define_insn_reservation "e500mc64_delayed" 2 - (and (eq_attr "type" "var_shift_rotate,var_delayed_compare") + (and (eq_attr "type" "shift") + (eq_attr "var_shift" "yes") (eq_attr "cpu" "ppce500mc64")) "e500mc64_decode,e500mc64_issue+e500mc64_su_stage0,e500mc64_retire") @@ -99,14 +109,14 @@ ;; Multiply. (define_insn_reservation "e500mc64_multiply" 4 - (and (eq_attr "type" "imul,imul2,imul3,imul_compare") + (and (eq_attr "type" "mul") (eq_attr "cpu" "ppce500mc64")) "e500mc64_decode,e500mc64_issue+e500mc64_mu_stage0,e500mc64_mu_stage1,\ e500mc64_mu_stage2,e500mc64_mu_stage3+e500mc64_retire") ;; Divide. We use the average latency time here. (define_insn_reservation "e500mc64_divide" 14 - (and (eq_attr "type" "idiv") + (and (eq_attr "type" "div") (eq_attr "cpu" "ppce500mc64")) "e500mc64_decode,e500mc64_issue+e500mc64_mu_stage0+e500mc64_mu_div,\ e500mc64_mu_div*13") @@ -149,24 +159,23 @@ ;; Loads. (define_insn_reservation "e500mc64_load" 3 - (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\ - load_l,sync") + (and (eq_attr "type" "load,load_l,sync") (eq_attr "cpu" "ppce500mc64")) "e500mc64_decode,e500mc64_issue+e500mc64_lsu,nothing,e500mc64_retire") (define_insn_reservation "e500mc64_fpload" 4 - (and (eq_attr "type" "fpload,fpload_ux,fpload_u") + (and (eq_attr "type" "fpload") (eq_attr "cpu" "ppce500mc64")) "e500mc64_decode,e500mc64_issue+e500mc64_lsu,nothing*2,e500mc64_retire") ;; Stores. (define_insn_reservation "e500mc64_store" 3 - (and (eq_attr "type" "store,store_ux,store_u,store_c") + (and (eq_attr "type" "store,store_c") (eq_attr "cpu" "ppce500mc64")) "e500mc64_decode,e500mc64_issue+e500mc64_lsu,nothing,e500mc64_retire") (define_insn_reservation "e500mc64_fpstore" 3 - (and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u") + (and (eq_attr "type" "fpstore") (eq_attr "cpu" "ppce500mc64")) "e500mc64_decode,e500mc64_issue+e500mc64_lsu,nothing,e500mc64_retire") |