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Diffstat (limited to 'gcc/config/sh/sh.md')
-rw-r--r--gcc/config/sh/sh.md75
1 files changed, 58 insertions, 17 deletions
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index bad8c66edc9..aa63209dbf6 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -705,11 +705,14 @@
(define_expand "cmpsi"
[(set (reg:SI T_REG)
- (compare (match_operand:SI 0 "arith_operand" "")
+ (compare (match_operand:SI 0 "cmpsi_operand" "")
(match_operand:SI 1 "arith_operand" "")))]
"TARGET_SH1"
"
{
+ if (GET_CODE (operands[0]) == REG && REGNO (operands[0]) == T_REG
+ && GET_CODE (operands[1]) != CONST_INT)
+ operands[0] = copy_to_mode_reg (SImode, operands[0]);
sh_compare_op0 = operands[0];
sh_compare_op1 = operands[1];
DONE;
@@ -1167,7 +1170,9 @@
(match_operand:SI 2 "arith_reg_operand" "r"))
(reg:SI T_REG)))
(set (reg:SI T_REG)
- (gtu:SI (minus:SI (match_dup 1) (match_dup 2)) (match_dup 1)))]
+ (gtu:SI (minus:SI (minus:SI (match_dup 1) (match_dup 2))
+ (reg:SI T_REG))
+ (match_dup 1)))]
"TARGET_SH1"
"subc %2,%0"
[(set_attr "type" "arith")])
@@ -3163,7 +3168,7 @@
(define_expand "extendhisi2"
[(set (match_operand:SI 0 "arith_reg_operand" "=r,r")
- (sign_extend:SI (match_operand:HI 1 "general_extend_operand" "r,m")))]
+ (sign_extend:SI (match_operand:HI 1 "general_extend_operand" "r,m")))]
""
"")
@@ -3173,7 +3178,7 @@
"TARGET_SH1"
"@
exts.w %1,%0
- mov.w %1,%0"
+ mov.w %1,%0"
[(set_attr "type" "arith,load")])
(define_insn "*extendhisi2_media"
@@ -3277,7 +3282,7 @@
(truncate:QI (match_operand:DI 1 "register_operand" "r,r")))]
"TARGET_SHMEDIA"
"@
- and %1, 255, %0
+ andi %1, 255, %0
st%M0.b %m0, %1"
[(set_attr "type" "arith_media,store")])
@@ -4395,7 +4400,7 @@
[(set (match_operand:SF 0 "register_operand" "")
(match_operand:SF 1 "register_operand" ""))
(use (match_operand:PSI 2 "fpscr_operand" ""))
- (clobber (match_scratch:SI 3 "X"))]
+ (clobber (match_scratch:SI 3 ""))]
"TARGET_SH2E && reload_completed
&& true_regnum (operands[0]) == true_regnum (operands[1])"
[(set (match_dup 0) (match_dup 0))]
@@ -4406,7 +4411,7 @@
[(set (match_operand:DF 0 "register_operand" "")
(match_operand:DF 1 "register_operand" ""))
(use (match_operand:PSI 2 "fpscr_operand" ""))
- (clobber (match_scratch:SI 3 "X"))]
+ (clobber (match_scratch:SI 3 ""))]
"TARGET_SH4 && ! TARGET_FMOVD && reload_completed
&& FP_OR_XD_REGISTER_P (true_regnum (operands[0]))
&& FP_OR_XD_REGISTER_P (true_regnum (operands[1]))"
@@ -4801,7 +4806,7 @@
i * GET_MODE_SIZE (V2SFmode)));
else
{
- x = gen_rtx_SUBREG (V2SFmode, operands[0], i * 2);
+ x = gen_rtx_SUBREG (V2SFmode, operands[0], i * 8);
alter_subreg (&x);
}
@@ -4811,7 +4816,7 @@
i * GET_MODE_SIZE (V2SFmode)));
else
{
- y = gen_rtx_SUBREG (V2SFmode, operands[1], i * 2);
+ y = gen_rtx_SUBREG (V2SFmode, operands[1], i * 8);
alter_subreg (&y);
}
@@ -7446,6 +7451,10 @@ mov.l\\t1f,r0\\n\\
}
DONE;
}
+ if (sh_expand_t_scc (EQ, operands[0]))
+ DONE;
+ if (! rtx_equal_function_value_matters)
+ FAIL;
operands[1] = prepare_scc_operands (EQ);
}")
@@ -7492,6 +7501,8 @@ mov.l\\t1f,r0\\n\\
}
DONE;
}
+ if (! rtx_equal_function_value_matters)
+ FAIL;
operands[1] = prepare_scc_operands (LT);
}")
@@ -7594,6 +7605,8 @@ mov.l\\t1f,r0\\n\\
}
DONE;
}
+ if (! rtx_equal_function_value_matters)
+ FAIL;
operands[1] = prepare_scc_operands (GT);
}")
@@ -7646,6 +7659,8 @@ mov.l\\t1f,r0\\n\\
DONE;
}
+ if (! rtx_equal_function_value_matters)
+ FAIL;
if (GET_MODE_CLASS (GET_MODE (sh_compare_op0)) == MODE_FLOAT)
{
if (TARGET_IEEE)
@@ -7685,6 +7700,8 @@ mov.l\\t1f,r0\\n\\
sh_compare_op0, sh_compare_op1));
DONE;
}
+ if (! rtx_equal_function_value_matters)
+ FAIL;
operands[1] = prepare_scc_operands (GTU);
}")
@@ -7709,6 +7726,8 @@ mov.l\\t1f,r0\\n\\
sh_compare_op1, sh_compare_op0));
DONE;
}
+ if (! rtx_equal_function_value_matters)
+ FAIL;
operands[1] = prepare_scc_operands (LTU);
}")
@@ -7738,6 +7757,8 @@ mov.l\\t1f,r0\\n\\
DONE;
}
+ if (! rtx_equal_function_value_matters)
+ FAIL;
operands[1] = prepare_scc_operands (LEU);
}")
@@ -7768,6 +7789,8 @@ mov.l\\t1f,r0\\n\\
DONE;
}
+ if (! rtx_equal_function_value_matters)
+ FAIL;
operands[1] = prepare_scc_operands (GEU);
}")
@@ -7815,8 +7838,12 @@ mov.l\\t1f,r0\\n\\
DONE;
}
- operands[1] = prepare_scc_operands (EQ);
- operands[2] = gen_reg_rtx (SImode);
+ if (sh_expand_t_scc (NE, operands[0]))
+ DONE;
+ if (! rtx_equal_function_value_matters)
+ FAIL;
+ operands[1] = prepare_scc_operands (EQ);
+ operands[2] = gen_reg_rtx (SImode);
}")
(define_expand "sunordered"
@@ -9450,9 +9477,10 @@ mov.l\\t1f,r0\\n\\
if (unit_size < 2)
{
if (GET_CODE (operands[1]) == CONST_INT && GET_CODE (elt1) == CONST_INT)
- operands[1] = GEN_INT (TARGET_LITTLE_ENDIAN
- ? INTVAL (operands[1]) + (INTVAL (elt1) << 8)
- : (INTVAL (operands[1]) << 8) + INTVAL (elt1));
+ operands[1]
+ = GEN_INT (TARGET_LITTLE_ENDIAN
+ ? (INTVAL (operands[1]) & 0xff) + (INTVAL (elt1) << 8)
+ : (INTVAL (operands[1]) << 8) + (INTVAL (elt1) & 0xff));
else
{
operands[0] = gen_rtx_REG (V2QImode, true_regnum (operands[0]));
@@ -10560,7 +10588,7 @@ mov.l\\t1f,r0\\n\\
(vec_select:SF (mult:V4SF (match_dup 1) (match_dup 2))
(parallel [(const_int 3)])))))]
"TARGET_SHMEDIA"
- "fipr %1, %2, %0"
+ "fipr.s %1, %2, %0"
[(set_attr "type" "fparith_media")])
(define_insn "fsrra_s"
@@ -10586,7 +10614,7 @@ mov.l\\t1f,r0\\n\\
(const_int 14) (const_int 3)]))
(vec_select:V4SF (match_dup 2)
(parallel [(const_int 1) (const_int 2)
- (const_int 3) (const_int 0)]))))
+ (const_int 3) (const_int 0)]))))
(plus:V4SF
(mult:V4SF
(vec_select:V4SF (match_dup 1)
@@ -10603,7 +10631,7 @@ mov.l\\t1f,r0\\n\\
(parallel [(const_int 3) (const_int 0)
(const_int 1) (const_int 2)]))))))]
"TARGET_SHMEDIA"
- "ftrv %1, %2, %0"
+ "ftrv.s %1, %2, %0"
[(set_attr "type" "fparith_media")])
(define_insn "nsb"
@@ -10689,6 +10717,19 @@ mov.l\\t1f,r0\\n\\
"byterev %1, %0"
[(set_attr "type" "arith_media")])
+(define_insn "prefetch"
+ [(prefetch (match_operand:QI 0 "address_operand" "p")
+ (match_operand:SI 1 "const_int_operand" "n")
+ (match_operand:SI 2 "const_int_operand" "n"))]
+ "TARGET_SHMEDIA"
+ "*
+{
+ operands[0] = gen_rtx_MEM (QImode, operands[0]);
+ output_asm_insn (\"ld%M0.b %m0,r63\", operands);
+ return \"\";
+}"
+ [(set_attr "type" "other")])
+
;; The following description models the
;; SH4 pipeline using the DFA based scheduler.
;; The DFA based description is better way to model
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-12 12:13:29 +0000