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Diffstat (limited to 'gcc/testsuite/lib/target-supports.exp')
| -rw-r--r-- | gcc/testsuite/lib/target-supports.exp | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index a5b2461155d..9172bd626c2 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -1175,6 +1175,40 @@ proc check_effective_target_arm32 { } { return $et_arm32_saved } +# Return 1 if this is a PowerPC target with floating-point registers. + +proc check_effective_target_powerpc_fprs { } { + if { [istarget powerpc*-*-*] + || [istarget rs6000-*-*] } { + return [check_no_compiler_messages powerpc_fprs object { + #ifdef __NO_FPRS__ + #error no FPRs + #else + int dummy; + #endif + }] + } else { + return 0 + } +} + +# Return 1 if this is a PowerPC target supporting -maltivec. + +proc check_effective_target_powerpc_altivec_ok { } { + if { [istarget powerpc*-*-*] + || [istarget rs6000-*-*] } { + # AltiVec is not supported on Aix. + if { [istarget powerpc*-*-aix*] } { + return 0 + } + return [check_no_compiler_messages powerpc_altivec_ok object { + int dummy; + } "-maltivec"] + } else { + return 0 + } +} + # Return 1 if the target supports hardware vector shift operation. proc check_effective_target_vect_shift { } { |