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* tree-vect-loop.c (check_reduction_path): Compute reduction
operation here.
(vect_is_simple_reduction): Remove special-case of single-stmt
reduction path detection.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277112 138bc75d-0d04-0410-961f-82ee72b054a4
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According to GAS, the Marvell PJ4 CPU has a VFPv3-D16 floating point
unit, but GCC's CPU configuration tables omits this meaning that
-mfpu=auto will not correctly select the FPU. This patch fixes this
by adding the +fp option to the architecture specification for this
device.
* config/arm/arm-cpus.in (marvel-pj4): Add +fp to the architecture.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277111 138bc75d-0d04-0410-961f-82ee72b054a4
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2019-10-17 Yuliang Wang <yuliang.wang@arm.com>
gcc/
* config/aarch64/aarch64-sve2.md (aarch64_sve2_eor3<mode>)
(aarch64_sve2_nor<mode>, aarch64_sve2_nand<mode>)
(aarch64_sve2_bsl<mode>, aarch64_sve2_nbsl<mode>)
(aarch64_sve2_bsl1n<mode>, aarch64_sve2_bsl2n<mode>):
New combine patterns.
* config/aarch64/iterators.md (BSL_DUP): New int iterator for the
above.
(bsl_1st, bsl_2nd, bsl_dup, bsl_mov): Attributes for the above.
gcc/testsuite/
* gcc.target/aarch64/sve2/eor3_1.c: New test.
* gcc.target/aarch64/sve2/nlogic_1.c: As above.
* gcc.target/aarch64/sve2/nlogic_2.c: As above.
* gcc.target/aarch64/sve2/bitsel_1.c: As above.
* gcc.target/aarch64/sve2/bitsel_2.c: As above.
* gcc.target/aarch64/sve2/bitsel_3.c: As above.
* gcc.target/aarch64/sve2/bitsel_4.c: As above.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277110 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277108 138bc75d-0d04-0410-961f-82ee72b054a4
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* tree-vrp.c (value_range_base::dump): Display +INF for both
pointers and integers when appropriate.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277107 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/ChangeLog:
2019-10-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
* tree-vect-loop.c (vect_analyze_loop_2): Use same condition to decide
when to use versioning threshold.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277105 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/ChangeLog:
2019-10-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
* tree-vect-loop.c (determine_peel_for_niter): New function contained
outlined code from ...
(vect_analyze_loop_2): ... here.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277103 138bc75d-0d04-0410-961f-82ee72b054a4
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https://gcc.gnu.org/ml/gcc-patches/2019-10/msg01283.html
* decl.c (builtin_function_1): Merge into ...
(cxx_builtin_function): ... here. Nadger the decl before maybe
copying it. Set the context.
(cxx_builtin_function_ext_scope): Push to top level, then call
cxx_builtin_function.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277102 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/ChangeLog:
2019-10-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
* tree-vect-loop.c (vect_transform_loop): Move code from here...
* tree-vect-loop-manip.c (vect_loop_versioning): ... to here.
* tree-vectorizer.h (vect_loop_versioning): Remove unused parameters.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277101 138bc75d-0d04-0410-961f-82ee72b054a4
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* tree-vect-loop.c (needs_fold_left_reduction_p): Export.
(vect_is_simple_reduction): Move all validity checks ...
(vectorizable_reduction): ... here. Compute whether we
need a fold-left reduction here.
* tree-vect-patterns.c (vect_reassociating_reduction_p): Merge
both overloads, check needs_fold_left_reduction_p directly.
* tree-vectorizer.h (needs_fold_left_reduction_p): Declare.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277100 138bc75d-0d04-0410-961f-82ee72b054a4
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The arm_arch_v8a_ok effective-target lacks a closing bracket in these
tests, resulting in it being ignored.
2019-10-17 Christophe Lyon <christophe.lyon@linaro.org>
gcc/testsuite/
* gcc.target/arm/vseleqdf.c: Add missing closing bracket.
* gcc.target/arm/vseleqsf.c: Likewise.
* gcc.target/arm/vselgedf.c: Likewise.
* gcc.target/arm/vselgesf.c: Likewise.
* gcc.target/arm/vselgtdf.c: Likewise.
* gcc.target/arm/vselgtsf.c: Likewise.
* gcc.target/arm/vselledf.c: Likewise.
* gcc.target/arm/vsellesf.c: Likewise.
* gcc.target/arm/vselltdf.c: Likewise.
* gcc.target/arm/vselltsf.c: Likewise.
* gcc.target/arm/vselnedf.c: Likewise.
* gcc.target/arm/vselnesf.c: Likewise.
* gcc.target/arm/vselvcdf.c: Likewise.
* gcc.target/arm/vselvcsf.c: Likewise.
* gcc.target/arm/vselvsdf.c: Likewise.
* gcc.target/arm/vselvssf.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277099 138bc75d-0d04-0410-961f-82ee72b054a4
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* tree-ssa-pre.c (create_component_ref_by_pieces_1): Fix
TARGET_MEM_REF creation.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277098 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277097 138bc75d-0d04-0410-961f-82ee72b054a4
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* gcc.target/avr/progmem-error-1.cpp: Fix location of the
expected diagnostic.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277096 138bc75d-0d04-0410-961f-82ee72b054a4
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2019-10-17 Feng Xue <fxue@os.amperecomputing.com>
PR testsuite/92125
* gcc.dg/ipa/pr91088.c: Change char conversion to bitand.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277095 138bc75d-0d04-0410-961f-82ee72b054a4
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PR tree-optimization/92129
* tree-vect-loop.c (vectorizable_reduction): Also fail
on GIMPLE_SINGLE_RHS.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277094 138bc75d-0d04-0410-961f-82ee72b054a4
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* tree-object-size.c (cond_expr_object_size): Return early if then_
processing resulted in unknown size.
* gcc.c-torture/compile/pr92056.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277093 138bc75d-0d04-0410-961f-82ee72b054a4
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* tree-ssa-ifcombine.c (ifcombine_ifandif): Force condition into
temporary if it could trap.
* gcc.dg/pr92115.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277092 138bc75d-0d04-0410-961f-82ee72b054a4
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* gfortran.dg/gomp/pr87752.f90: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277091 138bc75d-0d04-0410-961f-82ee72b054a4
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PR debug/91887
* dwarf2out.c (gen_formal_parameter_die): Also try to match
context_die against a DW_TAG_GNU_formal_parameter_pack parent.
* g++.dg/debug/dwarf2/pr91887.C: New testcase.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277090 138bc75d-0d04-0410-961f-82ee72b054a4
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I've found this stale reference while looking at cp-gimplify.c. tree-gimple.c
no longer exists and its contents were merged into gimple.c.
Seems obvious enough.
gcc/cp/ChangeLog:
2019-10-16 Luis Machado <luis.machado@linaro.org>
* cp-gimplify.c: Fix reference to non-existing tree-gimple.c file.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277089 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277088 138bc75d-0d04-0410-961f-82ee72b054a4
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if cleanup is a nop, clear location of its operand too.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277084 138bc75d-0d04-0410-961f-82ee72b054a4
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HOST_WIDE_INT_PRINT_UNSIGNED instead of "%zu".
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277083 138bc75d-0d04-0410-961f-82ee72b054a4
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This finishes the part 1 of 2 patch submitted by Andrew Burgess on Aug 19.
This adds the argument registers but not t0 (aka x5) to SIBCALL_REGS. It
also adds the missing riscv_regno_to_class change.
Tested with cross riscv32-elf and riscv64-linux toolchain build and check.
There were no regressions. I see about a 0.01% code size reduction for the
C and libstdc++ libraries.
gcc/
* config/riscv/riscv.h (REG_CLASS_CONTENTS): Add argument passing
regs to SIBCALL_REGS.
* config/riscv/riscv.c (riscv_regno_to_class): Change argument
passing regs to SIBCALL_REGS.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277082 138bc75d-0d04-0410-961f-82ee72b054a4
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optimization
gcc/ChangeLog:
PR tree-optimization/83821
* tree-ssa-strlen.c (maybe_invalidate): Add argument. Consider
the length of a string when available.
(handle_builtin_memset) Add argument.
(handle_store, strlen_check_and_optimize_call): Same.
(check_and_optimize_stmt): Same. Pass it to callees.
gcc/testsuite/ChangeLog:
PR tree-optimization/83821
* c-c++-common/Warray-bounds-4.c: Remove XFAIL.
* gcc.dg/strlenopt-82.c: New test.
* gcc.dg/strlenopt-83.c: Same.
* gcc.dg/strlenopt-84.c: Same.
* gcc.dg/strlenopt-85.c: Same.
* gcc.dg/strlenopt-86.c: Same.
* gcc.dg/tree-ssa/calloc-4.c: Same.
* gcc.dg/tree-ssa/calloc-5.c: Same.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277080 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/testsuite/ChangeLog:
PR tree-optimization/91996
* gcc.dg/strlenopt-80.c: New test.
* gcc.dg/strlenopt-81.c: New test.
gcc/ChangeLog:
PR tree-optimization/91996
* tree-ssa-strlen.c (maybe_warn_pointless_strcmp): Improve location
information.
(compare_nonzero_chars): Add an overload.
(count_nonzero_bytes): Add an argument. Call overload above.
Handle non-constant lengths in some range.
(handle_store): Add an argument.
(check_and_optimize_stmt): Pass an argument to handle_store.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277076 138bc75d-0d04-0410-961f-82ee72b054a4
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The Arm port is failing bootstrap because GCC is now warning about an
unitialized array.
The code is complex enough that I certainly can't be sure the compiler
is wrong, so perhaps the best fix here is just to memset the entire
array before use.
* config/arm/arm.c (neon_valid_immediate): Clear bytes before use.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@277073 138bc75d-0d04-0410-961f-82ee72b054a4
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PR tree-optimization/91896
* tree-vect-loop.c (vectorizable_reduction): The single
def-use cycle optimization cannot apply when there's more
than one pattern stmt involved.
* gcc.dg/torture/pr91896.c: New testcase.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276158 138bc75d-0d04-0410-961f-82ee72b054a4
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* tree-vect-loop.c (vect_analyze_loop_operations): Analyze
loop-closed PHIs that are vect_internal_def.
(vect_create_epilog_for_reduction): Exit early for nested cycles.
Simplify.
(vectorizable_lc_phi): New.
* tree-vect-stmts.c (vect_analyze_stmt): Call vectorize_lc_phi.
(vect_transform_stmt): Likewise.
* tree-vectorizer.h (stmt_vec_info_type): Add lc_phi_info_type.
(vectorizable_lc_phi): Declare.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276157 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/testsuite/CHangeLog:
* gcc.dg/strlenopt-79.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276156 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276151 138bc75d-0d04-0410-961f-82ee72b054a4
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* tree-vect-loop.c (vect_analyze_loop_operations): Also call
vectorizable_reduction for vect_double_reduction_def.
(vect_transform_loop): Likewise.
(vect_create_epilog_for_reduction): Move double-reduction
PHI creation and preheader argument setting of PHIs ...
(vectorizable_reduction): ... here. Also process
vect_double_reduction_def PHIs, creating the vectorized
PHI nodes, remembering the scalar adjustment computed for
the epilogue in STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT.
Remember the original reduction code in STMT_VINFO_REDUC_CODE.
* tree-vectorizer.c (vec_info::new_stmt_vec_info):
Initialize STMT_VINFO_REDUC_CODE.
* tree-vectorizer.h (_stmt_vec_info::reduc_epilogue_adjustment): New.
(_stmt_vec_info::reduc_code): Likewise.
(STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT): Likewise.
(STMT_VINFO_REDUC_CODE): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276150 138bc75d-0d04-0410-961f-82ee72b054a4
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When -march=native is passed to host_detect_local_cpu to the backend,
it overrides all command lines after it. That means
$ gcc -march=native -march=armv8-a
is treated as
$ gcc -march=armv8-a -march=native
Prune joined switches with Negative and RejectNegative to allow
-march=armv8-a to override previous -march=native on command-line.
This is the same fix as was applied for i386 in SVN revision 269164 but for
aarch64 and arm.
2019-09-26 Matt Turner <mattst88@gmail.com>
PR driver/69471
* config/aarch64/aarch64.opt (march=): Add Negative(march=).
(mtune=): Add Negative(mtune=).
(mcpu=): Add Negative(mcpu=).
* config/arm/arm.opt: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276148 138bc75d-0d04-0410-961f-82ee72b054a4
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This patch implements some more SIMD32, but these ones have a DImode result+addend.
Apart from that there's nothing too exciting about them.
Bootstrapped and tested on arm-none-linux-gnueabihf.
* config/arm/arm.md (arm_<simd32_op>): New define_insn.
* config/arm/arm_acle.h (__smlald, __smlaldx, __smlsld, __smlsldx):
Define.
* config/arm/arm_acle.h: Define builtins for the above.
* config/arm/iterators.md (SIMD32_DIMODE): New int_iterator.
(simd32_op): Handle the above.
* config/arm/unspecs.md: Define unspecs for the above.
* gcc.target/arm/acle/simd32.c: Update test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276147 138bc75d-0d04-0410-961f-82ee72b054a4
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This patch is part of a series to implement the SIMD32 ACLE intrinsics [1].
The interesting parts implementation-wise involve adding support for setting and reading
the Q bit for saturation and the GE-bits for the packed SIMD instructions.
That will come in a later patch.
For now, this patch implements the other intrinsics that don't need anything special ;
just a mapping from arm_acle.h function to builtin to RTL expander+unspec.
I've compressed as many as I could with iterators so that we end up needing only 3
new define_insns.
Bootstrapped and tested on arm-none-linux-gnueabihf.
[1] https://developer.arm.com/docs/101028/latest/data-processing-intrinsics
* config/arm/arm.md (arm_<simd32_op>): New define_insn.
(arm_<sup>xtb16): Likewise.
(arm_usada8): Likewise.
* config/arm/arm_acle.h (__qadd8, __qsub8, __shadd8, __shsub8,
__uhadd8, __uhsub8, __uqadd8, __uqsub8, __qadd16, __qasx, __qsax,
__qsub16, __shadd16, __shasx, __shsax, __shsub16, __uhadd16, __uhasx,
__uhsax, __uhsub16, __uqadd16, __uqasx, __uqsax, __uqsub16, __sxtab16,
__sxtb16, __uxtab16, __uxtb16): Define.
* config/arm/arm_acle_builtins.def: Define builtins for the above.
* config/arm/unspecs.md: Define unspecs for the above.
* config/arm/iterators.md (SIMD32_NOGE_BINOP): New int_iterator.
(USXTB16): Likewise.
(simd32_op): New int_attribute.
(sup): Handle UNSPEC_SXTB16, UNSPEC_UXTB16.
* doc/sourcebuild.exp (arm_simd32_ok): Document.
* lib/target-supports.exp
(check_effective_target_arm_simd32_ok_nocache): New procedure.
(check_effective_target_arm_simd32_ok): Likewise.
(add_options_for_arm_simd32): Likewise.
* gcc.target/arm/acle/simd32.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276146 138bc75d-0d04-0410-961f-82ee72b054a4
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My recent assemble_real patch (r275873) meant that we now output
negative FP16 constants in the same way as we'd output an integer
subreg of them. This patch updates gcc.target/arm/fp16-* accordingly.
2019-09-26 Richard Sandiford <richard.sandiford@arm.com>
gcc/testsuite/
* gcc.target/arm/fp16-compile-alt-3.c: Expect (__fp16) -2.0
to be written as a negative short rather than a positive one.
* gcc.target/arm/fp16-compile-ieee-3.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276145 138bc75d-0d04-0410-961f-82ee72b054a4
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2019-09-26 Martin Jambor <mjambor@suse.cz>
* ipa-sra.c (verify_splitting_accesses): Fix quoting in a call to
internal_error.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276144 138bc75d-0d04-0410-961f-82ee72b054a4
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2019-09-26 Martin Jambor <mjambor@suse.cz>
* ipa-sra.c (process_scan_results): Fix continue condition.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276143 138bc75d-0d04-0410-961f-82ee72b054a4
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2019-09-26 Martin Liska <mliska@suse.cz>
PR tree-optimization/91885
* tree-vectorizer.c (try_vectorize_loop_1):
Add TODO_update_ssa_only_virtuals similarly to what slp
pass does.
2019-09-26 Martin Liska <mliska@suse.cz>
PR tree-optimization/91885
* gcc.dg/pr91885.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276141 138bc75d-0d04-0410-961f-82ee72b054a4
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The PLUS handling in aarch64_rtx_costs only checked for nonnegative
constants, meaning that simple immediate subtractions like:
(set (reg R1) (plus (reg R2) (const_int -8)))
had a cost of two instructions.
2019-09-26 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Use
aarch64_plus_immediate rather than aarch64_uimm12_shift
to test for valid PLUS immediates.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276140 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276139 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/fortran/ChangeLog:
PR fortran/91426
* error.c (curr_diagnostic): New static variable.
(gfc_report_diagnostic): New static function.
(gfc_warning): Replace call to diagnostic_report_diagnostic with
call to gfc_report_diagnostic.
(gfc_format_decoder): Colorize the text of %L and %C to match the
colorization used by diagnostic_show_locus.
(gfc_warning_now_at): Replace call to diagnostic_report_diagnostic with
call to gfc_report_diagnostic.
(gfc_warning_now): Likewise.
(gfc_warning_internal): Likewise.
(gfc_error_now): Likewise.
(gfc_fatal_error): Likewise.
(gfc_error_opt): Likewise.
(gfc_internal_error): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276132 138bc75d-0d04-0410-961f-82ee72b054a4
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Hi,
Martin and his clang warnings discovered that I forgot to remove a
static inline function and a variable when ripping out the old IPA-SRA
from tree-sra.c and both are now unused. Thus I am doing that now
with the patch below which I will commit as obvious (after including
it in a round of a bootstrap and testing on an x86_64-linux).
Thanks,
Martin
2019-09-25 Martin Jambor <mjambor@suse.cz>
* tree-sra.c (no_accesses_p): Remove.
(no_accesses_representant): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276128 138bc75d-0d04-0410-961f-82ee72b054a4
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* call.c (convert_like_real): Use similar_type_p in an assert.
* g++.dg/conversion/packed1.C: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276127 138bc75d-0d04-0410-961f-82ee72b054a4
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We're somewhat inconsistent in arm_neon.h when it comes to using the implementation namespace for local
identifiers. This means things like:
#define hash_abcd 0
#define hash_e 1
#define wk 2
#include "arm_neon.h"
uint32x4_t
foo (uint32x4_t a, uint32_t b, uint32x4_t c)
{
return vsha1cq_u32 (a, b, c);
}
don't compile.
This patch fixes these issues throughout the whole of arm_neon.h
Bootstrapped and tested on aarch64-none-linux-gnu.
The advsimd-intrinsics.exp tests pass just fine.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276125 138bc75d-0d04-0410-961f-82ee72b054a4
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PR tree-optimization/91896
* tree-vect-loop.c (vectorizable_reduction): The single
def-use cycle optimization cannot apply when there's more
than one pattern stmt involved.
* gcc.dg/torture/pr91896.c: New testcase.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276123 138bc75d-0d04-0410-961f-82ee72b054a4
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2019-09-25 Martin Liska <mliska@suse.cz>
* gcc.target/s390/pr91014.c: Move to ...
* gcc.dg/pr91014.c: ... this.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276120 138bc75d-0d04-0410-961f-82ee72b054a4
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2019-09-25 Paolo Carlini <paolo.carlini@oracle.com>
* name-lookup.c (check_extern_c_conflict): Use DECL_SOURCE_LOCATION.
(check_local_shadow): Use it in three additional places.
/testsuite
2019-09-25 Paolo Carlini <paolo.carlini@oracle.com>
* g++.dg/diagnostic/redeclaration-1.C: New.
* g++.dg/lookup/extern-c-hidden.C: Test location(s) too.
* g++.dg/lookup/extern-c-redecl.C: Likewise.
* g++.dg/lookup/extern-c-redecl6.C: Likewise.
* g++.old-deja/g++.other/using9.C: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276119 138bc75d-0d04-0410-961f-82ee72b054a4
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The break here was skipping over the code that sets EXPR_LOCATION on the
call expressions, for no good reason.
* parser.c (cp_parser_postfix_expression): Do set location of
dependent member call.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276112 138bc75d-0d04-0410-961f-82ee72b054a4
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