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|
2014-06-04 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r211211.
2014-06-04 Bin Cheng <bin.cheng@arm.com>
* config/aarch64/aarch64.c (aarch64_classify_address)
(aarch64_legitimize_reload_address): Support full addressing modes
for vector modes.
* config/aarch64/aarch64.md (mov<mode>, movmisalign<mode>)
(*aarch64_simd_mov<mode>, *aarch64_simd_mov<mode>): Relax predicates.
2014-05-25 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209906.
2014-04-29 Alan Lawrence <alan.lawrence@arm.com>
* config/aarch64/arm_neon.h (vzip1_f32, vzip1_p8, vzip1_p16, vzip1_s8,
vzip1_s16, vzip1_s32, vzip1_u8, vzip1_u16, vzip1_u32, vzip1q_f32,
vzip1q_f64, vzip1q_p8, vzip1q_p16, vzip1q_s8, vzip1q_s16, vzip1q_s32,
vzip1q_s64, vzip1q_u8, vzip1q_u16, vzip1q_u32, vzip1q_u64, vzip2_f32,
vzip2_p8, vzip2_p16, vzip2_s8, vzip2_s16, vzip2_s32, vzip2_u8,
vzip2_u16, vzip2_u32, vzip2q_f32, vzip2q_f64, vzip2q_p8, vzip2q_p16,
vzip2q_s8, vzip2q_s16, vzip2q_s32, vzip2q_s64, vzip2q_u8, vzip2q_u16,
vzip2q_u32, vzip2q_u64): Replace inline __asm__ with __builtin_shuffle.
2014-05-25 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209897.
2014-04-29 James Greenhalgh <james.greenhalgh@arm.com>
* calls.c (initialize_argument_information): Always treat
PUSH_ARGS_REVERSED as 1, simplify code accordingly.
(expand_call): Likewise.
(emit_library_call_calue_1): Likewise.
* expr.c (PUSH_ARGS_REVERSED): Do not define.
(emit_push_insn): Always treat PUSH_ARGS_REVERSED as 1, simplify
code accordingly.
2014-05-25 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209880.
2014-04-28 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/aarch64-builtins.c
(aarch64_types_storestruct_lane_qualifiers): New.
(TYPES_STORESTRUCT_LANE): Likewise.
* config/aarch64/aarch64-simd-builtins.def (st2_lane): New.
(st3_lane): Likewise.
(st4_lane): Likewise.
* config/aarch64/aarch64-simd.md (vec_store_lanesoi_lane<mode>): New.
(vec_store_lanesci_lane<mode>): Likewise.
(vec_store_lanesxi_lane<mode>): Likewise.
(aarch64_st2_lane<VQ:mode>): Likewise.
(aarch64_st3_lane<VQ:mode>): Likewise.
(aarch64_st4_lane<VQ:mode>): Likewise.
* config/aarch64/aarch64.md (unspec): Add UNSPEC_ST{2,3,4}_LANE.
* config/aarch64/arm_neon.h
(__ST2_LANE_FUNC): Rewrite using builtins, update use points to
use new macro arguments.
(__ST3_LANE_FUNC): Likewise.
(__ST4_LANE_FUNC): Likewise.
* config/aarch64/iterators.md (V_TWO_ELEM): New.
(V_THREE_ELEM): Likewise.
(V_FOUR_ELEM): Likewise.
2014-05-25 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209878.
2014-04-28 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): New.
* config/aarch64/aarch64.c
(aarch64_cannot_change_mode_class): Weaken conditions.
(aarch64_modes_tieable_p): New.
* config/aarch64/aarch64.h (MODES_TIEABLE_P): Use it.
2014-05-25 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209808.
2014-04-25 Jiong Wang <jiong.wang@arm.com>
* config/arm/predicates.md (call_insn_operand): Add long_call check.
* config/arm/arm.md (sibcall, sibcall_value): Force the address to
reg for long_call.
* config/arm/arm.c (arm_function_ok_for_sibcall): Remove long_call
restriction.
2014-05-25 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209806.
2014-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.c (arm_cortex_a8_tune): Initialise
T16-related fields.
2014-05-25 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209742, 209749.
2014-04-24 Alan Lawrence <alan.lawrence@arm.com>
* config/aarch64/aarch64.c (aarch64_evpc_tbl): Enable for bigendian.
2014-04-24 Tejas Belagod <tejas.belagod@arm.com>
* config/aarch64/aarch64.c (aarch64_evpc_tbl): Reverse order of elements
for big-endian.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209736.
2014-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64-builtins.c
(aarch64_builtin_vectorized_function): Handle BUILT_IN_BSWAP16,
BUILT_IN_BSWAP32, BUILT_IN_BSWAP64.
* config/aarch64/aarch64-simd.md (bswap<mode>): New pattern.
* config/aarch64/aarch64-simd-builtins.def: Define vector bswap
builtins.
* config/aarch64/iterator.md (VDQHSD): New mode iterator.
(Vrevsuff): New mode attribute.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209712.
2014-04-23 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
* config/aarch64/aarch64.md (stack_protect_set, stack_protect_test)
(stack_protect_set_<mode>, stack_protect_test_<mode>): Add
machine descriptions for Stack Smashing Protector.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209711.
2014-04-23 Richard Earnshaw <rearnsha@arm.com>
* aarch64.md (<optab>_rol<mode>3): New pattern.
(<optab>_rolsi3_uxtw): Likewise.
* aarch64.c (aarch64_strip_shift): Handle ROTATE and ROTATERT.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209710.
2014-04-23 James Greenhalgh <james.greenhalgh@arm.com>
* config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
(arm_cortex_a12_tune): Likewise.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209706.
2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209701, 209702, 209703, 209704, 209705.
2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.md (arm_rev16si2): New pattern.
(arm_rev16si2_alt): Likewise.
* config/arm/arm.c (arm_new_rtx_costs): Handle rev16 case.
2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.md (rev16<mode>2): New pattern.
(rev16<mode>2_alt): Likewise.
* config/aarch64/aarch64.c (aarch64_rtx_costs): Handle rev16 case.
* config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p): New.
(aarch_rev16_shleft_mask_imm_p): Likewise.
(aarch_rev16_p_1): Likewise.
(aarch_rev16_p): Likewise.
* config/arm/aarch-common-protos.h (aarch_rev16_p): Declare extern.
(aarch_rev16_shright_mask_imm_p): Likewise.
(aarch_rev16_shleft_mask_imm_p): Likewise.
2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/aarch-common-protos.h (alu_cost_table): Add rev field.
* config/arm/aarch-cost-tables.h (generic_extra_costs): Specify
rev cost.
(cortex_a53_extra_costs): Likewise.
(cortex_a57_extra_costs): Likewise.
* config/arm/arm.c (cortexa9_extra_costs): Likewise.
(cortexa7_extra_costs): Likewise.
(cortexa8_extra_costs): Likewise.
(cortexa12_extra_costs): Likewise.
(cortexa15_extra_costs): Likewise.
(v7m_extra_costs): Likewise.
(arm_new_rtx_costs): Handle BSWAP.
2013-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.c (cortexa8_extra_costs): New table.
(arm_cortex_a8_tune): New tuning struct.
* config/arm/arm-cores.def (cortex-a8): Use cortex_a8 tuning struct.
2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.c (arm_new_rtx_costs): Handle FMA.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209659.
2014-04-22 Richard Henderson <rth@redhat.com>
* config/aarch64/aarch64 (addti3, subti3): New expanders.
(add<GPI>3_compare0): Remove leading * from name.
(add<GPI>3_carryin): Likewise.
(sub<GPI>3_compare0): Likewise.
(sub<GPI>3_carryin): Likewise.
(<su_optab>mulditi3): New expander.
(multi3): New expander.
(madd<GPI>): Remove leading * from name.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209645.
2014-04-22 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
Handle TLS for ILP32.
* config/aarch64/aarch64.md (tlsie_small): Rename to ...
(tlsie_small_<mode>): this and handle PTR.
(tlsie_small_sidi): New pattern.
(tlsle_small): Change to an expand to handle ILP32.
(tlsle_small_<mode>): New pattern.
(tlsdesc_small): Rename to ...
(tlsdesc_small_<mode>): this and handle PTR.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209643.
2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209641, 209642.
2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
* config/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
(aarch64_types_signed_unsigned_qualifiers): Qualifier added.
(aarch64_types_signed_poly_qualifiers): Likewise.
(aarch64_types_unsigned_signed_qualifiers): Likewise.
(aarch64_types_poly_signed_qualifiers): Likewise.
(TYPES_REINTERP_SS): Type macro added.
(TYPES_REINTERP_SU): Likewise.
(TYPES_REINTERP_SP): Likewise.
(TYPES_REINTERP_US): Likewise.
(TYPES_REINTERP_PS): Likewise.
(aarch64_fold_builtin): New expression folding added.
* config/aarch64/aarch64-simd-builtins.def (REINTERP):
Declarations removed.
(REINTERP_SS): Declarations added.
(REINTERP_US): Likewise.
(REINTERP_PS): Likewise.
(REINTERP_SU): Likewise.
(REINTERP_SP): Likewise.
* config/aarch64/arm_neon.h (vreinterpret_p8_f64): Implemented.
(vreinterpretq_p8_f64): Likewise.
(vreinterpret_p16_f64): Likewise.
(vreinterpretq_p16_f64): Likewise.
(vreinterpret_f32_f64): Likewise.
(vreinterpretq_f32_f64): Likewise.
(vreinterpret_f64_f32): Likewise.
(vreinterpret_f64_p8): Likewise.
(vreinterpret_f64_p16): Likewise.
(vreinterpret_f64_s8): Likewise.
(vreinterpret_f64_s16): Likewise.
(vreinterpret_f64_s32): Likewise.
(vreinterpret_f64_s64): Likewise.
(vreinterpret_f64_u8): Likewise.
(vreinterpret_f64_u16): Likewise.
(vreinterpret_f64_u32): Likewise.
(vreinterpret_f64_u64): Likewise.
(vreinterpretq_f64_f32): Likewise.
(vreinterpretq_f64_p8): Likewise.
(vreinterpretq_f64_p16): Likewise.
(vreinterpretq_f64_s8): Likewise.
(vreinterpretq_f64_s16): Likewise.
(vreinterpretq_f64_s32): Likewise.
(vreinterpretq_f64_s64): Likewise.
(vreinterpretq_f64_u8): Likewise.
(vreinterpretq_f64_u16): Likewise.
(vreinterpretq_f64_u32): Likewise.
(vreinterpretq_f64_u64): Likewise.
(vreinterpret_s64_f64): Likewise.
(vreinterpretq_s64_f64): Likewise.
(vreinterpret_u64_f64): Likewise.
(vreinterpretq_u64_f64): Likewise.
(vreinterpret_s8_f64): Likewise.
(vreinterpretq_s8_f64): Likewise.
(vreinterpret_s16_f64): Likewise.
(vreinterpretq_s16_f64): Likewise.
(vreinterpret_s32_f64): Likewise.
(vreinterpretq_s32_f64): Likewise.
(vreinterpret_u8_f64): Likewise.
(vreinterpretq_u8_f64): Likewise.
(vreinterpret_u16_f64): Likewise.
(vreinterpretq_u16_f64): Likewise.
(vreinterpret_u32_f64): Likewise.
(vreinterpretq_u32_f64): Likewise.
2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
* config/aarch64/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
* config/aarch64/aarch64/aarch64-simd-builtins.def (REINTERP): Removed.
(vreinterpret_p8_s8): Likewise.
* config/aarch64/aarch64/arm_neon.h (vreinterpret_p8_s8): Uses cast.
(vreinterpret_p8_s16): Likewise.
(vreinterpret_p8_s32): Likewise.
(vreinterpret_p8_s64): Likewise.
(vreinterpret_p8_f32): Likewise.
(vreinterpret_p8_u8): Likewise.
(vreinterpret_p8_u16): Likewise.
(vreinterpret_p8_u32): Likewise.
(vreinterpret_p8_u64): Likewise.
(vreinterpret_p8_p16): Likewise.
(vreinterpretq_p8_s8): Likewise.
(vreinterpretq_p8_s16): Likewise.
(vreinterpretq_p8_s32): Likewise.
(vreinterpretq_p8_s64): Likewise.
(vreinterpretq_p8_f32): Likewise.
(vreinterpretq_p8_u8): Likewise.
(vreinterpretq_p8_u16): Likewise.
(vreinterpretq_p8_u32): Likewise.
(vreinterpretq_p8_u64): Likewise.
(vreinterpretq_p8_p16): Likewise.
(vreinterpret_p16_s8): Likewise.
(vreinterpret_p16_s16): Likewise.
(vreinterpret_p16_s32): Likewise.
(vreinterpret_p16_s64): Likewise.
(vreinterpret_p16_f32): Likewise.
(vreinterpret_p16_u8): Likewise.
(vreinterpret_p16_u16): Likewise.
(vreinterpret_p16_u32): Likewise.
(vreinterpret_p16_u64): Likewise.
(vreinterpret_p16_p8): Likewise.
(vreinterpretq_p16_s8): Likewise.
(vreinterpretq_p16_s16): Likewise.
(vreinterpretq_p16_s32): Likewise.
(vreinterpretq_p16_s64): Likewise.
(vreinterpretq_p16_f32): Likewise.
(vreinterpretq_p16_u8): Likewise.
(vreinterpretq_p16_u16): Likewise.
(vreinterpretq_p16_u32): Likewise.
(vreinterpretq_p16_u64): Likewise.
(vreinterpretq_p16_p8): Likewise.
(vreinterpret_f32_s8): Likewise.
(vreinterpret_f32_s16): Likewise.
(vreinterpret_f32_s32): Likewise.
(vreinterpret_f32_s64): Likewise.
(vreinterpret_f32_u8): Likewise.
(vreinterpret_f32_u16): Likewise.
(vreinterpret_f32_u32): Likewise.
(vreinterpret_f32_u64): Likewise.
(vreinterpret_f32_p8): Likewise.
(vreinterpret_f32_p16): Likewise.
(vreinterpretq_f32_s8): Likewise.
(vreinterpretq_f32_s16): Likewise.
(vreinterpretq_f32_s32): Likewise.
(vreinterpretq_f32_s64): Likewise.
(vreinterpretq_f32_u8): Likewise.
(vreinterpretq_f32_u16): Likewise.
(vreinterpretq_f32_u32): Likewise.
(vreinterpretq_f32_u64): Likewise.
(vreinterpretq_f32_p8): Likewise.
(vreinterpretq_f32_p16): Likewise.
(vreinterpret_s64_s8): Likewise.
(vreinterpret_s64_s16): Likewise.
(vreinterpret_s64_s32): Likewise.
(vreinterpret_s64_f32): Likewise.
(vreinterpret_s64_u8): Likewise.
(vreinterpret_s64_u16): Likewise.
(vreinterpret_s64_u32): Likewise.
(vreinterpret_s64_u64): Likewise.
(vreinterpret_s64_p8): Likewise.
(vreinterpret_s64_p16): Likewise.
(vreinterpretq_s64_s8): Likewise.
(vreinterpretq_s64_s16): Likewise.
(vreinterpretq_s64_s32): Likewise.
(vreinterpretq_s64_f32): Likewise.
(vreinterpretq_s64_u8): Likewise.
(vreinterpretq_s64_u16): Likewise.
(vreinterpretq_s64_u32): Likewise.
(vreinterpretq_s64_u64): Likewise.
(vreinterpretq_s64_p8): Likewise.
(vreinterpretq_s64_p16): Likewise.
(vreinterpret_u64_s8): Likewise.
(vreinterpret_u64_s16): Likewise.
(vreinterpret_u64_s32): Likewise.
(vreinterpret_u64_s64): Likewise.
(vreinterpret_u64_f32): Likewise.
(vreinterpret_u64_u8): Likewise.
(vreinterpret_u64_u16): Likewise.
(vreinterpret_u64_u32): Likewise.
(vreinterpret_u64_p8): Likewise.
(vreinterpret_u64_p16): Likewise.
(vreinterpretq_u64_s8): Likewise.
(vreinterpretq_u64_s16): Likewise.
(vreinterpretq_u64_s32): Likewise.
(vreinterpretq_u64_s64): Likewise.
(vreinterpretq_u64_f32): Likewise.
(vreinterpretq_u64_u8): Likewise.
(vreinterpretq_u64_u16): Likewise.
(vreinterpretq_u64_u32): Likewise.
(vreinterpretq_u64_p8): Likewise.
(vreinterpretq_u64_p16): Likewise.
(vreinterpret_s8_s16): Likewise.
(vreinterpret_s8_s32): Likewise.
(vreinterpret_s8_s64): Likewise.
(vreinterpret_s8_f32): Likewise.
(vreinterpret_s8_u8): Likewise.
(vreinterpret_s8_u16): Likewise.
(vreinterpret_s8_u32): Likewise.
(vreinterpret_s8_u64): Likewise.
(vreinterpret_s8_p8): Likewise.
(vreinterpret_s8_p16): Likewise.
(vreinterpretq_s8_s16): Likewise.
(vreinterpretq_s8_s32): Likewise.
(vreinterpretq_s8_s64): Likewise.
(vreinterpretq_s8_f32): Likewise.
(vreinterpretq_s8_u8): Likewise.
(vreinterpretq_s8_u16): Likewise.
(vreinterpretq_s8_u32): Likewise.
(vreinterpretq_s8_u64): Likewise.
(vreinterpretq_s8_p8): Likewise.
(vreinterpretq_s8_p16): Likewise.
(vreinterpret_s16_s8): Likewise.
(vreinterpret_s16_s32): Likewise.
(vreinterpret_s16_s64): Likewise.
(vreinterpret_s16_f32): Likewise.
(vreinterpret_s16_u8): Likewise.
(vreinterpret_s16_u16): Likewise.
(vreinterpret_s16_u32): Likewise.
(vreinterpret_s16_u64): Likewise.
(vreinterpret_s16_p8): Likewise.
(vreinterpret_s16_p16): Likewise.
(vreinterpretq_s16_s8): Likewise.
(vreinterpretq_s16_s32): Likewise.
(vreinterpretq_s16_s64): Likewise.
(vreinterpretq_s16_f32): Likewise.
(vreinterpretq_s16_u8): Likewise.
(vreinterpretq_s16_u16): Likewise.
(vreinterpretq_s16_u32): Likewise.
(vreinterpretq_s16_u64): Likewise.
(vreinterpretq_s16_p8): Likewise.
(vreinterpretq_s16_p16): Likewise.
(vreinterpret_s32_s8): Likewise.
(vreinterpret_s32_s16): Likewise.
(vreinterpret_s32_s64): Likewise.
(vreinterpret_s32_f32): Likewise.
(vreinterpret_s32_u8): Likewise.
(vreinterpret_s32_u16): Likewise.
(vreinterpret_s32_u32): Likewise.
(vreinterpret_s32_u64): Likewise.
(vreinterpret_s32_p8): Likewise.
(vreinterpret_s32_p16): Likewise.
(vreinterpretq_s32_s8): Likewise.
(vreinterpretq_s32_s16): Likewise.
(vreinterpretq_s32_s64): Likewise.
(vreinterpretq_s32_f32): Likewise.
(vreinterpretq_s32_u8): Likewise.
(vreinterpretq_s32_u16): Likewise.
(vreinterpretq_s32_u32): Likewise.
(vreinterpretq_s32_u64): Likewise.
(vreinterpretq_s32_p8): Likewise.
(vreinterpretq_s32_p16): Likewise.
(vreinterpret_u8_s8): Likewise.
(vreinterpret_u8_s16): Likewise.
(vreinterpret_u8_s32): Likewise.
(vreinterpret_u8_s64): Likewise.
(vreinterpret_u8_f32): Likewise.
(vreinterpret_u8_u16): Likewise.
(vreinterpret_u8_u32): Likewise.
(vreinterpret_u8_u64): Likewise.
(vreinterpret_u8_p8): Likewise.
(vreinterpret_u8_p16): Likewise.
(vreinterpretq_u8_s8): Likewise.
(vreinterpretq_u8_s16): Likewise.
(vreinterpretq_u8_s32): Likewise.
(vreinterpretq_u8_s64): Likewise.
(vreinterpretq_u8_f32): Likewise.
(vreinterpretq_u8_u16): Likewise.
(vreinterpretq_u8_u32): Likewise.
(vreinterpretq_u8_u64): Likewise.
(vreinterpretq_u8_p8): Likewise.
(vreinterpretq_u8_p16): Likewise.
(vreinterpret_u16_s8): Likewise.
(vreinterpret_u16_s16): Likewise.
(vreinterpret_u16_s32): Likewise.
(vreinterpret_u16_s64): Likewise.
(vreinterpret_u16_f32): Likewise.
(vreinterpret_u16_u8): Likewise.
(vreinterpret_u16_u32): Likewise.
(vreinterpret_u16_u64): Likewise.
(vreinterpret_u16_p8): Likewise.
(vreinterpret_u16_p16): Likewise.
(vreinterpretq_u16_s8): Likewise.
(vreinterpretq_u16_s16): Likewise.
(vreinterpretq_u16_s32): Likewise.
(vreinterpretq_u16_s64): Likewise.
(vreinterpretq_u16_f32): Likewise.
(vreinterpretq_u16_u8): Likewise.
(vreinterpretq_u16_u32): Likewise.
(vreinterpretq_u16_u64): Likewise.
(vreinterpretq_u16_p8): Likewise.
(vreinterpretq_u16_p16): Likewise.
(vreinterpret_u32_s8): Likewise.
(vreinterpret_u32_s16): Likewise.
(vreinterpret_u32_s32): Likewise.
(vreinterpret_u32_s64): Likewise.
(vreinterpret_u32_f32): Likewise.
(vreinterpret_u32_u8): Likewise.
(vreinterpret_u32_u16): Likewise.
(vreinterpret_u32_u64): Likewise.
(vreinterpret_u32_p8): Likewise.
(vreinterpret_u32_p16): Likewise.
(vreinterpretq_u32_s8): Likewise.
(vreinterpretq_u32_s16): Likewise.
(vreinterpretq_u32_s32): Likewise.
(vreinterpretq_u32_s64): Likewise.
(vreinterpretq_u32_f32): Likewise.
(vreinterpretq_u32_u8): Likewise.
(vreinterpretq_u32_u16): Likewise.
(vreinterpretq_u32_u64): Likewise.
(vreinterpretq_u32_p8): Likewise.
(vreinterpretq_u32_p16): Likewise.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209640.
2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
* gcc/config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>):
Pattern extended.
* config/aarch64/aarch64-simd-builtins.def (sqneg): Iterator
extended.
(sqabs): Likewise.
* config/aarch64/arm_neon.h (vqneg_s64): New intrinsic.
(vqnegd_s64): Likewise.
(vqabs_s64): Likewise.
(vqabsd_s64): Likewise.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209627, 209636.
2014-04-22 Renlin <renlin.li@arm.com>
Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64.h (aarch64_frame): Delete "fp_lr_offset".
* config/aarch64/aarch64.c (aarch64_layout_frame)
(aarch64_initial_elimination_offset): Likewise.
2014-04-22 Marcus Shawcroft <marcus.shawcroft@arm.com>
* config/aarch64/aarch64.c (aarch64_initial_elimination_offset):
Fix indentation.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209618.
2014-04-22 Renlin Li <Renlin.Li@arm.com>
* config/aarch64/aarch64.c (aarch64_print_operand_address): Adjust
the output asm format.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209617.
2014-04-22 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/aarch64-simd.md
(aarch64_cm<optab>di): Always split.
(*aarch64_cm<optab>di): New.
(aarch64_cmtstdi): Always split.
(*aarch64_cmtstdi): New.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209615.
2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config/arm/arm.c (arm_hard_regno_mode_ok): Loosen
restrictions on core registers for DImode values in Thumb2.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209613, r209614.
2014-04-22 Ian Bolton <ian.bolton@arm.com>
* config/arm/arm.md (*anddi_notdi_zesidi): New pattern.
* config/arm/thumb2.md (*iordi_notdi_zesidi): New pattern.
2014-04-22 Ian Bolton <ian.bolton@arm.com>
* config/arm/thumb2.md (*iordi_notdi_di): New pattern.
(*iordi_notzesidi_di): Likewise.
(*iordi_notsesidi_di): Likewise.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209561.
2014-04-22 Ian Bolton <ian.bolton@arm.com>
* config/arm/arm-protos.h (tune_params): New struct members.
* config/arm/arm.c: Initialise tune_params per processor.
(thumb2_reorg): Suppress conversion from t32 to t16 when optimizing
for speed, based on new tune_params.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209559.
2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
* config/aarch64/aarch64-builtins.c (BUILTIN_VDQF_DF): Macro
added.
* config/aarch64/aarch64-simd-builtins.def (frintn): Use added
macro.
* config/aarch64/aarch64-simd.md (<frint_pattern>): Comment
corrected.
* config/aarch64/aarch64.md (<frint_pattern>): Likewise.
* config/aarch64/arm_neon.h (vrnd_f64): Added.
(vrnda_f64): Likewise.
(vrndi_f64): Likewise.
(vrndm_f64): Likewise.
(vrndn_f64): Likewise.
(vrndp_f64): Likewise.
(vrndx_f64): Likewise.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209419.
2014-04-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR rtl-optimization/60663
* config/arm/arm.c (arm_new_rtx_costs): Improve ASM_OPERANDS case,
avoid 0 cost.
2014-05-23 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209457.
2014-04-16 Andrew Pinski <apinski@cavium.com>
* config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
definition.
2014-05-19 Yvan Roux <yvan.roux@linaro.org>
* LINARO-VERSION: Bump version.
2014-05-14 Yvan Roux <yvan.roux@linaro.org>
GCC Linaro 4.9-2014.05 released.
* LINARO-VERSION: Update.
2014-05-13 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209889.
2014-04-29 Zhenqiang Chen <zhenqiang.chen@linaro.org>
* config/aarch64/aarch64.md (mov<mode>cc): New for GPF.
2014-05-13 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r209556.
2014-04-22 Zhenqiang Chen <zhenqiang.chen@linaro.org>
* config/arm/arm.c (arm_print_operand, thumb_exit): Make sure
GET_MODE_SIZE argument is enum machine_mode.
2014-04-28 Yvan Roux <yvan.roux@linaro.org>
* LINARO-VERSION: Bump version.
2014-04-22 Yvan Roux <yvan.roux@linaro.org>
GCC Linaro 4.9-2014.04 released.
* LINARO-VERSION: New file.
* configure.ac: Add Linaro version string.
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