diff options
author | Peter Bergner <bergner@vnet.ibm.com> | 2018-06-11 18:25:37 +0000 |
---|---|---|
committer | Peter Bergner <bergner@vnet.ibm.com> | 2018-06-11 18:25:37 +0000 |
commit | 0127a910b54d79e01e57fe23bcedd71630dc5f2e (patch) | |
tree | c6df89b8a1403d88e8cc051f0ccb9ec034c78538 | |
parent | 264d16c24d861f29fd26a87f6c87098328caa148 (diff) |
gcc/
Backport from mainline
2018-06-08 Peter Bergner <bergner@vnet.ibm.com>
PR target/85755
* config/rs6000/rs6000.c (mem_operand_gpr): Enable PRE_INC and PRE_DEC
addresses.
gcc/testsuite/
Backport from mainline
2018-06-08 Peter Bergner <bergner@vnet.ibm.com>
PR target/85755
* gcc.target/powerpc/pr85755.c: New test.
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/gcc-7-branch@261442 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/ChangeLog | 9 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 7 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr85755.c | 22 |
4 files changed, 46 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2dd1ec985e8..61eda2f22e2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2018-06-11 Peter Bergner <bergner@vnet.ibm.com> + + Backport from mainline + 2018-06-08 Peter Bergner <bergner@vnet.ibm.com> + + PR target/85755 + * config/rs6000/rs6000.c (mem_operand_gpr): Enable PRE_INC and PRE_DEC + addresses. + 2018-06-07 Peter Bergner <bergner@vnet.ibm.com> Backport from mainline diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 75eab0375af..01ae6ad8787 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -8565,6 +8565,13 @@ mem_operand_gpr (rtx op, machine_mode mode) int extra; rtx addr = XEXP (op, 0); + /* PR85755: Allow PRE_INC and PRE_DEC addresses. */ + if (TARGET_UPDATE + && (GET_CODE (addr) == PRE_INC || GET_CODE (addr) == PRE_DEC) + && mode_supports_pre_incdec_p (mode) + && legitimate_indirect_address_p (XEXP (addr, 0), false)) + return true; + /* Don't allow non-offsettable addresses. See PRs 83969 and 84279. */ if (!rs6000_offsettable_memref_p (op, mode, false)) return false; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c3173666704..7909bf58054 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2018-06-11 Peter Bergner <bergner@vnet.ibm.com> + + Backport from mainline + 2018-06-08 Peter Bergner <bergner@vnet.ibm.com> + + PR target/85755 + * gcc.target/powerpc/pr85755.c: New test. + 2018-06-09 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/38351 diff --git a/gcc/testsuite/gcc.target/powerpc/pr85755.c b/gcc/testsuite/gcc.target/powerpc/pr85755.c new file mode 100644 index 00000000000..2d8741d639e --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr85755.c @@ -0,0 +1,22 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-options "-O1" } */ + +void +preinc (long *q, long n) +{ + long i; + for (i = 0; i < n; i++) + q[i] = i; +} + +void +predec (long *q, long n) +{ + long i; + for (i = n; i >= 0; i--) + q[i] = i; +} + +/* { dg-final { scan-assembler-times {\mstwu\M} 2 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mstdu\M} 2 { target lp64 } } } */ +/* { dg-final { scan-assembler-not {\mstfdu\M} } } */ |