diff options
| author | Uros Bizjak <ubizjak@gmail.com> | 2016-08-29 20:26:13 +0000 |
|---|---|---|
| committer | Uros Bizjak <ubizjak@gmail.com> | 2016-08-29 20:26:13 +0000 |
| commit | 7ca6d5886f8800473cdb36fdafbd466ea337bd60 (patch) | |
| tree | ee70bfcf6a97abe4419547ff0ac07a8393d5fd66 | |
| parent | 9a944155dc0880fb687aaca85ef17140100a3104 (diff) | |
PR target/77403
* config/i386/sse.md (vec_set_lo_<mode><mask_name>): Fix assembler
template for intel asm dialect.
(vec_set_hi_<mode><mask_name>): Ditto.
testsuite/ChangeLog:
PR target/77403
* gcc.target/i386/pr77403.c: New test.
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/gcc-5-branch@239842 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 8 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr77403.c | 15 |
4 files changed, 33 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2d7a4ab176f..bc2070f4011 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2016-08-29 Uros Bizjak <ubizjak@gmail.com> + + PR target/77403 + * config/i386/sse.md (vec_set_lo_<mode><mask_name>): Fix assembler + template for intel asm dialect. + (vec_set_hi_<mode><mask_name>): Ditto. + 2016-08-29 Eric Botcazou <ebotcazou@adacore.com> * Makefile.in (gcov-iov.h): Add dummy recipe. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index df50e7d5091..ab944dc3554 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -11866,7 +11866,7 @@ (const_int 12) (const_int 13) (const_int 14) (const_int 15)]))))] "TARGET_AVX512DQ" - "vinsert<shuffletype>32x8\t{$0x0, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, $0x0}" + "vinsert<shuffletype>32x8\t{$0x0, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, 0x0}" [(set_attr "type" "sselog") (set_attr "length_immediate" "1") (set_attr "prefix" "evex") @@ -11883,7 +11883,7 @@ (const_int 6) (const_int 7)])) (match_operand:<ssehalfvecmode> 2 "nonimmediate_operand" "vm")))] "TARGET_AVX512DQ" - "vinsert<shuffletype>32x8\t{$0x1, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, $0x1}" + "vinsert<shuffletype>32x8\t{$0x1, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, 0x1}" [(set_attr "type" "sselog") (set_attr "length_immediate" "1") (set_attr "prefix" "evex") @@ -11898,7 +11898,7 @@ (parallel [(const_int 4) (const_int 5) (const_int 6) (const_int 7)]))))] "TARGET_AVX512F" - "vinsert<shuffletype>64x4\t{$0x0, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, $0x0}" + "vinsert<shuffletype>64x4\t{$0x0, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, 0x0}" [(set_attr "type" "sselog") (set_attr "length_immediate" "1") (set_attr "prefix" "evex") @@ -11913,7 +11913,7 @@ (const_int 2) (const_int 3)])) (match_operand:<ssehalfvecmode> 2 "nonimmediate_operand" "vm")))] "TARGET_AVX512F" - "vinsert<shuffletype>64x4\t{$0x1, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, $0x1}" + "vinsert<shuffletype>64x4\t{$0x1, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, 0x1}" [(set_attr "type" "sselog") (set_attr "length_immediate" "1") (set_attr "prefix" "evex") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 82551ef68f2..cfb81fc3d21 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-08-29 Uros Bizjak <ubizjak@gmail.com> + + PR target/77403 + * gcc.target/i386/pr77403.c: New test. + 2016-08-29 Tom de Vries <tom@codesourcery.com> backport from trunk: @@ -145,8 +150,8 @@ 2016-07-20 Martin Jambor <mjambor@suse.cz> - PR fortran/71688 - * gfortran.dg/pr71688.f90: New test. + PR fortran/71688 + * gfortran.dg/pr71688.f90: New test. 2016-07-19 Jakub Jelinek <jakub@redhat.com> diff --git a/gcc/testsuite/gcc.target/i386/pr77403.c b/gcc/testsuite/gcc.target/i386/pr77403.c new file mode 100644 index 00000000000..9f6775a0c93 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr77403.c @@ -0,0 +1,15 @@ +/* { dg-do assemble } */ +/* { dg-require-effective-target int128 } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-require-effective-target masm_intel } */ +/* { dg-options "-O -mavx512f -masm=intel" } */ + +typedef __int128 V __attribute__((vector_size(64))); + +V v; + +void +foo() +{ + v ^= (V){1}; +} |