diff options
author | Christophe Lyon <christophe.lyon@linaro.org> | 2013-07-05 09:18:55 +0000 |
---|---|---|
committer | Christophe Lyon <christophe.lyon@linaro.org> | 2013-07-05 09:18:55 +0000 |
commit | 8a6501bd26c190182eb6aff9073a8b96084fd893 (patch) | |
tree | 22f9f69b7675d4f435ed9b19088f232bd0ad8e53 | |
parent | 140fba17bac3d3e5e57ea0ebb433d608c5ef744b (diff) |
2013-07-03 Christophe Lyon <christophe.lyon@linaro.org>
Revert backport from trunk r198928,198973,199203.
gcc/
2013-05-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR target/19599
PR target/57340
* config/arm/arm.c (any_sibcall_uses_r3): Rename to ..
(any_sibcall_could_use_r3): this and handle indirect calls.
(arm_get_frame_offsets): Rename use of any_sibcall_uses_r3.
2013-05-16 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR target/19599
* config/arm/arm.c (arm_function_ok_for_sibcall): Add check
for NULL decl.
2013-05-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR target/19599
* config/arm/predicates.md (call_insn_operand): New predicate.
* config/arm/constraints.md ("Cs", "Ss"): New constraints.
* config/arm/arm.md (*call_insn, *call_value_insn): Match only
if insn is not a tail call.
(*sibcall_insn, *sibcall_value_insn): Adjust for tailcalling through
registers.
* config/arm/arm.h (enum reg_class): New caller save register class.
(REG_CLASS_NAMES): Likewise.
(REG_CLASS_CONTENTS): Likewise.
* config/arm/arm.c (arm_function_ok_for_sibcall): Allow tailcalling
without decls.
gcc/testsuite/
2013-05-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR target/19599
* gcc.target/arm/pr40887.c: Adjust testcase.
* gcc.target/arm/pr19599.c: New test.
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_8-branch@200692 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/ChangeLog.linaro | 32 | ||||
-rw-r--r-- | gcc/config/arm/arm.c | 34 | ||||
-rw-r--r-- | gcc/config/arm/arm.h | 3 | ||||
-rw-r--r-- | gcc/config/arm/arm.md | 57 | ||||
-rw-r--r-- | gcc/config/arm/constraints.md | 9 | ||||
-rw-r--r-- | gcc/config/arm/predicates.md | 4 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog.linaro | 9 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/pr19599.c | 10 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/pr40887.c | 4 |
9 files changed, 66 insertions, 96 deletions
diff --git a/gcc/ChangeLog.linaro b/gcc/ChangeLog.linaro index 42589e7b9d6..bc4dfd8f29b 100644 --- a/gcc/ChangeLog.linaro +++ b/gcc/ChangeLog.linaro @@ -1,5 +1,37 @@ 2013-07-03 Christophe Lyon <christophe.lyon@linaro.org> + Revert backport from trunk r198928,198973,199203. + 2013-05-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + PR target/19599 + PR target/57340 + * config/arm/arm.c (any_sibcall_uses_r3): Rename to .. + (any_sibcall_could_use_r3): this and handle indirect calls. + (arm_get_frame_offsets): Rename use of any_sibcall_uses_r3. + + 2013-05-16 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + PR target/19599 + * config/arm/arm.c (arm_function_ok_for_sibcall): Add check + for NULL decl. + + 2013-05-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + PR target/19599 + * config/arm/predicates.md (call_insn_operand): New predicate. + * config/arm/constraints.md ("Cs", "Ss"): New constraints. + * config/arm/arm.md (*call_insn, *call_value_insn): Match only + if insn is not a tail call. + (*sibcall_insn, *sibcall_value_insn): Adjust for tailcalling through + registers. + * config/arm/arm.h (enum reg_class): New caller save register class. + (REG_CLASS_NAMES): Likewise. + (REG_CLASS_CONTENTS): Likewise. + * config/arm/arm.c (arm_function_ok_for_sibcall): Allow tailcalling + without decls. + +2013-07-03 Christophe Lyon <christophe.lyon@linaro.org> + Revert backport from mainline (r199438, r199439) 2013-05-30 Zhenqiang Chen <zhenqiang.chen@linaro.org> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index b39157105c4..997e9154dab 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -5385,8 +5385,9 @@ arm_function_ok_for_sibcall (tree decl, tree exp) if (cfun->machine->sibcall_blocked) return false; - /* Never tailcall something if we are generating code for Thumb-1. */ - if (TARGET_THUMB1) + /* Never tailcall something for which we have no decl, or if we + are generating code for Thumb-1. */ + if (decl == NULL || TARGET_THUMB1) return false; /* The PIC register is live on entry to VxWorks PLT entries, so we @@ -5396,14 +5397,13 @@ arm_function_ok_for_sibcall (tree decl, tree exp) /* Cannot tail-call to long calls, since these are out of range of a branch instruction. */ - if (decl && arm_is_long_call_p (decl)) + if (arm_is_long_call_p (decl)) return false; /* If we are interworking and the function is not declared static then we can't tail-call it unless we know that it exists in this compilation unit (since it might be a Thumb routine). */ - if (TARGET_INTERWORK && decl && TREE_PUBLIC (decl) - && !TREE_ASM_WRITTEN (decl)) + if (TARGET_INTERWORK && TREE_PUBLIC (decl) && !TREE_ASM_WRITTEN (decl)) return false; func_type = arm_current_func_type (); @@ -5435,7 +5435,6 @@ arm_function_ok_for_sibcall (tree decl, tree exp) sibling calls. */ if (TARGET_AAPCS_BASED && arm_abi == ARM_ABI_AAPCS - && decl && DECL_WEAK (decl)) return false; @@ -17568,27 +17567,11 @@ thumb_force_lr_save (void) || df_regs_ever_live_p (LR_REGNUM)); } -/* We do not know if r3 will be available because - we do have an indirect tailcall happening in this - particular case. */ -static bool -is_indirect_tailcall_p (rtx call) -{ - rtx pat = PATTERN (call); - - /* Indirect tail call. */ - pat = XVECEXP (pat, 0, 0); - if (GET_CODE (pat) == SET) - pat = SET_SRC (pat); - - pat = XEXP (XEXP (pat, 0), 0); - return REG_P (pat); -} /* Return true if r3 is used by any of the tail call insns in the current function. */ static bool -any_sibcall_could_use_r3 (void) +any_sibcall_uses_r3 (void) { edge_iterator ei; edge e; @@ -17602,8 +17585,7 @@ any_sibcall_could_use_r3 (void) if (!CALL_P (call)) call = prev_nonnote_nondebug_insn (call); gcc_assert (CALL_P (call) && SIBLING_CALL_P (call)); - if (find_regno_fusage (call, USE, 3) - || is_indirect_tailcall_p (call)) + if (find_regno_fusage (call, USE, 3)) return true; } return false; @@ -17770,7 +17752,7 @@ arm_get_frame_offsets (void) /* If it is safe to use r3, then do so. This sometimes generates better code on Thumb-2 by avoiding the need to use 32-bit push/pop instructions. */ - if (! any_sibcall_could_use_r3 () + if (! any_sibcall_uses_r3 () && arm_size_return_regs () <= 12 && (offsets->saved_regs_mask & (1 << 3)) == 0 && (TARGET_THUMB2 || !current_tune->prefer_ldrd_strd)) diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 75325bf5220..721a36fa4a8 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1140,7 +1140,6 @@ enum reg_class STACK_REG, BASE_REGS, HI_REGS, - CALLER_SAVE_REGS, GENERAL_REGS, CORE_REGS, VFP_D0_D7_REGS, @@ -1167,7 +1166,6 @@ enum reg_class "STACK_REG", \ "BASE_REGS", \ "HI_REGS", \ - "CALLER_SAVE_REGS", \ "GENERAL_REGS", \ "CORE_REGS", \ "VFP_D0_D7_REGS", \ @@ -1193,7 +1191,6 @@ enum reg_class { 0x00002000, 0x00000000, 0x00000000, 0x00000000 }, /* STACK_REG */ \ { 0x000020FF, 0x00000000, 0x00000000, 0x00000000 }, /* BASE_REGS */ \ { 0x00005F00, 0x00000000, 0x00000000, 0x00000000 }, /* HI_REGS */ \ - { 0x0000100F, 0x00000000, 0x00000000, 0x00000000 }, /* CALLER_SAVE_REGS */ \ { 0x00005FFF, 0x00000000, 0x00000000, 0x00000000 }, /* GENERAL_REGS */ \ { 0x00007FFF, 0x00000000, 0x00000000, 0x00000000 }, /* CORE_REGS */ \ { 0xFFFF0000, 0x00000000, 0x00000000, 0x00000000 }, /* VFP_D0_D7_REGS */ \ diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 49a29cef88f..2db39007347 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -8947,7 +8947,7 @@ (match_operand 1 "" "")) (use (match_operand 2 "" "")) (clobber (reg:SI LR_REGNUM))] - "TARGET_ARM && arm_arch5 && !SIBLING_CALL_P (insn)" + "TARGET_ARM && arm_arch5" "blx%?\\t%0" [(set_attr "type" "call")] ) @@ -8957,7 +8957,7 @@ (match_operand 1 "" "")) (use (match_operand 2 "" "")) (clobber (reg:SI LR_REGNUM))] - "TARGET_ARM && !arm_arch5 && !SIBLING_CALL_P (insn)" + "TARGET_ARM && !arm_arch5" "* return output_call (operands); " @@ -8976,7 +8976,7 @@ (match_operand 1 "" "")) (use (match_operand 2 "" "")) (clobber (reg:SI LR_REGNUM))] - "TARGET_ARM && !arm_arch5 && !SIBLING_CALL_P (insn)" + "TARGET_ARM && !arm_arch5" "* return output_call_mem (operands); " @@ -8989,7 +8989,7 @@ (match_operand 1 "" "")) (use (match_operand 2 "" "")) (clobber (reg:SI LR_REGNUM))] - "TARGET_THUMB1 && arm_arch5 && !SIBLING_CALL_P (insn)" + "TARGET_THUMB1 && arm_arch5" "blx\\t%0" [(set_attr "length" "2") (set_attr "type" "call")] @@ -9000,7 +9000,7 @@ (match_operand 1 "" "")) (use (match_operand 2 "" "")) (clobber (reg:SI LR_REGNUM))] - "TARGET_THUMB1 && !arm_arch5 && !SIBLING_CALL_P (insn)" + "TARGET_THUMB1 && !arm_arch5" "* { if (!TARGET_CALLER_INTERWORKING) @@ -9059,7 +9059,7 @@ (match_operand 2 "" ""))) (use (match_operand 3 "" "")) (clobber (reg:SI LR_REGNUM))] - "TARGET_ARM && arm_arch5 && !SIBLING_CALL_P (insn)" + "TARGET_ARM && arm_arch5" "blx%?\\t%1" [(set_attr "type" "call")] ) @@ -9070,7 +9070,7 @@ (match_operand 2 "" ""))) (use (match_operand 3 "" "")) (clobber (reg:SI LR_REGNUM))] - "TARGET_ARM && !arm_arch5 && !SIBLING_CALL_P (insn)" + "TARGET_ARM && !arm_arch5" "* return output_call (&operands[1]); " @@ -9086,8 +9086,7 @@ (match_operand 2 "" ""))) (use (match_operand 3 "" "")) (clobber (reg:SI LR_REGNUM))] - "TARGET_ARM && !arm_arch5 && (!CONSTANT_ADDRESS_P (XEXP (operands[1], 0))) - && !SIBLING_CALL_P (insn)" + "TARGET_ARM && !arm_arch5 && (!CONSTANT_ADDRESS_P (XEXP (operands[1], 0)))" "* return output_call_mem (&operands[1]); " @@ -9137,7 +9136,6 @@ (use (match_operand 2 "" "")) (clobber (reg:SI LR_REGNUM))] "TARGET_32BIT - && !SIBLING_CALL_P (insn) && (GET_CODE (operands[0]) == SYMBOL_REF) && !arm_is_long_call_p (SYMBOL_REF_DECL (operands[0]))" "* @@ -9154,7 +9152,6 @@ (use (match_operand 3 "" "")) (clobber (reg:SI LR_REGNUM))] "TARGET_32BIT - && !SIBLING_CALL_P (insn) && (GET_CODE (operands[1]) == SYMBOL_REF) && !arm_is_long_call_p (SYMBOL_REF_DECL (operands[1]))" "* @@ -9200,10 +9197,6 @@ "TARGET_32BIT" " { - if (!REG_P (XEXP (operands[0], 0)) - && (GET_CODE (XEXP (operands[0], 0)) != SYMBOL_REF)) - XEXP (operands[0], 0) = force_reg (SImode, XEXP (operands[0], 0)); - if (operands[2] == NULL_RTX) operands[2] = const0_rtx; }" @@ -9218,52 +9211,32 @@ "TARGET_32BIT" " { - if (!REG_P (XEXP (operands[1], 0)) && - (GET_CODE (XEXP (operands[1],0)) != SYMBOL_REF)) - XEXP (operands[1], 0) = force_reg (SImode, XEXP (operands[1], 0)); - if (operands[3] == NULL_RTX) operands[3] = const0_rtx; }" ) (define_insn "*sibcall_insn" - [(call (mem:SI (match_operand:SI 0 "call_insn_operand" "Cs,Ss")) + [(call (mem:SI (match_operand:SI 0 "" "X")) (match_operand 1 "" "")) (return) (use (match_operand 2 "" ""))] - "TARGET_32BIT && SIBLING_CALL_P (insn)" + "TARGET_32BIT && GET_CODE (operands[0]) == SYMBOL_REF" "* - if (which_alternative == 1) - return NEED_PLT_RELOC ? \"b%?\\t%a0(PLT)\" : \"b%?\\t%a0\"; - else - { - if (arm_arch5 || arm_arch4t) - return \" bx\\t%0\\t%@ indirect register sibling call\"; - else - return \"mov%?\\t%|pc, %0\\t%@ indirect register sibling call\"; - } + return NEED_PLT_RELOC ? \"b%?\\t%a0(PLT)\" : \"b%?\\t%a0\"; " [(set_attr "type" "call")] ) (define_insn "*sibcall_value_insn" - [(set (match_operand 0 "s_register_operand" "") - (call (mem:SI (match_operand:SI 1 "call_insn_operand" "Cs,Ss")) + [(set (match_operand 0 "" "") + (call (mem:SI (match_operand:SI 1 "" "X")) (match_operand 2 "" ""))) (return) (use (match_operand 3 "" ""))] - "TARGET_32BIT && SIBLING_CALL_P (insn)" + "TARGET_32BIT && GET_CODE (operands[1]) == SYMBOL_REF" "* - if (which_alternative == 1) - return NEED_PLT_RELOC ? \"b%?\\t%a1(PLT)\" : \"b%?\\t%a1\"; - else - { - if (arm_arch5 || arm_arch4t) - return \"bx\\t%1\"; - else - return \"mov%?\\t%|pc, %1\\t@ indirect sibling call \"; - } + return NEED_PLT_RELOC ? \"b%?\\t%a1(PLT)\" : \"b%?\\t%a1\"; " [(set_attr "type" "call")] ) diff --git a/gcc/config/arm/constraints.md b/gcc/config/arm/constraints.md index 7e7b3e69e0a..767ebfb6080 100644 --- a/gcc/config/arm/constraints.md +++ b/gcc/config/arm/constraints.md @@ -96,9 +96,6 @@ (define_register_constraint "c" "CC_REG" "@internal The condition code register.") -(define_register_constraint "Cs" "CALLER_SAVE_REGS" - "@internal The caller save registers. Useful for sibcalls.") - (define_constraint "I" "In ARM/Thumb-2 state a constant that can be used as an immediate value in a Data Processing instruction. In Thumb-1 state a constant in the range @@ -403,9 +400,3 @@ ;; Additionally, we used to have a Q constraint in Thumb state, but ;; this wasn't really a valid memory constraint. Again, all uses of ;; this now seem to have been removed. - -(define_constraint "Ss" - "@internal - Ss is a symbol reference." - (match_code "symbol_ref") -) diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md index 92de9fe8bd9..2e0de08a8d0 100644 --- a/gcc/config/arm/predicates.md +++ b/gcc/config/arm/predicates.md @@ -635,7 +635,3 @@ (define_predicate "mem_noofs_operand" (and (match_code "mem") (match_code "reg" "0"))) - -(define_predicate "call_insn_operand" - (ior (match_code "symbol_ref") - (match_operand 0 "s_register_operand"))) diff --git a/gcc/testsuite/ChangeLog.linaro b/gcc/testsuite/ChangeLog.linaro index 9dc74f65eeb..84061ebb563 100644 --- a/gcc/testsuite/ChangeLog.linaro +++ b/gcc/testsuite/ChangeLog.linaro @@ -1,5 +1,14 @@ 2013-07-03 Christophe Lyon <christophe.lyon@linaro.org> + Revert backport from trunk r198928. + 2013-05-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + PR target/19599 + * gcc.target/arm/pr40887.c: Adjust testcase. + * gcc.target/arm/pr19599.c: New test. + +2013-07-03 Christophe Lyon <christophe.lyon@linaro.org> + Revert backport from trunk 199439, 199533 2013-05-31 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> diff --git a/gcc/testsuite/gcc.target/arm/pr19599.c b/gcc/testsuite/gcc.target/arm/pr19599.c deleted file mode 100644 index e3e066cf820..00000000000 --- a/gcc/testsuite/gcc.target/arm/pr19599.c +++ /dev/null @@ -1,10 +0,0 @@ -/* { dg-skip-if "need at least armv5te" { *-*-* } { "-march=armv[234]*" } { "" } } */ -/* { dg-options "-O2 -march=armv5te -marm" } */ -/* { dg-final { scan-assembler "bx" } } */ - -int (*indirect_func)(); - -int indirect_call() -{ - return indirect_func(); -} diff --git a/gcc/testsuite/gcc.target/arm/pr40887.c b/gcc/testsuite/gcc.target/arm/pr40887.c index 5cabe3ab7fe..0b5e873a5c9 100644 --- a/gcc/testsuite/gcc.target/arm/pr40887.c +++ b/gcc/testsuite/gcc.target/arm/pr40887.c @@ -2,9 +2,9 @@ /* { dg-options "-O2 -march=armv5te" } */ /* { dg-final { scan-assembler "blx" } } */ -int (*indirect_func)(int x); +int (*indirect_func)(); int indirect_call() { - return indirect_func(20) + indirect_func (40); + return indirect_func(); } |