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| author | Trevor Smigiel <trevor_smigiel@playstation.sony.com> | 2008-08-27 23:18:14 +0000 |
|---|---|---|
| committer | Trevor Smigiel <trevor_smigiel@playstation.sony.com> | 2008-08-27 23:18:14 +0000 |
| commit | b62f17b201b48ea2c03fea26ee7f652a1e6f80b8 (patch) | |
| tree | e4c61e5ad22f80794d5355a4a895355e4bb1316f | |
| parent | 5d5b678604e34bc07baebc166e27c4dab64c34d3 (diff) | |
Fix a bug caused by the previous change.
* gcc/config/spu/spu.c (spu_init_expanders) : Pregenerate
a couple of pseudo-registers.
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/cell-4_3-branch@139678 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | ChangeLog.cell | 7 | ||||
| -rw-r--r-- | gcc/config/spu/spu.c | 22 |
2 files changed, 25 insertions, 4 deletions
diff --git a/ChangeLog.cell b/ChangeLog.cell index 88cecf8af3e..dd3cb07b128 100644 --- a/ChangeLog.cell +++ b/ChangeLog.cell @@ -1,4 +1,11 @@ 2008-08-27 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com> + + Fix a bug caused by the previous change. + + * gcc/config/spu/spu.c (spu_init_expanders) : Pregenerate + a couple of pseudo-registers. + +2008-08-27 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com> Improve code generated for loads and stores on SPU. diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c index 139fd4af771..cbc40e7a50f 100644 --- a/gcc/config/spu/spu.c +++ b/gcc/config/spu/spu.c @@ -6517,11 +6517,25 @@ spu_sms_res_mii (struct ddg *g) void spu_init_expanders (void) { - /* HARD_FRAME_REGISTER is only 128 bit aligned when - * frame_pointer_needed is true. We don't know that until we're - * expanding the prologue. */ if (cfun) - REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = 8; + { + rtx r0, r1; + /* HARD_FRAME_REGISTER is only 128 bit aligned when + frame_pointer_needed is true. We don't know that until we're + expanding the prologue. */ + REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = 8; + + /* A number of passes use LAST_VIRTUAL_REGISTER+1 and + LAST_VIRTUAL_REGISTER+2 to test the back-end. We want to + handle those cases specially, so we reserve those two registers + here by generating them. */ + r0 = gen_reg_rtx (SImode); + r1 = gen_reg_rtx (SImode); + mark_reg_pointer (r0, 128); + mark_reg_pointer (r1, 128); + gcc_assert (REGNO (r0) == LAST_VIRTUAL_REGISTER + 1 + && REGNO (r1) == LAST_VIRTUAL_REGISTER + 2); + } } static enum machine_mode |